WO2001061485A2 - Modular bios update mechanism - Google Patents
Modular bios update mechanism Download PDFInfo
- Publication number
- WO2001061485A2 WO2001061485A2 PCT/US2001/004079 US0104079W WO0161485A2 WO 2001061485 A2 WO2001061485 A2 WO 2001061485A2 US 0104079 W US0104079 W US 0104079W WO 0161485 A2 WO0161485 A2 WO 0161485A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- bios
- package
- ancillary
- executing
- video
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/54—Link editing before load time
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
- G06F21/572—Secure firmware programming, e.g. of basic input output system [BIOS]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1417—Boot up procedures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
Definitions
- Intel Corporation the assignee of the present invention is designing a single integrated circuit that merges the functionality of a processor, a graphics controller and a memory controller.
- the integrated circuit may communicate with firmware that includes both a system BIOS governing input/output transactions throughout the system but also may include a video BIOS for the graphic controller functionality.
- Video BIOS upgrades may be published independently of system BIOS updates. Accordingly, there is a need in the art for a system BIOS that permits modular updates to BIOS components in the storage medium. For example, it may be advantageous to update the video BIOS without disturbing the entire system BIOS in the storage medium.
- FIG. 1 illustrates a system BIOS according to an embodiment of the present invention.
- FIG. 2 is a usage model according to an embodiment of the present invention.
- FIG. 3 is a high level flow diagram illustrating an embodiment of the modular BIOS update (“MBU”) process and interaction between the BIOS and driver during the installation of a BIOS package.
- MBU modular BIOS update
- FIG. 4 illustrates a method of updating firmware according to an embodiment of the present invention.
- FIG. 5 is a memory map illustrating memory locations of fragments.
- FIG. 6 is a memory map illustrating a reassembled BIOS package.
- FIG. 7 illustrates a method of updating video BIOS according to an embodiment of the present invention.
- FIG. 8 shows a sample MBU package according to an embodiment of the present invention.
- Embodiments of the present invention provide an MBU mechanism - a standardized method to update options ROM's and provide video and processor microcode updates without requiring a complete replacement of the system BIOS.
- the MBU mechanism provides several advantages. First, new features and BIOS bug fixes may be delivered to an installed base of end-user systems even if direct OEM support cannot be identified. Also, BIOS components may be provided as a validated set of revisions. With resort to a validation matrix, BIOS updates may be managed easily.
- FIG. 1 illustrates a memory space 100 storing a system BIOS 110 according to an embodiment of the present invention.
- the memory space 100 may include a first memory space 120 and a second memory space 130.
- the first memory space may store core BIOS 140 and one or more ancillary BIOS's.
- FIG. 1 illustrates a core BIOS 140 and a video BIOS 150 stored in the first memory space 120.
- the first memory space 120 may be provided in firmware but alternatively may be provided in conventional ROM memory. According to an embodiment, the first memory space 120 need not provide for writing of data to the space 120.
- additional BIOS's may be written to the firmware 100. Regardless of whatever additional BIOS's are present in the firmware 100, those BIOS's stored in the first memory space 120 are expected to remain therein permanently. Accordingly, the first memory space 120 at times may be referred to as the "default space.”
- the second memory space 130 may store the additional BIOS's. Therefore, it may permit writing of data thereto.
- the second memory space 130 may store enhancements to the default system BIOSs. Accordingly, the second memory space 130 at times may be referred to as the "enhancement space.”
- the enhancement space 130 may provide for storage of BIOS elements to supplement or substitute for those BIOS elements stored in the default space 120.
- the enhancement space 130 may store:
- BIOS modules that substitute for a BIOS in the default space during operation
- FIG. 3 is a high-level flow diagram illustrating an embodiment of the MBU process 300.
- FIG. 3 illustrates operation in several phases of execution: operating system ("OS") run-time 310, OS restart 320, POST 330 and OS load 340.
- the process may begin at the START point after the installer application 230 is started.
- the installer application 230 may attach the MBU driver 240 (Box 301).
- the driver 240 may determine an interface revision supported by the MBU SMI handler (Box 302). If the revision number is recognized by the driver, the driver may attach to the SMI handler with a command that creates and returns a handle to be used for all calls during the MBU process 300. After initialization completes, the driver240 may return control to the installer application 230.
- OS operating system
- the installation application230 may create any necessary pointers to the package fragments (discussed herein) and may call the MBU driver's install entry point (Box 303).
- the MBU driver 240 may save this information and return to the installation application230 (Box 304).
- the installation application230 can exit leaving the install request pending in the MBU driver's update queue (Boxes 305, 306).
- the MBU driver 240 may remain in an idle state until the OS sends a close message to the MBU driver240 during shutdown.
- the MBU driver 240 may be included on this list.
- the MBU driver 240 may receive a MSG_CLOSE message and examine its pending update table for an MBU update (Box 311). If there is an update to be done, the MBU driver 240 may create a physical buffer in system memory, may load the update package from the file into main memory and may set a flag in memory informing the BIOS that an update is to be performed (Box 312). The MBU driver 240 then may release its handle with the SMI handler 250 and terminate (Boxes 313, 314). Thereafter, the OS may close in a conventional manner.
- FIG. 4 illustrates a method 400 of updating firmware during the POST phase of
- the BIOS attempts to authenticate the MBU package (Box 440). The BIOS determines whether authentication is successful and the MBU package is valid (Box 450). If not, if the MBU package is invalid, the BIOS returns an MBU authorization failure (Box 460) and exits the method (Box 430).
- the MBU package may contain authentication information that uniquely identifies the source of the MBU package.
- the authentication information may occur according to a public-private key pair.
- a public key may be stored by the BIOS in the default space 110 (FIG 1).
- the newly received MBU package may be signed with a private key.
- the processor may examine the contents of the MBU package and the signature that accompanies the MBU package to authenticate the package. Success indicates that the MBU package was published by an authentic source. Failure may indicate that the MBU package was not published by an authentic source, that the MBU package somehow was corrupted after publication or that some other error occurred.
- the BIOS may terminate the MBU update process if authentication fails.
- the public key-private key pair may be based on one of the well-known signature algorithms such as RSA or DSA signature systems. Other signature algorithms are known.
- memory spaces may be allocated in units of a predetermined size.
- operating systems of many computer systems conventionally allocate "pages" of a predetermined size, say 4 or 8 kilobytes.
- a MBU package is not limited by the page size of these systems. According to an embodiment, MBU package may span several pages. Thus, when stored in main memory by the installation application of the operating system 240 (FIG. 2), portions of the MBU package may be stored in several discontinuous pages throughout system memory.
- the processor may determine whether a buffer fragment table exists and, if so, assemble the MBU package from the buffer fragments identified in the table (FIG. 3, Box 520).
- FIG. 6 is a memory map 700 illustrating the reassembled BIOS package. Thereafter, the processor may continue with the MBU update.
- system BIOS may determine if the video BIOS package is compressed (Box 870). If so, the system BIOS may search the MBU block for decompression code associated with the video BIOS package (Boxes 880, 890). If no code is found, the system BIOS may run the default video BIOS because the video BIOS package is not available (Box 820). If the code is found, BIOS may decompress the video BIOS image and execute it (Boxes 900, 910).
- FIG. 8 shows a sample MBU package according to an embodiment of the present invention.
- multiple BIOS packages 1010, 1020, 1030 may exist, some of which may be compressed and may vary in size.
- BIOS packages 1010, 1020, 1030 may be located adjacent to one another.
- Each BIOS package 1010, 1020, 1030 stored in the MBU package 1000 may include an object header 1011 , 1021 , 1031 that identifies the object and defines its size. The data of the object may follows the object header entry.
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP01907119A EP1256057A2 (en) | 2000-02-14 | 2001-02-07 | Modular bios update mechanism |
AU2001234936A AU2001234936A1 (en) | 2000-02-14 | 2001-02-07 | Modular bios update mechanism |
KR1020027010622A KR100675518B1 (en) | 2000-02-14 | 2001-02-07 | Modular bios update mechanism |
HK03108784A HK1056413A1 (en) | 2000-02-14 | 2003-12-02 | Modular bios update mechanism |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/503,939 | 2000-02-14 | ||
US09/503,939 US7213152B1 (en) | 2000-02-14 | 2000-02-14 | Modular bios update mechanism |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2001061485A2 true WO2001061485A2 (en) | 2001-08-23 |
WO2001061485A3 WO2001061485A3 (en) | 2002-03-07 |
Family
ID=24004161
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2001/004079 WO2001061485A2 (en) | 2000-02-14 | 2001-02-07 | Modular bios update mechanism |
Country Status (7)
Country | Link |
---|---|
US (2) | US7213152B1 (en) |
EP (2) | EP1256057A2 (en) |
KR (1) | KR100675518B1 (en) |
CN (1) | CN1222873C (en) |
AU (1) | AU2001234936A1 (en) |
HK (1) | HK1056413A1 (en) |
WO (1) | WO2001061485A2 (en) |
Cited By (7)
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- 2000-02-14 US US09/503,939 patent/US7213152B1/en not_active Expired - Fee Related
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2001
- 2001-02-07 EP EP01907119A patent/EP1256057A2/en not_active Ceased
- 2001-02-07 EP EP05018965A patent/EP1617328A3/en not_active Withdrawn
- 2001-02-07 KR KR1020027010622A patent/KR100675518B1/en not_active IP Right Cessation
- 2001-02-07 WO PCT/US2001/004079 patent/WO2001061485A2/en not_active Application Discontinuation
- 2001-02-07 AU AU2001234936A patent/AU2001234936A1/en not_active Abandoned
- 2001-02-07 CN CNB018079377A patent/CN1222873C/en not_active Expired - Fee Related
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2003
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2007
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Cited By (13)
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GB2391360B (en) * | 2002-05-23 | 2005-02-02 | Hewlett Packard Co | A method and system of switching between two or more images of firmware on a host device |
US7080245B2 (en) | 2002-05-23 | 2006-07-18 | Hewlett-Packard Development Company, L.P. | Method and system of switching between two or more images of firmware on a host device |
GB2391360A (en) * | 2002-05-23 | 2004-02-04 | Hewlett Packard Co | User selected switching between two or more firmware images held in non-volatile memory of a host device |
US7185086B2 (en) | 2002-06-26 | 2007-02-27 | Hewlett-Packard Development Company, L.P. | Method for electronic tracking of an electronic device |
GB2392521A (en) * | 2002-07-09 | 2004-03-03 | Hewlett Packard Development Co | Performing an upgrade on a component of a computer by execution of a system configuration command without any associated manual component insertion. |
US7249353B2 (en) | 2003-04-17 | 2007-07-24 | Hewlett-Packard Development Company, L.P. | Image-formation device firmware having modular upgrade capability |
WO2007000670A1 (en) * | 2005-02-09 | 2007-01-04 | Lenovo (Singapore) Pte. Ltd. | Information updating method, program for the same and information processing unit |
JP2008523494A (en) * | 2005-02-09 | 2008-07-03 | レノボ・シンガポール・プライベート・リミテッド | Information updating method, program, and information processing apparatus |
EP2352094A1 (en) * | 2008-11-26 | 2011-08-03 | Panasonic Corporation | Information updating device and integrated circuit thereof, information updating method, and recording device and integrated circuit thereof |
EP2352094B1 (en) * | 2008-11-26 | 2014-06-18 | Panasonic Corporation | Information updating device and integrated circuit thereof, information updating method, and recording device and integrated circuit thereof |
EP3087471A4 (en) * | 2013-12-27 | 2017-10-11 | Intel Corporation | Controlled customization of silicon initialization |
KR101915695B1 (en) * | 2013-12-27 | 2019-01-07 | 인텔 코포레이션 | Controlled customization of silicon initialization |
US10310865B2 (en) | 2013-12-27 | 2019-06-04 | Intel Corporation | Controlled customization of silicon initialization |
Also Published As
Publication number | Publication date |
---|---|
EP1617328A3 (en) | 2006-05-03 |
EP1256057A2 (en) | 2002-11-13 |
KR20030015198A (en) | 2003-02-20 |
CN1422404A (en) | 2003-06-04 |
US20070204144A1 (en) | 2007-08-30 |
EP1617328A2 (en) | 2006-01-18 |
WO2001061485A3 (en) | 2002-03-07 |
HK1056413A1 (en) | 2004-02-13 |
AU2001234936A1 (en) | 2001-08-27 |
US7765409B2 (en) | 2010-07-27 |
US7213152B1 (en) | 2007-05-01 |
KR100675518B1 (en) | 2007-01-29 |
CN1222873C (en) | 2005-10-12 |
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