Patent US4776744 - Systems and methods for wafer handling in semiconductor process equipment

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cassette and place them onto a wafer mounting surface

SYSTEMS AND METHODS FOR WAFER in an item of processing equipment or into a special

HANDLING IN SEMICONDUCTOR PROCESS cassette for loading into a wafer processing system in

EQUD?MENT herently involves risk of wafer contamination and

5 breakage. As the industry has progressed, the demand BACKGROUND OF THE INVENTION for automated handling of wafers during loading of This invention relates generally to systems and meth- process equipment has also grown, ods for handling semiconductor wafers in semiconduc- This invention is particularly directed to meeting tor process equipment and, more specifically, to systems performance challenges involved automated wafer hanand methods for conveying wafers in standard plastic 10 dling and loading of high current ion implantation syswafer cassettes to a wafer transfer station, for receiving tems. However, this is just one case of the application of wafers into a vacuum load lock system and conveying the invention to automation of wafer handling. High the wafers to a wafer transfer station, and for batch current ion implantation machines, in the parlance of handling of semiconductor wafers in wafer processing the current state of the art, are considered to be masituations where full batch processing is required and 15 chines which generate useful boron ion beam currents dummy wafers may have to be used due to missing 0f 2-3 milliamperes (mA) and about 10-12 mA of arwafers in a plastic wafer cassette. senic ion beam current. The expense of high current ion DISCUSSION OF BACKGROUND AND PRIOR implanters demands that effective automation of wafer ART 20 handing be provided, but systems currently on the _ , „ , , . ... market do not adequately meet the advancing needs of The manufacture of large scale integrated circuit ^ industry (LSIC) chips has become one of the most important Jo ... eyen manufacturing efficiency, industries in the world over the last ten or fifteen years. ,, . . . r * • • J * • i t • This technology has produced the dramatic improve- *e semiconductor manufacturing industry is looking to mentin performance/cost of both mainframe andI mini- 25 develop even higher beam current ion implantation computer systems and the microcomputer systems systems t0'grease wafer throughput for high dose which are proliferating in the home computer and pro- mpknts. A. copending and commonly assigned U.S. fessional office computer field. LSIC technology has Patent application of Derek Aitken entitled APPARAalso made significant advances in performance and cost TUS AND METHODS FOR ION IMPLANTAreduction in telecommunications and real time control 30 TION, U.S. patent application Ser. No. 641,027, filed systems for industrial processes and equpment. To un- Aug. 15,1984, now U.S. Pat. No. 4,578,589, issued Mar. derstand the importance of this invention in the LSIC 25, 1986, discloses ion beam line technology capable of field, some background information on integrated cir- generating useful ion beam currents several times cuit (IC) manufacture will be helpful. greater in magnitude than current commercial state of TT„„ „^ . . „TM. TM , „T 35 the art technology. More specifically, boron ion beam

Very great improvements in the scale of integration novel ion optics technology and ion beam line compoof semiconductor devices on IC chips and the speed of nent technology disclosed in the Aitken application, operation of such devices have been achieved over the 40 This technology will herein be referred to as the Aitken past several years. These improvements have been very high current beam technology. Ion beam currents made possible by a number of advances in IC manufac- wju at these levels result in a new generation of ion turing equipment as well as improvements in the materi- implantation apparatus which will dramatically imals and methods utilized in processing virgin semicon- prove wafer throughput especially for high dose imductor wafers into IC chips. The most dramatic ad- 45 lants Effective automation of wafer handling is even vances in manufacturing equipment have been im- more in high throughput machines and improved apparatus for lithography and etching.and im- ]anters which m oriented toward performance capa. proved systems for implanting ions of conductivity bmties which make duction of advanced semiconmodifymg impunties into semiconductor wafers. ... ... mQre ... Qn j manufacturmg

The density of integrated circuits and their speed of 50 i -m. j • j * t C Um- *

.. j jiii *u J scale. The desired features m a wafer handling system

operation are dependent largely upon the accuracy ^nd . u- u ±u u * • ■ 'i * * *t.

resolution of the lithography and etching systems used f\ a h,Sh throuShPut lon lmPlanter sVstem the

to form patterns of circuit elements in masking layers on , ,. ,

the semiconductor wafer. However, density and speed W Batch loading of wafers onto the wafer scanning

are also dependent upon tight control of the profile of 55 svstem ln the vacuum environment of the main wafer

doped regions in the wafer, i.e., regions to which sub- Process chamber without breaking the vacuum between

stantial concentrations of conductivity modifying impu- batch loadmS and unloading.

rities have been added. Tight control of wafer doping (2) Ability to use the standard plastic wafer cassette in

can best be achieved using ion implantation techniques the wafer handling system so that standard cassette to

and equipment. 60 special cassette transfer can be avoided.

The semiconductor processing industry is highly (3) Provision of dummy wafers to substitute for missoriented toward batch processing of semiconductor »ng wafers in the cassette since the scan wheel must be wafers. In the infancy of the industry, almost all pro- fulty loaded.

cessing of wafers involved hand manipulation of the (4) Multiple cassette handling in a separate load lock

wafers. Wafers are almost universally carried from one 65 vacuum chamber for implantation of multicassette

item of process equipment to another in plastic wafer batches without breaking vacuum so that critical parts

cassettes which carry twenty five wafers. Manual han- in the wafer process chamber and post-acceleration

dling of wafers to remove them from the plastic wafer tube are not exposed to air between batches.

(5) Simplicity of wafer conveyance mechanisms with high accuracy of positioning at the wafer transfer station.

(6) Low particulate generation.

(7) Minimized clean room intrusion for operation and 5 maintenance.

The prior art systems currently in use in the ion implantation field do not achieve all of these desirable results. Currently available systems generally require that the vacuum of the wafer process chamber be bro- 10 ken each time the new batch of wafers is loaded. This drastically affects throughput due to the requirement for pumpdown of a large chamber. This problem increases with growing wafer sizes and resultant increases in internal volume of the process chamber and slower 15 pumpdown times.

Breaking vacuum also risks particulate intrusion. Introduction of air into the process chamber between batches causes air to be adsorbed on parts that will be exposed to the ion beam and thus increases contamination. The presence of air in the chamber interferes with placement and removal of wafer on heat sinks in the scan assembly on an automated basis. It is difficult to remove the air behind a wafer as it is placed on a heat ^ sink. It is also difficult to remove a wafer from a heat sink at atmosphere due to the vacuum behind the wafer left over from implant processing under vacuum conditions.

Most of the current wafer handling systems have a 3Q large intrusion to the clean room and some require that portions of the system maintenance be performed in the clean room itself. Some of the systems use standard wafer cassettes but do not satisfy many of the other desired performance features. 35

It is the principal object of this invention to provide improved systems and methods for wafer handling in automated semiconductor process equipment.

It is another object of this invention to provide a wafer handling system which permits usage of standard 40 plastic wafer cassettes and avoids any wafer registration problems during wafer transfer due to a warped cassette.

It is another object of this invention to provide a wafer handling system which has greatly improved 45 facility for handling dummy wafers required for full batch processing.

It is another object of this invention to provide a wafer handling system which permits processing of multicassette wafer batches with minimized pumping 50 cycles and simplicity of wafer cassette loading into the system.

It is another object of this invention to provide a wafer handling system which minimizes clean room intrusion. 55

One aspect of this invention features a wafer handling tray comprising a frame adapted to removably receive a standard plastic wafer cassette which carries up to a total of twenty five wafers of a prearranged diameter, and a dummy wafer cassette mounted to one end of the 60 frame means and adapted to carry a plurality of semiconductor wafers of the same diameter as wafers carried in the standard cassette. One or more of the wafers carried in the dummy wafer cassette may be withdrawn at a wafer processing station which requires a full com- 65 plement of twenty five wafers to be processed when a corresponding number of actual wafers are missing from the standard plastic wafer cassette.

Preferably the frame further comprises a fixturing surface arrangement on at least three interior edges of the frame with each of the fixturing surfaces being adapted to contact three exterior bottom portions of a plastic wafer cassette. A spring biasing arrangement positioned relative to a fourth edge of the frame urges the plastic wafer cassette toward a fixturing surface opposite the spring as the cassette is inserted so that the fixturing surfaces square up the bottom portion of the plastic wafer cassette to place individual wafer slots in the cassette tray in an accurately registered position on the tray.

The above feature of the invention advantageously permits plastic wafer cassette units to be used even in a wafer transfer arrangement which requires very accurate positioning of the individual wafer slots in the cassette. This positioning accuracy is particularly required in systems which access the wafer from underneath the cassette through apertures in the bottom wall of each wafer slot.

Another object of this invention features a wafer handling system for carrying a batch of semiconductor wafers to a wafer transfer station associated with wafer processing equipment for batch processing a standard complement of twenty five wafers. A wafer handling tray carries a standard plastic wafer cassette having a plurality of wafer carrying slots with bottom access apertures communicating with each of the slots. A transport arrangement conveys the wafer handling tray to a wafer transfer station and indexes the wafer handling tray to a plurality of wafer transfer positions corresponding to the bottom access apertures in the plastic wafer cassette. A wafer transfer system at the wafer transfer station transfers a wafer from each of the wafer slots to a wafer receiving surface associated with the wafer processing equipment. The wafer handling tray has the features described above for trueing the cassette and handling dummy wafers.

Another aspect of this invention features a wafer handling system for carrying a plurality of batches of semiconductor wafers to a wafer transfer station associated with wafer processing equipment which processes the wafers in a vacuum environment. The system includes a load lock enclosure having a front door adapted to open to permit insertion of wafer cassette trays and to close and seal for evacuation of the enclosure. A wall of the enclosure has a water transfer port communicating with the wafer processing equipment and a vacuum valve is mounted to seal the transfer port when not in use. The wafer transfer port is positioned at a wafer transfer location within the load lock enclosure. A plurality of wafer handling trays carry a plurality of standard plastic wafer cassettes. A rotating carousel including a plurality of radially arrayed paddles carries the plurality of wafer handling trays and transports the trays from a loading position adjacent the front door to a tray transfer position defined at a remote location within the load lock enclosure. A tray transfer arrangement at the tray transfer position removes a tray from one of the paddles, transports the tray to the wafer transfer station and indexes the tray and wafer cassette thereon to sequential wafer transfer positions associated with each wafer carrying slot in the plastic wafer cassette.

This feature of the invention provides for multiple cassette handling within a load lock to enable processing of large batches of wafers between pumpdowns of the load lock chamber. Combined with standard plastic

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Systems and methods for wafer handling in semiconductor process equipment