A low power, single master, variable clock rate, daisy-chainable, serial bus connects a bus dispatch (master) to a chain of one or more daisy-chained peripheral devices (slaves). The bus has a bidirectional serial data line, a bidirectional clock line, unidirectional interrupt line,...http://www.google.com.au/patents/US5787298?utm_source=gb-gplus-sharePatent US5787298 - Bus interface circuit for an intelligent low power serial bus
Bus interface circuit for an intelligent low power serial bus
