(12) United States Patent (io) Patent No.: US 6,769,757 B2
Skene et al. (45) Date of Patent: *Aug. 3,2004
(54) ROBUST BIT SCHEME FOR A MEMORY OF A REPLACEABLE PRINTER COMPONENT
(75) Inventors: John M Skene, Lake Oswego, OR (US); Matthew A Shepherd, Vancouver, WA (US); Garrard Hume,
Corvallis, OR (US)
(73) Assignee: Hewlett-Packard Development Company, LP, Houston, TX (US)
( * ) Notice: Subject to any disclaimer, the term ol this
patent is extended or adjusted under 35
U.S.C. 154(b) by 0 days.
This patent is subject to a terminal dis-
(21) Appl. No.: 10/384,942
(22) Filed: Mar. 10, 2003
(65) Prior Publication Data
US 2003/0146951 Al Aug. 7, 2003
Related U.S. Application Data
(63) Continuation ol application No. 09/866,040, filed on May 25, 2001.
(51) Int. C I. B41J 2/175
(52) U.S. C I 347/19
(58) Field of Search 714/800, 803,
714/801, 763, 716, 773; 399/8, 12, 24; 347/19, 86; 400/207, 208, 175; 365/200
(56) References Cited
U.S. PATENT DOCUMENTS
4,973,993 A 11/1990 Allen
5,491,540 A 2/1996 Hirst
5,574,484 A 11/1996 Cowger
5,583,545 A 12/1996 Pawlowski, Jr. et al.
A replaceable printer component having an integral memory for use in a printing system includes a semiconductor die and a plurality ol circuits formed on the semiconductor die. Each circuit is associated with and indicates the state ol a bit in the memory. The memory stores a plurality ol lunctional bits that must match values expected by the printing system lor proper operation ol the printing system. The memory stores a plurality ol informational bits that are not critical to proper operation ol the printing system. A large percentage ol the circuits associated with the lunctional bits are positioned substantially near a center ol the semiconductor die.
15 Claims, 5 Drawing Sheets