A processor stores descriptors without explicit linkages, in non-contiguous memory locations, and sequentially hands them off to an adaptor which manages scheduling and processing of data transfers defined by the descriptors. Each descriptor is handed off in a request signalling process in which the...http://www.google.com.au/patents/US5448702?utm_source=gb-gplus-sharePatent US5448702 - Adapters with descriptor queue management capability
