The idea of the invention is to coat the free surface of patterned Cu conducting lines in on-chip interconnections (BEOL) wiring by a 1-20 nm thick metal layer prior to deposition of the interlevel dielectric. This coating is sufficiently thin so as to obviate the need for additional planarization by...http://www.google.com.au/patents/US7468320?utm_source=gb-gplus-sharePatent US7468320 - Reduced electromigration and stressed induced migration of copper wires by surface coating
