An apparatus and method for verifying a logic function of a semiconductor chip in a logic chip emulation environment where a processing engine and a target interface engine interact with each other. The apparatus in accordance with the present invention generally includes a processing engine for executing...http://www.google.com.au/patents/US20020052729?utm_source=gb-gplus-sharePatent US20020052729 - Apparatus and method for verifying a logic function of a semiconductor chip
