On-chip circuitry facilitates fuse testing in customized integrated circuits. The circuitry has specific application in testing fuse redundancy high end memories. A latch assisted fuse testing (LAFT) methodology employs an on-chip latch stack which can be used in place of the fuses. The latches in the...http://www.google.com.au/patents/US5206583?utm_source=gb-gplus-sharePatent US5206583 - Latch assisted fuse testing for customized integrated circuits
