A method of forming isolation trenches and mesa areas in a semiconductor substrate and of forming FETs in the mesa areas is disclosed. The method includes providing a first oxide layer, a first undoped polysilicon layer, and an etch stop layer on a silicon substrate. Isolation trenches and mesa areas...http://www.google.com.au/patents/US5177028?utm_source=gb-gplus-sharePatent US5177028 - Trench isolation method having a double polysilicon gate formed on mesas
