A semiconductor integrated circuit device having first and second field-effect transistors, wherein the gate electrode of the first field-effect transistor is defined by a first-level conductor layer, while a wiring which is connected to the source or drain region of the first field-effect transistor...http://www.google.com.au/patents/US4845544?utm_source=gb-gplus-sharePatent US4845544 - Semiconductor integrated device having a field-effect transistor type memory cell array and peripheral circuitry structure
