A technique for reducing parity bit-widths for check bit and syndrome generation through the use of additional check bits to increase the number of minimum weighted codes in the Hamming Code H-Matrix. The technique of the present invention may be implemented while adding no additional correction/detection...http://www.google.com.au/patents/US20090077453?utm_source=gb-gplus-sharePatent US20090077453 - TECHNIQUE FOR REDUCING PARITY BIT-WIDTHS FOR CHECK BIT AND SYNDROME GENERATION FOR DATA BLOCKS THROUGH THE USE OF ADDITIONAL CHECK BITS TO INCREASE THE NUMBER OF MINIMUM WEIGHTED CODES IN THE HAMMING CODE H-MATRIX
