WO2017031957A1

WO2017031957A1 - Otg anti-counterfeiting reader

Info

Publication number: WO2017031957A1
Application number: PCT/CN2016/073783
Authority: WO
Inventors: 休斯顿约翰•M•N; 汪卫平
Original assignee: 优品保技术（北京）有限公司
Priority date: 2015-08-25
Filing date: 2016-02-15
Publication date: 2017-03-02
Also published as: CN205038657U

Abstract

An OTG anti-counterfeiting reader, comprising: a light-emitting circuit configured to output an optical signal to a to-be-detected object, the to-be-detected object generating a fluorescence signal under excitation of the optical signal; a receiving circuit configured to receive the fluorescence signal and convert same to a corresponding electrical signal; a control and identification circuit connected to the light-emitting circuit and the receiving circuit, and configured to control the light-emitting circuit to output or not to output the optical signal and obtain a result indicating whether the to-be-detected object is authentic according to the electrical signal; an interface conversion circuit connected to the control and identification circuit and a USB OTG interface, and configured to perform level conversion on data transmitted between the control and identification circuit and the USB OTG interface; and the USB OTG interface. The OTG anti-counterfeiting reader is able to provide a user with an easy and efficient detection means.

Description

OTG anti-counterfeit reader

Technical field

The invention relates to anti-counterfeiting identification technology, in particular to an OTG anti-counterfeit reader.

Background technique

Anti-counterfeiting technology is a measure taken to protect the legitimate rights and interests of corporate brands, markets and consumers. It is a technology that can accurately identify authenticity within a certain range and is not easy to be copied and copied. The OTG anti-counterfeit reader is a device for reading and identifying anti-counterfeiting marks, anti-counterfeiting marks, anti-counterfeiting materials, etc. According to the reading and recognition results of the OTG anti-counterfeit reader, the authenticity of the product can be judged.

The existing OTG anti-counterfeit reader has the following problems:

1. The OTG anti-counterfeit reader generally needs an external power supply or a separate battery to supply power. In this case, the user can easily ignore the OTG anti-counterfeit reader and whether it has power, which may affect the normal use of the OTG anti-counterfeit reader.

2, some desktop OTG anti-counterfeit readers, in the target anti-counterfeiting identification, usually need to move the target object, there is a risk of damage and pollution to the target, can not be detected at any time.

3. The OTG anti-counterfeit reader is generally a separate device, the human-computer interaction mode is not friendly, and the reading result reporting method is single.

Summary of the invention

The present invention addresses the above problems and develops an OTG anti-counterfeit reader.

The technical solution of the present invention is:

An OTG anti-counterfeit reader, comprising:

a light emitting circuit for outputting an optical signal to a target to be tested; the target to be tested generates a fluorescent signal under excitation of the optical signal;

a receiving circuit for receiving a fluorescent signal and converting it into a corresponding electrical signal;

Connecting the light-emitting circuit and the receiving circuit, for controlling whether the light-emitting circuit outputs an optical signal, and obtaining a control and identification circuit for authenticating the target to be tested according to the electrical signal;

And an interface conversion circuit connected to the control and identification circuit and the USB OTG interface for level-converting data transmitted between the control and identification circuit and the USB OTG interface;

And a USB OTG interface; the authenticity result data of the target to be tested output by the control and identification circuit is The interface conversion circuit is level-converted and output by the USB OTG interface;

In addition, the OTG anti-counterfeit reader further includes a signal processing circuit connected to the receiving circuit for processing the electrical signal;

Further, the signal processing circuit includes a first signal processing sub-circuit for amplifying the electrical signal output by the receiving circuit, and a second signal processing sub-circuit for amplifying and filtering the output signal of the first signal processing sub-circuit;

In addition, the OTG anti-counterfeit reader further includes a compensation circuit disposed between the first signal processing sub-circuit and the receiving circuit for compensating for ambient light;

Further, whether the first signal processing sub-circuit and the compensation circuit are connected are controlled by the control and identification circuit;

In addition, the OTG anti-counterfeit reader further includes a power circuit connected to the USB OTG interface; the power circuit provides a first power source, a second power source, and a third power source to supply power to the OTG anti-counterfeit reader;

Further, the first power source is a power source supplied by an external electronic device via the USB OTG interface; the second power source is formed by filtering the first power source through the power source circuit; and the third power source passes The power circuit is formed by converting the first power source;

Further, the light emitting circuit comprises an infrared light emitting tube D3, a resistor R2, a resistor R5, a resistor R6, a resistor R7, a resistor R22, a transistor D2 and a capacitor E1; the resistor R6 is connected at one end to the control and identification circuit, and the other end is connected The collector of the transistor D2 is connected to the anode of the first power source via the infrared light-emitting tube D3 and the resistor R22 connected in series; the resistor R2 is connected to both ends of the infrared light-emitting tube D3; the base of the transistor D2 is connected Grounding through the resistor R5, the emitter is grounded through the resistor R7; the capacitor E1 is grounded at the negative pole, and the anode is connected to the anode of the first power source via the resistor R22;

Further, the receiving circuit includes an infrared receiving tube D4, an operational amplifier U2B, a resistor R11, a resistor R9, a capacitor C12, a capacitor C9, and a diode D5. The cathode of the infrared receiving tube D4 is connected to the anode of the second power source through a resistor R11, and passes through The capacitor C12 is grounded; the infrared receiving tube D4 is connected to the inverting input terminal of the operational amplifier U2B; the inverting input terminal of the operational amplifier U2B is connected to the output of the operational amplifier U2B via a resistor R9, a diode D5 and a capacitor C9 connected in parallel with each other. The operational amplifier U2B is grounded at the non-inverting input terminal;

Further, the interface conversion circuit includes an RS232-USB interface converter U3, a resistor R18, a resistor R19, a resistor R20, and a resistor R21; a pin DP of the RS232-USB interface converter U3 is connected to the USB OTG through a resistor R19. The D+ end of the interface; the pin DM of the RS232-USB interface converter U3 is connected to the D-end of the USB OTG interface through a resistor R20; the D+ end of the USB OTG interface is connected to the third power supply positive pole through a resistor R21; The pin RXD and the pin TXD of the RS232-USB interface converter U3 are connected to the control and identification circuit; the pin of the RS232-USB interface converter U3

Connecting the third power source positive electrode through the resistor R18;

Further, the first signal processing sub-circuit includes a resistor R17, a resistor R10, an operational amplifier U2C and a capacitor C10; one end of the resistor R17 is connected to the output end of the receiving circuit, and the other end is connected to the inverting input terminal of the operational amplifier U2C; R10 and capacitor C10 are mutually coupled between the inverting input terminal and the output terminal of the operational amplifier U2C; the operational amplifier is grounded at the non-inverting input terminal;

Further, the second signal processing sub-circuit includes an operational amplifier U2D, a capacitor C13, a capacitor C18, a capacitor C11, a resistor R16, a resistor R12, a resistor R14, and a resistor R13; the resistor R16 and the capacitor C18 form an RC filter circuit, and the resistor One end of R16 is connected to the output end of the first signal processing sub-circuit, the other end is connected to the non-inverting input terminal of the operational amplifier U2D, and grounded through the capacitor C18; the inverting input terminal of the operational amplifier U2D is grounded through the resistor R12; the resistor R14 and the capacitor C11 are connected to each other. Between the inverting input terminal and the output terminal of the operational amplifier U2D; the output terminal of the operational amplifier U2D is connected to the control and identification circuit via an RC filter circuit formed by a resistor R13 and a capacitor C13;

Further, the compensation circuit includes an analog switch U1, an operational amplifier U2A, a resistor R8, a resistor R15, and a capacitor C8; the pin D of the analog switch is connected to the output end of the first signal processing sub-circuit through a resistor R15; A pin IN of the analog switch is connected to the control and identification circuit; a pin S1 of the analog switch is connected to an inverting input terminal of the operational amplifier U2A; and the capacitor C8 is connected to an inverting input terminal of the operational amplifier U2A. And the output terminal of the operational amplifier U2A; the non-inverting input terminal of the operational amplifier U2A is grounded; the output terminal of the operational amplifier U2A is connected to the receiving circuit through a resistor R8; the pin VL and the lead of the analog switch The pin V+ is connected to the positive pole of the second power source; the pin GND of the analog switch is grounded; the pin V- of the analog switch is connected to the negative pole of the third power source;

Further, the power supply circuit includes a resistor R1, a resistor R3, a resistor R4, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C7, an inductor G1, and a diode D1. The diode D1 is integrated with a double diode, one of which The cathode of the diode is connected to the anode of the other diode; one end of the resistor R3 is connected to the control and identification circuit, and the other end is connected to the common end of the diode D1 through a capacitor C3; the anode of the diode D1 is connected to one end of the resistor R1 and passes through the capacitor C6. The other end of the resistor R1 serves as a third power supply negative pole and is grounded through a capacitor C4; the cathode of the diode D1 is grounded; one end of the inductor is connected to the VBUS end of the USB OTG interface, and the other end is used as the first power source. The positive pole is grounded through capacitor C7; resistor R4 and capacitor C5 form an RC filter circuit, and resistor R4 is connected at one end. The first power source is positive, the other end is used as the second power source positive pole, and is grounded through the capacitor C5;

Further, when the USB OTG interface adopts the Mini-A type, the ID end of the USB OTG interface is grounded; when the USB OTG interface adopts the Mini-B type, the ID end of the USB OTG interface is suspended;

Further, the object to be tested is a bar code or a readable symbol suspected of having an anti-counterfeit tracer material;

Further, the USB OTG interface outputs the authenticity result of the object to be tested to a mobile phone capable of transmitting the authenticity result of the object to be tested to a cloud storage space or a server for saving.

Due to the adoption of the above technical solution, the OTG anti-counterfeit reader provided by the present invention has the following advantages compared with the prior art:

1. The OTG anti-counterfeit reader of the invention can work in the OTG mode, and connects external electronic devices such as mobile phones through the USB OTG interface, and uses these external electronic devices to supply power to the OTG anti-counterfeit reader, eliminating the need for the OTG anti-counterfeit reader alone. At the same time, the battery is purchased. At the same time, the power consumption of external electronic devices such as mobile phones has been widely concerned by operators and can be charged in time. This will not affect the OTG anti-counterfeiting reading because the user ignores the OTG anti-counterfeit reader. The problem of normal use of the device.

2. The circuit structure of the OTG anti-counterfeit reader of the invention is simple in integration, can be accommodated in a portable housing in practical application, is flexible in use, convenient to carry, and can quickly perform non-contact and non-destructive on-site detection of the object to be measured without moving. The goal is to protect the unsold goods and solve some problems that the desktop OTG anti-counterfeit reader can't detect at any time.

3. The OTG anti-counterfeit reader of the invention can provide convenient and efficient detection means for the user, and utilizes the mature mobile phone OTG mode through the USB OTG interface, and can use the currently widely used mobile phone to make audio, storage, display, etc. of external electronic devices such as mobile phones. Resources interact with users and expand the way in which results are reported.

DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief description of the drawings used in the embodiments or the prior art description will be briefly described below. Obviously, the drawings in the following description It is a certain embodiment of the present invention, and other drawings can be obtained from those skilled in the art without any inventive labor.

Figure 1 is a block diagram showing the structure of the present invention;

Figure 2 is a circuit schematic of the present invention.

detailed description

The technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings in the embodiments of the present invention. It is a partial embodiment of the invention, and not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

An OTG anti-counterfeit reader as shown in FIG. 1 and FIG. 2, comprising: a light-emitting circuit for outputting an optical signal to a target to be tested; wherein the object to be tested generates a fluorescent signal under excitation of the optical signal; a receiving circuit that receives the fluorescent signal and converts it into a corresponding electrical signal; connects the light emitting circuit and the receiving circuit, controls whether the light emitting circuit outputs an optical signal, and obtains an authenticity result of the target to be tested according to the electrical signal a control and identification circuit; an interface conversion circuit connected to the control and identification circuit and the USB OTG interface for level-converting data transmitted between the control and identification circuit and the USB OTG interface; And the USB OTG interface; the authenticity result data of the object to be tested outputted by the control and identification circuit is output by the USB OTG interface after being level-converted by the interface conversion circuit; in addition, the OTG anti-counterfeit reader further includes The receiving circuit is connected to a signal processing circuit for processing the electrical signal; further, the signal processing circuit includes discharging an electrical signal output by the receiving circuit a processed first signal processing sub-circuit, a second signal processing sub-circuit for amplifying and filtering the output signal of the first signal processing sub-circuit; in addition, the OTG anti-counterfeit reader further includes a first signal processing device a compensation circuit for compensating for ambient light between the circuit and the receiving circuit; further, whether the first signal processing sub-circuit and the compensation circuit are connected are controlled by the control and identification circuit; The OTG anti-counterfeit reader further includes a power supply circuit connected to the USB OTG interface; the power supply circuit provides a first power source, a second power source, and a third power source to supply power to the OTG anti-counterfeit reader; further, The first power source is a power source supplied by the external electronic device via the USB OTG interface; the second power source is formed by filtering the first power source through the power source circuit; and the third power source passes through the power circuit After the first power source is transformed, the light-emitting circuit includes an infrared light-emitting tube D3, a resistor R2, a resistor R5, a resistor R6, a resistor R7, and a resistor R22. Transistor R2 and capacitor E1; one end of the resistor R6 is connected to the control and identification circuit, and the other end is connected to the base of the transistor D2; the collector of the transistor D2 is connected to the first power source via the infrared light-emitting tube D3 and the resistor R22 connected in series with each other. a positive electrode; a resistor R2 is connected to both ends of the infrared light-emitting tube D3; a base of the transistor D2 is grounded through a resistor R5, and an emitter is grounded through a resistor R7; a cathode of the capacitor E1 is grounded, and a cathode is connected to the anode of the first power source via a resistor R22; The receiving circuit includes an infrared receiving tube D4, an operational amplifier U2B, a resistor R11, a resistor R9, a capacitor C12, a capacitor C9 and a diode D5. The cathode of the infrared receiving tube D4 is connected to the cathode of the second power source through a resistor R11, and passes through the capacitor. C12 is grounded; the infrared receiving tube D4 is connected to the inverting input terminal of the operational amplifier U2B; the inverting input terminal of the operational amplifier U2B is connected to the output terminal of the operational amplifier U2B via a resistor R9, a diode D5 and a capacitor C9 connected in parallel with each other. The operational amplifier U2B is grounded at the non-inverting input; further, the interface conversion circuit includes an RS232-USB interface converter U3, a resistor R18, a resistor R19, a resistor R20 and a resistor R21; a pin DP of the RS232-USB interface converter U3 is connected to a D+ terminal of the USB OTG interface via a resistor R19; a pin of the RS232-USB interface converter U3 The DM is connected to the D-end of the USB OTG interface through a resistor R20; the D+ terminal of the USB OTG interface is connected to the third power supply positive pole through a resistor R21; the pin RXD and the pin TXD of the RS232-USB interface converter U3 are The control and identification circuit is connected; the pin of the RS232-USB interface converter U3

The third power supply positive electrode is connected through a resistor R18; further, the first signal processing sub-circuit includes a resistor R17, a resistor R10, an operational amplifier U2C, and a capacitor C10; the resistor R17 is connected at one end to the output end of the receiving circuit, and the other end is connected The operational amplifier U2C has an inverting input terminal; the resistor R10 and the capacitor C10 are mutually coupled between the inverting input terminal and the output terminal of the operational amplifier U2C; the operational amplifier is grounded at the non-inverting input terminal; further, the second signal processing The sub-circuit includes an operational amplifier U2D, a capacitor C13, a capacitor C18, a capacitor C11, a resistor R16, a resistor R12, a resistor R14, and a resistor R13. The resistor R16 and the capacitor C18 form an RC filter circuit, and one end of the resistor R16 is connected to the first signal processing sub-circuit. The other end is connected to the non-inverting input terminal of the operational amplifier U2D, and is grounded through a capacitor C18; the inverting input terminal of the operational amplifier U2D is grounded through a resistor R12; the resistor R14 and the capacitor C11 are mutually coupled to the inverting input of the operational amplifier U2D Between the terminal and the output terminal; the output terminal of the operational amplifier U2D is connected to the RC filter circuit formed by the resistor R13 and the capacitor C13 Connecting the control and identification circuit; further, the compensation circuit comprises an analog switch U1, an operational amplifier U2A, a resistor R8, a resistor R15 and a capacitor C8; the pin D of the analog switch is connected to the first signal through a resistor R15 Processing the sub-circuit output terminal; the pin IN of the analog switch is connected to the control and identification circuit; the pin S1 of the analog switch is connected to the inverting input terminal of the operational amplifier U2A; the capacitor C8 is connected to the Between the inverting input of the operational amplifier U2A and the output of the operational amplifier U2A; the non-inverting input of the operational amplifier U2A is grounded; the output of the operational amplifier U2A is coupled to the receiving circuit via a resistor R8; The pin VL of the analog switch and the pin V+ are connected to the positive pole of the second power source; the pin GND of the analog switch is grounded; the pin V- of the analog switch is connected to the negative pole of the third power source; further, the power circuit includes a resistor R1, resistor R3, resistor R4, capacitor C3, capacitor C4, capacitor C5, capacitor C6, capacitor C7, inductor G1 and diode D1; a diode is integrated in the diode D1, one of which is diode The cathode is connected to the anode of the other diode; one end of the resistor R3 is connected to the control and identification circuit, and the other end is connected to the common end of the diode D1 through a capacitor C3; the anode of the diode D1 is connected to one end of the resistor R1 and grounded through the capacitor C6; The other end of the resistor R1 serves as a third power supply negative pole and is grounded through a capacitor C4; the cathode of the diode D1 is grounded; one end of the inductor is connected to the VBUS end of the USB OTG interface, and the other end is used as the first power supply positive pole. And the capacitor C7 is grounded; the resistor R4 and the capacitor C5 form an RC filter circuit, one end of the resistor R4 is connected to the positive pole of the first power source, the other end is used as the positive pole of the second power source, and grounded through the capacitor C5; further, when the USB OTG interface adopts the Mini -A type, the ID end of the USB OTG interface is grounded; when the USB OTG interface adopts the Mini-B type, the ID end of the USB OTG interface is suspended; further, the target to be tested is suspected to have anti-counterfeiting a bar code of the tracer material or an readable symbol; further, the USB OTG interface outputs the authenticity result of the object to be tested to the authenticity result of the target to be tested a cloud storage space or a server for saving the mobile phone; the pin VDD5 of the RS232-USB interface converter U3 is connected to the first power supply positive pole; the RS232-USB interface converter U3 is connected to the pin VDD33, the pin VO33, and the pin EX -PAD, pin VDD232, pin

The capacitor C14 is coupled between the positive pole of the first power source and the ground; the capacitor C15, the capacitor C16, and the capacitor C17 are coupled to each other between the positive pole of the second power source and the ground. The control and identification circuit adopts a single chip U4, the model is STC15W401AS chip; the resistor R6 included in the light emitting circuit is connected with the pin P1.4 of the single chip U4, and the control signal of the output light signal is outputted by the control and identification circuit (EN) After -LAMP), the infrared light-emitting tube D3 outputs near-infrared light to the target to be tested, such as anti-counterfeiting material, anti-counterfeiting mark, anti-counterfeit mark, etc., the target to be measured generates near-infrared fluorescence under the excitation of the near-infrared light, and the infrared receiving tube D4 Detecting and receiving the near-infrared fluorescence, and converting it to an electrical signal output corresponding to the near-infrared fluorescence by a receiving circuit, and the electrical signal output by the receiving circuit is amplified by the first signal processing sub-circuit and the second signal processing sub-circuit Filter processing, the adjusted electrical signal (ADC-SIG) is transmitted to the single-chip U4, the output of the second signal processing sub-circuit is connected with the pin P1.2 of the single-chip U4, and the single-chip U4 is obtained according to the received electrical signal. The actual implementation of the target to be tested is corresponding to the prior art. For details, refer to the patent name applied by the applicant on February 10, 2015 as "anti-counterfeiting standard". The identification device and the identification method thereof, the article identification system and the method thereof, and the patent application No.: 201510071159.7, the patent application relates to the content of the patent application for determining whether there is an anti-counterfeit mark (that is, the authenticity result of the target to be tested) The specific technical implementation of the second anti-counterfeiting identification part; the control and identification circuit can also determine the attribute of the object to be tested according to the strength of the electrical signal; the obtained authenticity result of the object to be tested is output via the interface conversion circuit and the USB OTG interface, specifically Ground, can be directly output to the external electronic device connected to the USB OTG interface, such as a mobile phone, and then store the authenticity result of the target to be tested through the memory of the mobile phone, display the authenticity result of the target to be tested through the display screen of the mobile phone, and/or through the mobile phone The sound is audible to the authenticity of the target; the serial port of the U4 U4 (pin TxD, pin RxD) is connected to the interface conversion circuit. In addition, since the spectrum of the ambient light overlaps with the received spectrum of the receiving circuit, in order to improve the accuracy of the detection result, the present invention can filter the interference ambient light by the ambient light compensation circuit, the first signal processor Whether the circuit and the compensation circuit are connected are controlled by the control and identification circuit. Specifically, when the light-emitting circuit does not emit light, the control and identification circuit controls the analog switch to be closed, and then the ambient light is fed back to the receiving circuit as a compensation amount. Automatically canceling the interference ambient light in the output electrical signal of the receiving circuit, thereby eliminating the influence of ambient light; the first power supply of the present invention is a unipolar 5V power supply, the second power supply is a unipolar 3.3V power supply, and the third power supply is non- Symmetrical bipolar power supply, positive +5VA, negative -3V; infrared LED D3 model is IR333-A; analog switch U1 is DG419DY; operational amplifier U2A, operational amplifier U2B, operational amplifier U2C, operational amplifier U2D model is MC33179, and the positive terminal of the power supply terminal is connected with the positive pole of the third power source, and the negative pole of the power supply terminal is connected with the negative pole of the third power source; Model D4 tube PD333-3B-L2-H0; diode D1 model BAV99; RS232-USB interface converter U3 Model PL-2303HXD. J1 in the figure is a USB OTG interface, and specifically may be a Mini-A type plug or a Mini-B type plug.

The invention is applicable to all scenarios that require on-site, non-destructive, non-contact, and rapid identification of the target commodity, for example, a scene in which the consumer authenticates the authenticity of the target commodity during shopping, specifically, the consumer is in a pharmacy, a supermarket, a shopping mall, For tax-exempt places, etc., when purchasing medicines, cosmetics, alcohol, tobacco, condoms, etc., for example, the manufacturer will verify the authenticity of other products and raw materials, and specifically, the company purchases third-party drugs, instruments, and raw materials. When purchasing all kinds of machinery, instruments, instruments, parts, semi-finished products and raw materials, for example, the inspection and supervision departments shall verify the authenticity of the goods in circulation, and the national inspection agencies, quality supervision agencies and other departments shall display all the products on the market. When the goods in circulation are identified.

The external electronic device connected to the USB OTG interface of the present invention may be a mobile phone; the authenticity detection result of the object to be tested returned by the OTG anti-counterfeit reader may be displayed to the user by using external display devices, audio, memory and other resources of the external electronic device such as a mobile phone. Coming out; the object to be tested is a bar code or a readable symbol suspected of having anti-counterfeit tracer material; the anti-counterfeit tracer material may exist on the surface or inside of the bar code and the readable symbol; the object to be tested is authentic The result is outputted by the USB OTG interface and uploaded to the cloud storage space or the server for storage by using the mobile phone; the authenticity result of the object to be tested may specifically be detected by the anti-counterfeiting The tracer material or the anti-counterfeit tracer material is not detected, and the mobile phone herein is an external electronic device that can supply the first power source.

The above is only a preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any technical person skilled in the art within the technical scope disclosed by the present invention, the technical solution according to the present invention Equivalent substitutions or modifications of the inventive concept are intended to be included within the scope of the invention.

Claims

An OTG anti-counterfeit reader, characterized in that the OTG anti-counterfeit reader comprises:

a light emitting circuit for outputting an optical signal to a target to be tested; the target to be tested generates a fluorescent signal under excitation of the optical signal;

a receiving circuit for receiving a fluorescent signal and converting it into a corresponding electrical signal;

Connecting the light-emitting circuit and the receiving circuit, for controlling whether the light-emitting circuit outputs an optical signal, and obtaining a control and identification circuit for authenticating the target to be tested according to the electrical signal;

And an interface conversion circuit connected to the control and identification circuit and the USB OTG interface for level-converting data transmitted between the control and identification circuit and the USB OTG interface;

And a USB OTG interface; the authenticity result data of the object to be tested outputted by the control and identification circuit is level-converted by the interface conversion circuit and output by the USB OTG interface.
The OTG anti-counterfeit reader of claim 1 further comprising a signal processing circuit coupled to said receiving circuit for processing said electrical signal.
The OTG anti-counterfeit reader according to claim 2, wherein said signal processing circuit comprises a first signal processing sub-circuit for amplifying the electrical signal outputted by the receiving circuit, and outputting an electrical signal to the first signal processing sub-circuit. A second signal processing sub-circuit for performing amplification and filtering.
The OTG anti-counterfeit reader of claim 3, wherein the OTG anti-counterfeit reader further comprises a compensation circuit disposed between the first signal processing sub-circuit and the receiving circuit for compensating for ambient light.
The OTG anti-counterfeit reader according to claim 4, wherein whether said first signal processing sub-circuit and said compensation circuit are connected are controlled by said control and identification circuit.
The OTG anti-counterfeit reader according to claim 5, wherein the OTG anti-counterfeit reader further comprises a power supply circuit connected to the USB OTG interface; the power supply circuit provides a first power source, a second power source, and The third power source supplies power to the OTG anti-counterfeit reader.
The OTG anti-counterfeit reader according to claim 6, wherein the first power source is a power source supplied by an external electronic device via the USB OTG interface; and the third power source performs the first power source through the power source circuit Formed after transformation.
The OTG anti-counterfeit reader according to claim 5 or 6, wherein the light-emitting circuit comprises an infrared light-emitting tube D3, a resistor R2, a resistor R5, a resistor R6, a resistor R7, a resistor R22, and a third a diode D2 and a capacitor E1; one end of the resistor R6 is connected to the control and identification circuit, and the other end is connected to the base of the transistor D2; the collector of the transistor D2 is connected to the first through the infrared light-emitting tube D3 and the resistor R22 connected in series The anode of the power supply is connected to the anode of the infrared light-emitting tube D3; the base of the transistor D2 is grounded through a resistor R5, the emitter is grounded through a resistor R7; the cathode of the capacitor E1 is grounded, and the anode is connected to the anode of the first power source via a resistor R22.
The OTG anti-counterfeit reader according to claim 5 or 6, wherein the receiving circuit comprises an infrared receiving tube D4, an operational amplifier U2B, a resistor R11, a resistor R9, a capacitor C12, a capacitor C9 and a diode D5; The cathode of the receiving tube D4 is connected to the anode of the third power source through the resistor R11, and is grounded through the capacitor C12; the anode of the infrared receiving tube D4 is connected to the inverting input terminal of the operational amplifier U2B; and the inverting input terminals of the operational amplifier U2B are connected in parallel with each other. A resistor R9, a diode D5 and a capacitor C9 are connected to the output terminal of the operational amplifier U2B; the operational amplifier U2B is connected to the non-inverting input terminal.
The OTG anti-counterfeit reader according to claim 5 or 6, wherein the interface conversion circuit comprises an RS232-USB interface converter U3, a resistor R18, a resistor R19, a resistor R20 and a resistor R21; and the RS232-USB interface The pin DP of the converter U3 is connected to the D+ end of the USB OTG interface through a resistor R19; the pin DM of the RS232-USB interface converter U3 is connected to the D- terminal of the USB OTG interface through a resistor R20; the USB The D+ terminal of the OTG interface is connected to the positive pole of the second power source through a resistor R21. The pin RXD and the pin TXD of the RS232-USB interface converter U3 are connected to the control and identification circuit; the RS232-USB interface converter U3 Pin
The second power source positive electrode is connected through a resistor R18.
The OTG anti-counterfeit reader according to claim 5 or 6, wherein the first signal processing sub-circuit comprises a resistor R17, a resistor R10, an operational amplifier U2C and a capacitor C10; and the resistor R17 is connected at one end to the receiving circuit The other end is connected to the inverting input terminal of the operational amplifier U2C; the resistor R10 and the capacitor C10 are mutually coupled between the inverting input terminal and the output terminal of the operational amplifier U2C; the operational amplifier is grounded at the non-inverting input terminal.
The OTG anti-counterfeit reader according to claim 5 or 6, wherein the second signal processing sub-circuit comprises an operational amplifier U2D, a capacitor C13, a capacitor C18, a capacitor C11, a resistor R16, a resistor R12, a resistor R14, and a resistor. R13; the resistor R16 and the capacitor C18 form an RC filter circuit, one end of the resistor R16 is connected to the output end of the first signal processing sub-circuit, the other end is connected to the non-inverting input terminal of the operational amplifier U2D, and grounded through the capacitor C18; the operational amplifier U2D is inverted The input terminal is grounded through a resistor R12; the resistor R14 and the capacitor C11 are coupled to each other at the inverting input terminal of the operational amplifier U2D Between the output terminal and the output terminal, the output terminal of the operational amplifier U2D is connected to the control and identification circuit via an RC filter circuit formed by a resistor R13 and a capacitor C13.
The OTG anti-counterfeit reader according to claim 5 or 6, wherein the compensation circuit comprises an analog switch U1, an operational amplifier U2A, a resistor R8, a resistor R15 and a capacitor C8; the pin D of the analog switch passes through the resistor R15 is connected to the output end of the first signal processing sub-circuit; the pin IN of the analog switch is connected to the control and identification circuit; the pin S1 of the analog switch is connected to the inverting input end of the operational amplifier U2A; The capacitor C8 is connected between the inverting input terminal of the operational amplifier U2A and the output terminal of the operational amplifier U2A; the non-inverting input terminal of the operational amplifier U2A is grounded; the output terminal of the operational amplifier U2A is connected through the resistor R8. The receiving circuit; the pin VL of the analog switch and the pin V+ are connected to the positive pole of the third power source; the pin GND of the analog switch is grounded; the pin V- of the analog switch is connected to the negative pole of the third power source.
The OTG anti-counterfeit reader according to claim 6, wherein the power supply circuit comprises a resistor R1, a resistor R3, a resistor R4, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C7, a capacitor C15, and an inductor G1. And a diode D1; a diode is integrated in the diode D1, wherein a cathode of one diode is connected to an anode of another diode; one end of the resistor R3 is connected to the control and identification circuit, and the other end is connected to a common end of the diode D1 through a capacitor C3. The anode of the diode D1 is connected to one end of the resistor R1 and grounded through a capacitor C6; the other end of the resistor R1 serves as a third power source negative pole and is grounded through a capacitor C4; the cathode of the diode D1 is grounded; The VBUS terminal of the USBOTG interface is connected, the other end is used as the positive pole of the first power supply, and is grounded through the capacitor C7; the resistor R4 and the capacitor C5 form an RC filter circuit, one end of the resistor R4 is connected to the positive pole of the first power source, and the other end is connected as the positive pole of the third power source. And grounded through a capacitor C5; the capacitor C15 is coupled between the positive pole of the second power source and the ground.
The OTG anti-counterfeit reader according to claim 5 or 6, wherein when the USB OTG interface adopts the Mini-A type, the ID end of the USB OTG interface is grounded; when the USB OTG interface adopts the Mini-A In the B type, the ID end of the USB OTG interface is left floating.
The OTG anti-counterfeit reader according to any one of claims 1 to 7, characterized in that the object to be tested is a bar code or a readable symbol suspected of having an anti-counterfeit tracer material.
The OTG anti-counterfeit reader according to any one of claims 1 to 7, wherein the USB OTG interface outputs the authenticity result of the object to be tested to the authenticity of the target to be tested and sends the result to the cloud storage. Space or server to save the phone.