WO2012078025A1 - A method of fabricating a semiconductor device - Google Patents
A method of fabricating a semiconductor device Download PDFInfo
- Publication number
- WO2012078025A1 WO2012078025A1 PCT/MY2011/000112 MY2011000112W WO2012078025A1 WO 2012078025 A1 WO2012078025 A1 WO 2012078025A1 MY 2011000112 W MY2011000112 W MY 2011000112W WO 2012078025 A1 WO2012078025 A1 WO 2012078025A1
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- WO
- WIPO (PCT)
- Prior art keywords
- sacrificial layer
- chemical resist
- semiconductor film
- chemical
- resist
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00349—Creating layers of material on a substrate
- B81C1/00373—Selective deposition, e.g. printing or microcontact printing
Definitions
- the present invention relates to a method for fabricating a semiconductor device and more particularly, a method of fabricating a semiconductor device using a lift-off method.
- micro-fabrication process patterning of thin film layers are essential to create structures and features for Micro-Electro-Mechanical Systems (MEMS) and Nano-Electro-Mechanical Systems (NEMS) devices such as sensors and actuators.
- MEMS Micro-Electro-Mechanical Systems
- NEMS Nano-Electro-Mechanical Systems
- the conventional method for patterning of thin film layers utilises photolithography method which includes dry etching process such as Deep Reactive Ion Etching (DRIE) and Reactive Ion Etching (RIE), or wet etching process such as hydrofluoric (HF) etching, potassium hydroxide (KOH) etching, Buffered Oxide Etch (BOE) etching.
- DRIE Deep Reactive Ion Etching
- RIE Reactive Ion Etching
- wet etching process such as hydrofluoric (HF) etching, potassium hydroxide (KOH) etching, Buffered Oxide Etch (BOE) etching.
- FIGS. 1(a-d) The steps to perform the conventional lift-off method are shown in FIGS. 1(a-d).
- a sacrificial layer (12) such as photoresist is deposited onto a substrate (11) as shown in FIG. 1a.
- the photoresist (12) is exposed and developed through lithography to create an inverse pattern as shown in FIG. 1b.
- a target material (13) such as a thin metal layer is deposited covering the photoresist (12) and the exposed substrate (11) surface.
- the photoresist (12) is washed out together with parts of the target material (13) covering it.
- FIG. 1d shows the target material (13) on the photoresist (12) having been lifted-off and leaving only the target material (13) which was deposited directly on the substrate (11) surface as shown in FIG. 1d.
- the conventional lift-off method has some drawbacks. There is a limitation on the thickness of the target material (13) that can be lifted-off when using a single resist (12) whereby the target material (13) needs to be 5 times thinner than the resist (12). Moreover, the lift-off method creates undesired effect of ears (14) forming after lift-off due to low resist aspect ratio.
- FIGS. 1d and 2 show the ears (14) formed after lifting-off the sacrificial layer (12). The ears (14) formed can influence device performance and its fragility is a source of contamination to downstream processes.
- the present invention relates to a method for fabricating a semiconductor device using a lift-off method.
- the method is characterized by the steps of depositing and patterning a sacrificial layer (22) onto a substrate (21), wherein at least one portion of the substrate surface (21a) is covered by the sacrificial layer (22) and at least one portion of the substrate surface (21b) is exposed; depositing and patterning a chemical resist (23) onto the sacrificial layer (22) and the exposed substrate surface (21b); removing the sacrificial layer (22); depositing a semiconductor film (24) onto the substrate (21) and the chemical resist (23); and removing the chemical resist (23) and the semiconductor film (24) deposited on the chemical resist (23).
- the sacrificial layer (22) has a maximum thickness of 20pm and it is made of polycrystalline silicon, silicon dioxide, spin-on-glass (SOG), phosphosilicate glass (PSG), or boron phosphosilicate glass (BPSG).
- SOG spin-on-glass
- PSG phosphosilicate glass
- BPSG boron phosphosilicate glass
- the chemical resist (23) has a minimum thickness of 50nm.
- the semiconductor film (24) has a thickness in a range of 5nm to
- the chemical resist (23) forms a T-shaped structure on the exposed substrate surface (21b).
- the sacrificial layer (22) is removed through wet etching by using wet chemical etchant such as a hydrofluoric acid based solution or a mixture solution of nitric acid and hydrofluoric acid.
- the present invention uses thin resist material that eliminates the issue of poor lithographic resolution due to the use of thick resist which is critical in producing nanostructures semiconductor.
- the present invention does not impact lithographic resolution as it does not require thick or bi-layer chemical resist.
- the present invention eliminates the ears effect after lifting- off the resist.
- the present invention allows the fabrication of semiconductor devices having structures of high aspect ratios.
- FIGS. 1(a-d) show a conventional lift-off method used in fabricating a semiconductor device.
- FIG. 2 is a SEM image showing a formation of ears (14) after the lift-off method of FIGS. 1.
- FIGS. 3(a-f) show a lift-off method used in fabricating a semiconductor device in accordance with an embodiment of the present invention.
- a substrate (21) is prepared for patterning of semiconductor film (24) as shown in FIG. 3a.
- the substrate (21) is a silicon or glass substrate.
- a sacrificial layer (22) is deposited on the surface of the substrate (21).
- the sacrificial layer (22) has a thickness of up to 20 ⁇ .
- the sacrificial layer (22) is preferably made of polycrystalline silicon, silicon dioxide, spin-on-glass (SOG), phosphosilicate glass (PSG), boron phosphosilicate glass (BPSG) or any other material that have good adhesion to the substrate (21), able to be removed using wet chemical etchants, and able to withstand high temperature.
- the sacrificial layer (22) deposited on the substrate (21) is patterned through etching or photolithography and thus, providing at least one portion of the substrate surface (21a) covered by the sacrificial layer (22) and at least one portion of the substrate surface exposed (21b).
- a chemical resist (23) is deposited and patterned on the sacrificial layer (22) through lithography and thus, covering the surface of the sacrificial layer (22) and the exposed substrate surface (21b).
- the chemical resist (23) forms a T-shaped structure on the exposed substrate surface (21b).
- the chemical resist (23) has a minimum thickness of 50nm.
- the sacrificial layer (22) is removed through wet etching.
- hydrofluoric acid based solution or a mixture solution of nitric acid and hydrofluoric acid is used as wet chemical etchant to etch the sacrificial layer (22).
- the removal of the sacrificial layer (22) leaves the T-shaped structure of the chemical resist (23) on the substrate (21).
- semiconductor film (24) is deposited on the substrate (21) and the
- the semiconductor film (24) has a thickness in a range of 5nm to 3pm.
- the semiconductor film (24) is preferably made of alloy, aluminium, gold, silver, platinum, titanium, tungsten, chromium, molybdenum, nickel, vanadium, palladium or metal oxides such as titanium dioxide (Ti0 2 ), zinc oxide (ZnO), niobium pentoxide (ND2O 5 ), tungsten oxide (W0 3 ), tin dioxide (Sn0 2 ), magnesium oxide (MgO) or any combination thereof.
- Ti0 2 titanium dioxide
- ZnO zinc oxide
- ND2O 5 niobium pentoxide
- W0 3 tungsten oxide
- Sn0 2 tin dioxide
- MgO magnesium oxide
- the chemical resist (23) is removed by using solvent or acid such as but not limited to acetone, NMP (1-Methyl-2-pyrrolidon), DMSO (Dimethyl sulfoxide), fuming nitric acid, sulfuric acid and chromic acid.
- solvent or acid such as but not limited to acetone, NMP (1-Methyl-2-pyrrolidon), DMSO (Dimethyl sulfoxide), fuming nitric acid, sulfuric acid and chromic acid.
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- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The present invention relates to a method for fabricating a semiconductor device using a lift-off method. The method comprises the steps of depositing and patterning a sacrificial layer (22) onto a substrate (21), wherein at least one portion of the substrate surface (21a) is covered by the sacrificial layer (22) and at least one portion of the substrate surface (21b) is exposed; depositing and patterning a chemical resist (23) onto the sacrificial layer (22) and the exposed substrate surface (21b); removing the sacrificial layer (22); depositing a semiconductor film (24) onto the substrate (21) and the chemical resist (23); and removing the chemical resist (23) and the semiconductor film (24) deposited on the chemical resist (23).
Description
A METHOD OF FABRICATING A SEMICONDUCTOR DEVICE
FIELD OF INVENTION
The present invention relates to a method for fabricating a semiconductor device and more particularly, a method of fabricating a semiconductor device using a lift-off method.
BACKGROUND OF THE INVENTION
In micro-fabrication process, patterning of thin film layers are essential to create structures and features for Micro-Electro-Mechanical Systems (MEMS) and Nano-Electro-Mechanical Systems (NEMS) devices such as sensors and actuators. The conventional method for patterning of thin film layers utilises photolithography method which includes dry etching process such as Deep Reactive Ion Etching (DRIE) and Reactive Ion Etching (RIE), or wet etching process such as hydrofluoric (HF) etching, potassium hydroxide (KOH) etching, Buffered Oxide Etch (BOE) etching.
However, it has been found that patterning of noble metal films or alloys such as platinum, tantalum, nickel, iron, chromium, gold and silver are hard to be performed using conventional etching process due to lack of high vapour pressure compounds of the metals with common dry etching gases such as chlorine (Cl2), bromine (Br2) and fluorine (F2).
In view of that, a conventional lift-off method is commonly deployed for patterning of these materials. The steps to perform the conventional lift-off method are shown in FIGS. 1(a-d). Initially, a sacrificial layer (12) such as photoresist is deposited onto a substrate (11) as shown in FIG. 1a. The photoresist (12) is exposed and developed through lithography to create an inverse pattern as shown in FIG. 1b. Thereon, as shown in FIG. 1c, a target material (13) such as a thin metal layer is deposited covering the photoresist (12) and the exposed substrate (11) surface. Thereafter, the photoresist (12) is washed out together with parts of the target material (13) covering it. Hence, the target material (13) on the photoresist (12) has been lifted-off and leaving only the target material (13) which was deposited directly on the substrate (11) surface as shown in FIG. 1d.
The conventional lift-off method has some drawbacks. There is a limitation on the thickness of the target material (13) that can be lifted-off when using a single resist (12) whereby the target material (13) needs to be 5 times thinner than the resist (12). Moreover, the lift-off method creates undesired effect of ears (14) forming after lift-off due to low resist aspect ratio. FIGS. 1d and 2 show the ears (14) formed after lifting-off the sacrificial layer (12). The ears (14) formed can influence device performance and its fragility is a source of contamination to downstream processes.
Hence, there is a need for a method for fabricating a semiconductor device using lift-off method that addresses thick patterning of target material layers without having the ears effect.
SUMMARY OF INVENTION
The present invention relates to a method for fabricating a semiconductor device using a lift-off method. The method is characterized by the steps of depositing and patterning a sacrificial layer (22) onto a substrate (21), wherein at least one portion of the substrate surface (21a) is covered by the sacrificial layer (22) and at least one portion of the substrate surface (21b) is exposed; depositing and patterning a chemical resist (23) onto the sacrificial layer (22) and the exposed substrate surface (21b); removing the sacrificial layer (22); depositing a semiconductor film (24) onto the substrate (21) and the chemical resist (23); and removing the chemical resist (23) and the semiconductor film (24) deposited on the chemical resist (23).
Preferably, the sacrificial layer (22) has a maximum thickness of 20pm and it is made of polycrystalline silicon, silicon dioxide, spin-on-glass (SOG), phosphosilicate glass (PSG), or boron phosphosilicate glass (BPSG).
Preferably, the chemical resist (23) has a minimum thickness of 50nm. Preferably, the semiconductor film (24) has a thickness in a range of 5nm to
3pm and it is made of alloy, aluminium, gold, silver, platinum, titanium, tungsten, chromium, molybdenum, nickel, vanadium, palladium, metal oxides or any combination thereof.
Preferably, the chemical resist (23) forms a T-shaped structure on the exposed substrate surface (21b). Preferably, the sacrificial layer (22) is removed through wet etching by using wet chemical etchant such as a hydrofluoric acid based solution or a mixture solution of nitric acid and hydrofluoric acid.
Advantageously, the present invention uses thin resist material that eliminates the issue of poor lithographic resolution due to the use of thick resist which is critical in producing nanostructures semiconductor.
Advantageously, the present invention does not impact lithographic resolution as it does not require thick or bi-layer chemical resist. Advantageously, the present invention eliminates the ears effect after lifting- off the resist.
Advantageously, the present invention allows the fabrication of semiconductor devices having structures of high aspect ratios.
BRIEF DESCRIPTION OF THE DRAWINGS
FIGS. 1(a-d) show a conventional lift-off method used in fabricating a semiconductor device. FIG. 2 is a SEM image showing a formation of ears (14) after the lift-off method of FIGS. 1.
FIGS. 3(a-f) show a lift-off method used in fabricating a semiconductor device in accordance with an embodiment of the present invention.
DESCRIPTION OF THE PREFFERED EMBODIMENT
A preferred embodiment of the present invention will be described herein below with reference to the accompanying drawings. In the following description, well know functions or constructions are not described in detail since they would obscure the description with unnecessary detail.
Referring now to FIGS 3(a-f), a method of fabricating a semiconductor device using a lift-off method is provided. Initially, a substrate (21) is prepared for patterning of semiconductor film (24) as shown in FIG. 3a. Preferably, the substrate (21) is a silicon or glass substrate.
Thereon, in FIG. 3b, a sacrificial layer (22) is deposited on the surface of the substrate (21). Preferably, the sacrificial layer (22) has a thickness of up to 20μιτι. Moreover, the sacrificial layer (22) is preferably made of polycrystalline silicon, silicon dioxide, spin-on-glass (SOG), phosphosilicate glass (PSG), boron phosphosilicate glass (BPSG) or any other material that have good adhesion to the substrate (21), able to be removed using wet chemical etchants, and able to withstand high temperature. The sacrificial layer (22) deposited on the substrate (21) is patterned through etching or photolithography and thus, providing at least one portion of the substrate surface (21a) covered by the sacrificial layer (22) and at least one portion of the substrate surface exposed (21b).
In FIG. 3c, a chemical resist (23) is deposited and patterned on the sacrificial layer (22) through lithography and thus, covering the surface of the sacrificial layer (22) and the exposed substrate surface (21b). As a result, the chemical resist (23) forms a T-shaped structure on the exposed substrate surface (21b). Preferably, the chemical resist (23) has a minimum thickness of 50nm.
Thereon, in FIG. 3d, the sacrificial layer (22) is removed through wet etching. Preferably, hydrofluoric acid based solution or a mixture solution of nitric acid and hydrofluoric acid is used as wet chemical etchant to etch the sacrificial layer (22). The removal of the sacrificial layer (22) leaves the T-shaped structure of the chemical resist (23) on the substrate (21). In FIG. 3e, semiconductor film (24) is deposited on the substrate (21) and the
T-shaped structure of the chemical resist (23). Therefore, the top portion of the substrate (21) and the T-shaped structure of the chemical resist (23) are layered with the semiconductor film (24). Preferably, the semiconductor film (24) has a thickness in a range of 5nm to 3pm. Moreover, the semiconductor film (24) is preferably made of alloy, aluminium, gold, silver, platinum, titanium, tungsten, chromium,
molybdenum, nickel, vanadium, palladium or metal oxides such as titanium dioxide (Ti02), zinc oxide (ZnO), niobium pentoxide (ND2O5), tungsten oxide (W03), tin dioxide (Sn02), magnesium oxide (MgO) or any combination thereof. In FIG. 3f, the chemical resist (23) is removed by using solvent or acid such as but not limited to acetone, NMP (1-Methyl-2-pyrrolidon), DMSO (Dimethyl sulfoxide), fuming nitric acid, sulfuric acid and chromic acid. Hence, the semiconductor film (24) deposited on top of the chemical resist (23) is lifted-off and leaving only the semiconductor film (24) which was deposited directly on the substrate (21 ) surface.
While embodiments of the invention have been illustrated and described, it is not intended that these embodiments illustrated and describe all possible forms of the invention. Rather, the words used in the specifications are words of description rather than limitation and various changes may be made without departing from the scope of the invention.
Claims
A method for fabricating a semiconductor device using a lift-off method is characterized by the steps of:
+ a) depositing and patterning a sacrificial layer (22) onto a substrate (21), wherein at least one portion of the substrate surface (21a) is covered by the sacrificial layer (22) and at least one portion of the substrate surface (21b) is exposed; b) depositing and patterning a chemical resist (23) onto the sacrificial layer (22) and the exposed substrate surface (21b); c) removing the sacrificial layer (22); d) depositing a semiconductor film (24) onto the substrate (21) and the chemical resist (23); and e) removing the chemical resist (23) and the semiconductor film (24) deposited on the chemical resist (23).
A method as claimed in claim 1, wherein the sacrificial layer (22) has a maximum thickness of 20pm.
A method as claimed in claim 1 , wherein the sacrificial layer (22) is made of polycrystalline silicon, silicon dioxide, spin-on-glass (SOG), phosphosilicate glass (PSG), or boron phosphosilicate glass (BPSG).
A method as claimed in claim 1, wherein the chemical resist (23) has a minimum thickness of 50nm.
A method as claimed in claim 1 , wherein the semiconductor film (24) has a thickness in a range of 5nm to 3pm.
6. A method as claimed in claim 1, wherein the semiconductor film (24) is made of alloy, aluminium, gold, silver, platinum, titanium, tungsten, chromium,
molybdenum, nickel, vanadium, palladium, metal oxides or any combination thereof.
A method as claimed in step (b) of claim 1 , wherein the chemical resist (23) forms a T-shaped structure on the exposed substrate surface (21b).
A method as claimed in step (c) of claim 1 , wherein the sacrificial layer (22) is removed through wet etching by using wet chemical etchant.
A method as claimed in claim 8, wherein the wet chemical etchant is a hydrofluoric acid based solution or a mixture solution of nitric acid and hydrofluoric acid.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| MYPI2010005859 | 2010-12-09 | ||
| MYPI2010005859 | 2010-12-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2012078025A1 true WO2012078025A1 (en) | 2012-06-14 |
Family
ID=46207363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/MY2011/000112 WO2012078025A1 (en) | 2010-12-09 | 2011-06-20 | A method of fabricating a semiconductor device |
Country Status (2)
| Country | Link |
|---|---|
| MY (1) | MY151464A (en) |
| WO (1) | WO2012078025A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110337710A (en) * | 2017-01-19 | 2019-10-15 | 德克萨斯仪器股份有限公司 | For the patterned sacrificial layer of platinum |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4497684A (en) * | 1983-02-22 | 1985-02-05 | Amdahl Corporation | Lift-off process for depositing metal on a substrate |
| US6667850B2 (en) * | 2000-03-17 | 2003-12-23 | International Business Machines Corporation | Bilayer liftoff process for high moment laminate |
| US20050070113A1 (en) * | 2003-09-26 | 2005-03-31 | Hanberg Peter J. | Low resistance T-shaped ridge structure |
| US20100093176A1 (en) * | 2008-09-12 | 2010-04-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a sacrificial layer |
-
2010
- 2010-12-09 MY MYUI2010005859 patent/MY151464A/en unknown
-
2011
- 2011-06-20 WO PCT/MY2011/000112 patent/WO2012078025A1/en active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4497684A (en) * | 1983-02-22 | 1985-02-05 | Amdahl Corporation | Lift-off process for depositing metal on a substrate |
| US6667850B2 (en) * | 2000-03-17 | 2003-12-23 | International Business Machines Corporation | Bilayer liftoff process for high moment laminate |
| US20050070113A1 (en) * | 2003-09-26 | 2005-03-31 | Hanberg Peter J. | Low resistance T-shaped ridge structure |
| US20100093176A1 (en) * | 2008-09-12 | 2010-04-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a sacrificial layer |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110337710A (en) * | 2017-01-19 | 2019-10-15 | 德克萨斯仪器股份有限公司 | For the patterned sacrificial layer of platinum |
| CN110337710B (en) * | 2017-01-19 | 2023-12-26 | 德克萨斯仪器股份有限公司 | Sacrificial layer for platinum patterning |
Also Published As
| Publication number | Publication date |
|---|---|
| MY151464A (en) | 2014-05-30 |
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