WO2011155863A1

WO2011155863A1 - Viterbi decoder with a channel for evaluating the current signal-to-noise ratio

Info

Publication number: WO2011155863A1
Application number: PCT/RU2010/000420
Authority: WO
Inventors: Тимур Георгиевич КЕЛИН; Николай Афанасьевич ВАЖЕНИН; Дмитрий Алексеевич ПЯТКОВ
Original assignee: Kelin Timur Georgievich; Vazhenin Nikolay Afanasievich; Pyatkov Dmitry Alekseevich
Priority date: 2010-06-09
Filing date: 2010-07-28
Publication date: 2011-12-15
Also published as: RU2434325C1

Abstract

A Viterbi decoder with a channel for evaluating the current signal-to-noise ratio which comprises, connected in series, a branch metrics calculation unit, a path metrics calculation and memory unit, a unit for generating an information symbol, and the following elements which are coupled to the path metrics calculation and memory unit: a minimal path metrics memory, a path metrics memory and a path memory, wherein the input of the device is the input of the branch metrics calculation unit, and the output of the device is the output of the unit for generating an information symbol, said Viterbi decoder being characterized in that it comprises, connected in series: a unit for evaluating the depth of decoding history at which all of the decoding paths converge, a unit for evaluating the signal-to-noise ratio, wherein the input of the unit for evaluating the depth of decoding history at which all of the decoding paths converge is connected to the second output of the path memory, while the first output of the unit for evaluating the signal-to-noise ratio is connected to the first control input of the branch metrics calculation unit and to the control input of the path metrics calculation and memory unit, the second output of the unit for evaluating the signal-to-noise ratio is connected to the second control input of the branch metrics calculation unit and is the output of the device at which, during operation of said device, a signal occurs which corresponds to an evaluation of the current signal-to-noise ratio. In addition, the unit for evaluating the depth of decoding history at which all of the decoding paths converge can be in the form of combinational logic units in a number which is equal to the decoding depth, while the number of inputs of each unit is equal to the number of convolutional encoder states, and a priority encoder with a number of inputs equal to the number of combinational logic units, wherein the output of each combinational logic unit is connected to the corresponding input of the priority encoder, and the input of the unit for evaluating the depth of decoding history at which all of the decoding paths converge serves as the inputs of the combinational logic units, while the output is the output of the priority encoder.

Description

“Viterbi decoder with a channel for evaluating the current signal-to-noise ratio”

Technical field

The invention relates to the field of information transmission systems and is intended to measure the value of the signal-to-noise ratio at the input of the decoder and adaptive decoding of convolutional codes taking into account the current signal-to-noise ratio.

State of the art

Convolutional coding-decoding is widely used in satellite information transmission systems, for example, in data transmission channels of satellite radio navigation systems (GPS L5, GPS L2C, Galileo), as well as in systems for transmitting differential corrections from geostationary satellites (WAAS, EGNOS).

Convolutional code decoders using the Viterbi decoding algorithm are known, for example, US patents 4.802.174, 4.905.317, 5.432.803, 5.390.198.

The disadvantage of these devices is the inability to form an estimate of the current value of the signal-to-noise ratio at the decoder input.

Closest to the claimed solution is the device according to US patent 4.802.174.

Its disadvantage is the inability to form an estimate of the current value of the signal-to-noise ratio at the decoder input.

The aim of the proposed solution is to eliminate the disadvantages of the known devices.

Disclosure of invention

The goal of the proposed solution is achieved by the fact that an additional channel for measuring the current value of the signal-to-noise ratio is introduced, which can be used to indicate the quality of the communication channel, to generate a signal for re-requesting a data packet in channels with re-request, for selecting a channel with the best quality indicators in multi-channel systems, for synchronizing the decoder, for calculating edge metrics (transition metrics) if the decoding parameters of the distribution of conditional probabilities are taken into account, and for others d.

The proposed device is based on assessing the depth of the decoding history at which all decoding paths converge. This device is different:

- from devices that take into account the difference of the path metrics in that it ensures that the readings are independent of the amplitude of the input signal;

- from devices with direct estimation of the probability of error in the channel (BER monitor), in that it provides a wider range of estimated values, both in the region of large and in the field of small signal-to-noise ratios.

Known Viterbi decoders with a channel for estimating the current signal-to-noise ratio include serially connected:

- unit of calculation of transition metrics,

- block calculation of metrics and memory paths,

- block forming an information symbol,

and also connected to the block for calculating metrics and memory paths:

- memory of minimum path metrics,

- memory of path metrics and

- memory paths, and the input of the device is the input of the unit for calculating transition metrics, and the output is the output of the information symbol generation unit.

The inventive device, in contrast to the known decoders contains

connected in series:

- a unit for evaluating the depth of the decoding history at which all decoding paths converge,

- block signal-to-noise ratio estimation,

the input of the unit for estimating the depth of the decoding history at which all decoding paths converge is connected to the second output of the path memory, and the first output of the unit for evaluating the signal-to-noise ratio is connected to the first control input of the unit for calculating the transition metrics and the control input of the unit for calculating the metrics and path memory , the second output of the signal-to-noise ratio estimator is connected to the second

the control input of the transition metric calculation block is the output

the device to which during its operation a signal is issued corresponding to the assessment of the current signal-to-noise ratio.

Description of drawings

In FIG. 1 shows a structural diagram of the claimed device.

In FIG. Figure 2 shows a variant of the technical implementation of the block for estimating the depth of the decoding history, on which all decoding paths converge (7). In FIG. Figure 3 shows a possible technical implementation of the combinational logic block (7.1.x).

In FIG. 4 shows a variant of the technical implementation of the signal-to-noise ratio estimator (8).

FIG. 5 explains the logic of using the data from the path memory to estimate the depth of the decoding history at which all decoding paths converge, and the order of connecting the inputs of the combinational logic blocks (7.1.x) to the path memory cells (6).

In FIG. Figure 6 shows a graph of the relationship connecting the signal-to-noise bit ratio (Ει Νο) with the average current depth of the decoding history, at which all decoding paths converge, L _t .

The implementation of the invention

Known Viterbi decoders with a channel for estimating the current signal-to-noise ratio can be implemented (Fig. 1) in the form of series-connected:

- unit of calculation of transition metrics (1),

- block calculation of metrics and memory paths (2),

- block forming the information symbol (3).

The following are connected to the block for calculating metrics and memory of paths (2):

- memory of minimum path metrics (4),

- memory of path metrics (5),

- memory paths (6),

moreover, the input of the device is the input of the block of calculation of transition metrics (1), and the output is the output of the block of formation of the information symbol (3).

The inventive device contains serially connected:

- a unit for evaluating the depth of the decoding history at which all decoding paths converge (7),

- unit for evaluating the signal-to-noise ratio (8),

the input of the block for estimating the depth of the decoding history at which all decoding paths converge (7) is connected to the second output (6.B) of the path memory (6), and the first output (8. A) of the block for evaluating the signal-to-noise ratio (8 ) is connected to the first control input (1.A) of the transition metrics calculation unit (1) and the control input of the metrics and path memory calculation unit (2), the second output (8. B) of the signal-to-noise ratio estimation unit is connected to the second control input ( 1.B) block calculation of transition metrics (1) is the output of the device, to which, during its operation, a signal is generated corresponding to the estimate of the current signal-to-noise ratio къ = Eb / No.

An embodiment of the claimed device is a device in which the unit for evaluating the depth of the decoding history, on which all decoding paths converge, (7) is made (Fig. 2) in the form:

- groups (7.1) of combinational logic blocks (7.1.1-7.1.L), the number of which is equal to the decoding depth, and the number of inputs of each block is equal to the number of states of the convolutional encoder M, and

- priority encoder (7.2), the number of inputs of which is equal to the number of blocks of combinational logic (7.1.1-7.1.L),

moreover, the output of each block of combinational logic (7.1.x) is connected to

the corresponding input of the priority encoder (7.2), the input of the block for evaluating the depth of the decoding history at which all decoding paths converge, (7) are the inputs of the combinational logic blocks (7.1.x), and the output is the output of the priority encoder (7.2).

An embodiment of a combinational logic block (7.1.x) based on typical logic elements is shown in FIG. 3.

Another embodiment of the claimed device is a device in which the signal-to-noise ratio estimator (8) (Fig. 4) is made in the form

connected in series:

- averaging block (8.1),

- a block of nonlinear transformation (8.2) and

- threshold device (8.3),

moreover, the output of the threshold device (8.3) is connected to the control input of the averaging block (8.1) and is the first output (8. A) of the signal-to-noise ratio estimator (8), to which a binary signal is issued during its operation, which is a sign of abnormal operation of the decoder, and its second output (8. V) is the output of the nonlinear conversion unit (8.2), to which, during its operation, a signal is generated corresponding to the estimate of the current signal-to-noise ratio.

The claimed device operates as follows (Figure 1).

The set of samples d corresponding to the received packet of channel symbols arrives at the input of the transition metrics calculation block (1), where, based on the adopted implementation of the samples, transition metrics are calculated for all possible states on the trellis diagram taking into account the density of the distribution of conditional probabilities, the variance of which is determined from the estimated value of the signal-to-noise ratio at the input of the decoder fed to input 1.V.

The calculated set of transition metrics is input to the block for calculating metrics and path memory (2), where the matrix of minimum path metrics, the matrix of transition metrics, and the path memory matrix are recalculated in accordance with the Viterbi algorithm.

The conversion results are recorded in the storage devices shown in FIG. 1 blocks: memory of minimum path metrics (4), memory of path metrics (5), memory of paths (6).

The information symbol generating unit (3), based on the data from the path memory blocks (6) and the path metrics memory (5), forms a decision bk on the decoded information symbol, which is the information output signal of the decoder.

In addition, data on the state of each cell of the path matrix stored in this block is read from the path memory block (6) at each decoding step and transmitted to the block for estimating the depth of the decoding history at which all decoding paths converge (7), the diagram of which shown in figure 2.

The block for evaluating the depth of the decoding history at which all decoding paths converge (7) contains a group of combinational logic blocks (7.1) and a priority encoder (7.2).

In the block for evaluating the depth of the decoding history, on which all the paths

decoding converge, (7) binary data corresponding to the contents of the cells of each column of the path matrix are fed to the corresponding inputs of the blocks

combinational logic (7.1.x), where x = 1 ... L, and L is the maximum depth of the decoding history (decoding window), which corresponds to the number of columns in the path matrix.

It is assumed that a binary symbol is stored in the path memory matrix in each cell, corresponding to the current estimate of the information symbol, which brings the decoder to the corresponding state on the trellis diagram.

A possible implementation of combinational logic blocks (7.1.x) based on typical logic devices is shown in Fig.Z.

The input of each block of combinational logic receives data from

corresponding column of the path memory matrix.

The number of inputs of each block of combinational logic coincides with the number states on the trellis diagram and is equal to M = 2 ^K'1 , where K is the length of the code constraint of the codeword used.

At the output of each block of combinational logic (7.1.x), a logical “0” is generated if all binary characters in the corresponding column of the path matrix are the same, and a logical “1” if at least one character is different from the others.

This operation is illustrated by the circuit shown in Fig.5.

The number of combinational logic blocks is equal to the maximum allowed depth of the decoding history, (the number of columns of the path memory matrix) L, while for definiteness, combinational logic block 7.1.1 corresponds to the minimum depth of decoding history 1, and combinational logic block 7.1.L corresponds to the maximum depth of decoding history L .

As can be seen from this figure, the current depth of the decoding history at which all decoding paths converge can be determined by determining

the maximum block number of combinational logic (7.1.x) (leftmost), at the output of which there is a logical "1".

This operation is performed by the priority encoder (7.2), which selects the logical “1” in the highest bit of the parallel code generated by the outputs of the combinational logic blocks (7.1.x), and generates a binary code corresponding to the binary number of this bit, which determines the current decoding history depth, by which all decoding paths converge, L _t .

Priority encoder (7.2) can be implemented, for example, on the basis of the integrated circuit K555IVZ (foreign analogue 74147).

The signal from the output of the priority encoder, which is the output signal of the block for estimating the depth of the decoding history at which all decoding paths converge, is fed to the input of the block for evaluating the signal-to-noise ratio (8), which contains

the averaging unit (8.1), the nonlinear conversion unit (8.2) and the threshold device (8.3) are connected in series.

Moreover, the output of the threshold device (8.3) is connected to the control input of the averaging block (8.1).

The implementation diagram of the unit for evaluating the signal-to-noise ratio (8) is shown in FIG. 4.

The averaging block (8.1) averages over a given time interval the generated estimate of the depth of the decoding history, on which all paths

decoding converge.

The value of the averaging interval is usually selected more than the maximum depth of decoding history L.

The nonlinear conversion block (8.2) converts the signal generated at the output of the averaging block (8.1) into a signal corresponding to the current value

signal to noise ratio.

An example of the amplitude characteristic of the non-linear transformation block (8.2) obtained on the basis of computer simulation for a convolutional code with a speed of R = \ / 2 and a code constraint of K = 7 is shown in FIG. 6.

This characteristic allows the measured depth of the decoding history at which all decoding paths converge, L _{t to} determine the corresponding signal-to-noise ratio at the decoder input.

This dependence can be obtained experimentally or based on

simulation for each type of decoder.

The threshold device (8.3) generates a logic level “1” at its output, if the value of the signal-to-noise ratio at its input is lower than a predetermined threshold, if the signal-to-noise ratio is higher than the threshold, then the output of the threshold device (8.3) logical level “0” will be generated.

Thus, the fact of a critically great depth of history is recorded.

decoding, on which all decoding paths converge, indicating either the appearance of errors, the multiplicity of which exceeds the corrective ability of the code, or incorrect synchronization.

The signal from the output of the threshold device (8.3) is fed to the control input of the averaging block (8.1), where in the case of a logic level “1”, the averaging block (8.1) is reset at this input and its output signal is set to zero.

At the same time, the signal from the output of the threshold device (8.3) is fed to the first output (8. A) of the signal-to-noise ratio estimation unit (8) and then to the first control input (1.A) of the transition metrics calculation unit (1) and to the control input of the block calculation of metrics and memory paths (2).

The unit for calculating the transition metrics (1) at the logical level “1” at the first control input (1.A), in order to ensure synchronization, skips one sample in the input stream.

The block for calculating metrics and path memory (2) at level “1” at its control input initializes (sets to zero) the values in the memory of minimum path metrics (4), in the memory of path metrics (5), and in the path memory

decoding (6). Then the decoding procedure starts again.

It is also possible to use the signal from the first output (8.A) of the signal-to-noise ratio estimator (8) by external units, for example, to fix that the current and a number of subsequent bits from the decoder output are incorrect.

The signal from the output of the nonlinear conversion unit (8.2) corresponds to the current estimate of the signal-to-noise ratio at the decoder input and is fed to the second output (8. В) of the signal-to-noise ratio estimation unit and then to the second control input (1.В) of the metrics calculation unit transitions (1).

In this case, the calculation of transition metrics is carried out taking into account the density

probability distribution, the variance of which is determined based on the estimated value of the signal-to-noise ratio at the decoder input.

In addition, an estimate of the current signal-to-noise ratio can be used by other external units of the receiving device to optimize the reception procedure.

The claimed solution allows you to form an estimate of the current value of the signal-to-noise ratio at the decoder input, which eliminates the disadvantages of the known devices.

Claims

Claim

1. Viterbi decoder with a channel for evaluating the current signal-to-noise ratio, including serially connected:

- unit of calculation of transition metrics,

- block calculation of metrics and memory paths,

- block forming an information symbol,

as well as connected to the unit for calculating metrics and memory paths

- memory of minimum path metrics,

- memory of path metrics and

- path memory, wherein the decoder input is the input of the transition metrics calculation unit, and the first output is the output of the information symbol generation unit, characterized in that it contains in series:

- block signal-to-noise ratio estimation,

the input of the block for estimating the depth of the decoding history at which all decoding paths converge is connected to the second output of the path memory, and the first output of the block for evaluating the signal-to-noise ratio is connected to the first control input of the block of metrics for transitions and the control input of the block for calculating metrics and memory , the second output of the signal-to-noise ratio estimator is connected to the second

the control input of the transition metric calculation unit is the second output of the decoder, to which, during its operation, a signal is inserted that corresponds to the estimate of the current signal-to-noise ratio.

2. The decoder according to claim 1, characterized in that the unit for evaluating the depth of the decoding history, on which all decoding paths converge, is made in the form:

- combinational logic blocks, the number of which is equal to the decoding depth, and the number of inputs of each block is equal to the number of states of the convolutional encoder, and

- priority encoder, the number of inputs of which is equal to the number of blocks of combinational logic,

wherein the output of each block of combinational logic is connected to the corresponding input of the priority encoder, the input of the block for estimating the depth of the decoding history, on which all decoding paths converge, are the inputs of the combinational logic blocks, and the output is the priority encoder output.

3. The decoder according to claim 1, characterized in that the unit for evaluating the signal-to-noise ratio is made in the form of series-connected:

- averaging unit,

- a block of nonlinear transformation and

- threshold device

moreover, the output of the threshold device is connected to the control input of the averaging unit and is the first output of the signal-to-noise ratio estimation unit, to which a binary signal is transmitted during its operation, which is a sign of an abnormal operation of the decoder, and its second output is the output of the nonlinear conversion unit, to which a signal is generated that corresponds to an estimate of the current signal-to-noise ratio.