WO2009143237A1

WO2009143237A1 - Enhancement of detection of defects on display panels using front lighting

Info

Publication number: WO2009143237A1
Application number: PCT/US2009/044667
Authority: WO
Inventors: Daniel Toet; Lloyd Jones; Atila Ersahin; Jun Myungchul; Savier Pham; Sam Soo Jung
Original assignee: Photon Dynamics Inc.
Priority date: 2008-05-21
Filing date: 2009-05-20
Publication date: 2009-11-26
Also published as: JP5520289B2; KR20110015633A; CN102037371B; KR101610821B1; JP2011521264A; TW201003063A; CN102037371A; TWI497060B

Abstract

Front-side illumination apparatus and methods are provided to enable, in general, detection of a-Si residue defects at the array test step well before the cell step. a-Si has high resistivity without exposure to light making it difficult to detect in conventional TFT-array test procedures. On the other hand, when the a-Si residue is illuminated with a light, its resistivity decreases, which, in turn, changes the electrical properties of the TFT array cell, which may be detected using the voltage imaging optical system (VIOS). In one implementation, the TFT array cell is exposed to illuminating light pulses, impacting the top side of the TFT panel during the testing performed using the VIOS. In one implementation, the front side illumination is traveling along the same path as the illumination used for voltage imaging in the VIOS. In another implementation, light source(s) for front side illumination are located in the close proximity to the VIOS modulator.

Description

ENHANCEMENT OF DETECTION OF DEFECTS ON DISPLAY PANELS USING

FRONT LIGHTING

DESCRIPTION OF THE INVENTION

Cross-Reference to Related Application

[0001] This application is based on and claims the benefit of priority under 35

U.S.C. 119 from provisional U.S. patent application No. 61/055,031 , filed on May 21 ,

2008, the entire disclosure of which is incorporated by reference herein.

Field of the Invention

[0002] This invention relates to detection of defects within flat panel displays and more specifically to detection of defects within flat panel displays using front side illumination.

Description of background Art

[0003] During the manufacturing of flat panel liquid crystal (LC) displays, large clear plates of thin glass are used as a substrate for the deposition of thin film transistor (TFT) arrays. Usually, several independent TFT arrays are contained within one glass substrate plate and are often referred to as TFT panels.

Alternatively, an active matrix LCD, or AMLCD, covers the class of displays utilizing a transistor or diode at every pixel or subpixel, and therefore such glass substrate plates may also be referred to as AMLCD panels. Flat panel displays may also be fabricated using Organic LED (OLED) technologies and, though typically fabricated on glass may also be fabricated on plastic substrate plates.

[0004] TFT pattern deposition is performed in a multitude of stages where in each stage, a particular material (such as a metal, indium tin oxide (ITO), crystalline silicon, amorphous silicon, etc.) is deposited on top of a previous layer (or glass) in conformity with a predetermined pattern. Each stage typically includes a number of steps such as deposition, masking, etching, stripping, etc.

[0005] During each of these stages and at various steps within each stage, many production defects may occur that may affect the electrical and/or optical performance of the final LCD product. Such defects include but are not limited to metal protrusions 110 into ITO 112, ITO protrusions 114 into metal 116, so-called mouse bites 118, open circuits 120, shorts 122 in transistors 124, foreign particles 126, and residue under pixel 128, as shown in Figure 1. Amorphous silicon (a-Si) residue under a pixel 128 may result from under-etching or lithography issues. Other defects include mask problems, over etching, etc.

[0006] Even though the TFT deposition processes are tightly controlled, defect occurrence is unavoidable. This limits the product yield and adversely affects production costs. Typically, the TFT arrays are inspected using one or multiple automated optical inspection (AOI) system(s) following critical deposition process steps and an electro-optical inspection machine, such as those produced by Photon Dynamics, Inc. of 5970 Optical Court, San Jose, California, 95138, USA (an Orbotech company) and also referred to as array tester or array checker (AC) to test the finished TFT arrays.

[0007] The a-Si defect is a particularly troublesome defect because it is photosensitive; that is, it acts as an insulator in a dark state but acts as a conductor when exposed to light. As a matter of fact, its sheet resistance Rsi decreases as a function of light intensity. Figure 4 illustrates the dependency. The sheet resistance dependency on light intensity thus means that with varying exposure to light, the pixel voltage change due to the defect may also vary. Thus, if the defect is not detected before the completion of the final FPD assembly, the end user will easily notice the defect since it is exposed to the display's backlight during normal FPD operation. Thus, there is strong motivation to detect such defects. [0008] Unfortunately, the conventional technology fails to provide a suitable methodology for effective detection of defect-forming a-Si residue on LCD panels during various stages of panel fabrication.

SUMMARY OF THE INVENTION

[0009] The inventive methodology is directed to methods and systems that substantially obviate one or more of the above and other problems associated with detecting a defect-forming a-Si residue in LCD panel displays. [0010] In accordance with one aspect of the inventive methodology, there is provided a system for detecting defects in a panel under test. The system incorporates a front side illumination subsystem configured to deliver a front side illuminating light beam onto the panel under test. The front side illuminating light beam has the capability to alter electrical properties of the defects to facilitate detection of the defects. The system further incorporates a detection subsystem configured to detect the defects based on the altered electrical properties of the defects. The front side illuminating light beam used in the system is pulsed and optimized for duration and intensity to maximize the detection of the defects and minimize the detection of false defects. Further, the front side illuminating light beam has a wavelength matching maximum absorption optical properties of the defects. [0011] In accordance with another aspect of the inventive methodology, there is provided a system for detecting defects in a panel under test. The system incorporates a front side illumination subsystem configured to deliver a front side illuminating light beam onto the panel under test. The front side illuminating light beam has the capability to alter electrical properties of the defects to facilitate detection of the defects. The system further incorporates a detection subsystem configured to detect the defects based on the altered electrical properties of the defects. The aforesaid detection subsystem includes a voltage imaging optical device configured to create an image indicative of a spatial voltage distribution across the panel under test. The defects in the panel under test are detected based on the created image. In the system, the front side illumination subsystem is integrated within an optical path of the voltage imaging optical device. Furthermore, the front side illuminating light beam has a wavelength matching maximum absorption optical properties of the defects.

[0012] In accordance with yet another aspect of the inventive methodology, there is provided a system for detecting defects in a panel under test. The system incorporates a front side illumination subsystem configured to deliver a front side illuminating light beam onto the panel under test. The front side illuminating light beam has the capability to alter electrical properties of the defects to facilitate detection of the defects. The system further incorporates a detection subsystem configured to detect the defects based on the altered electrical properties of the defects. The aforesaid detection subsystem includes a voltage imaging optical device configured to create an image indicative of a spatial voltage distribution across the panel under test. The defects in the panel under test are detected based on the created image. The aforesaid front side illumination subsystem is disposed outside an optical path of the voltage imaging optical device. Furthermore, the front side illuminating light beam has a wavelength matching maximum absorption optical properties of the defects.

[0013] Additional aspects related to the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Aspects of the invention may be realized and attained by means of the elements and combinations of various elements and aspects particularly pointed out in the following detailed description and the appended claims.

[0014] It is to be understood that both the foregoing and the following descriptions are exemplary and explanatory only and are not intended to limit the claimed invention or application thereof in any manner whatsoever.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings, which are incorporated in and constitute a part of this specification exemplify the embodiments of the present invention and, together with the description, serve to explain and illustrate principles of the inventive technique. Specifically:

[0016] Figure 1 shows a variety of non-periodic defects in a top view of a portion of a large flat patterned medium with periodic transistor arrays. [0017] Figure 2 shows an exemplary cross section of an amorphous silicon residue.

[0018] Figure 3 illustrates an exemplary equivalent circuit diagram for the a-Si residue with respect to the TFT pixel.

[0019] Figure 4 is a sample graph of dependence of the sheet resistance on the incident light wavelength.

[0020] Figure 5 is an exemplary schematic diagram of a dual wavelength illuminator (DWI) in accordance with an embodiment of the inventive concept. [0021] Figure 6 is an exemplary schematic diagram of the modulator mount illuminator (MMI) in accordance with another embodiment of the inventive concept. [0022] Figure 7 illustrates an exemplary schematic block diagram of the inventive system for detection of defects within flat panel displays.

[0023] Figure 8 is an exemplary graph representing a typical absorption curve for amorphous silicon.

[0024] Figure 9 is an example of a possible front light and pixel pattern driver timing diagram.

[0025] Figure 10 is another example of a possible front light pattern in which pulse is different for every frame of a given driving pattern.

[0026] Figures 11 A and 11 B are plots of defect detection sensitivity (DDS) and signal-to-noise ratio (SNR) as a function of front light pulse end time for varying pulse start times and pulse intensities.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS [0027] In the following detailed description, reference will be made to the accompanying drawing(s), in which identical functional elements are designated with like numerals. The aforementioned accompanying drawings show by way of illustration, and not by way of limitation, specific embodiments and implementations consistent with principles of the present invention. These implementations are described in sufficient detail to enable those skilled in the art to practice the invention and it is to be understood that other implementations may be utilized and that structural changes and/or substitutions of various elements may be made without departing from the scope and spirit of present invention. The following detailed description is, therefore, not to be construed in a limited sense. Additionally, the various embodiments of the invention as described may be implemented in the form of a specialized hardware, or combination of software and hardware. [0028] As would be appreciated by those of skill in the art, the array tester may identify defects in LC displays through use of a voltage imaging test apparatus and method as described, for example, in U.S. Patents 4,983,911 , 5,097,201 , and 5,124,635, incorporated herein by reference in their entirety. The pixels within the LC display are electrically driven using specific patterns, as described, for example, in U.S. Patents 5,235,272 and 5,459,410, incorporated herein by reference in their entirety. Because LC displays are comprised of an array of pixels, when the LC display is driven electrically, some pixels associated with defects may behave electrically differently than the normal pixels, and thus such differences may be detected using a voltage imaging sensor and associated image processing software. Through the use of combinations of different driving patterns, the type and location of many of the defects illustrated in Figure 1 may be deduced.

[0029] However, the defective pixel with a-Si residue 128 under ITO, is quite difficult to detect at array test using standard array test methods. A cross-section of an example of a TFT pixel 200 with a a-Si defect is shown in Figure 2. The TFT pixel structure 200 is formed on a glass plate 202. The gate insulator 204 is placed on the glass, a data metal line 206 may then be plated, and the pixel feature in the form of a transparent conductive material such as indium tin oxide (ITO) 210 is then deposited. Finally a passivation layer such as silicon nitride (SiNx) 208 is deposited. Amorphous silicon or data metal residue 212 may remain, and is graphically represented by an extension of the line feature which then falls beneath the ITO layer. The area of overlap 214 between the residue 212 and pixel (ITO) 210 forms a capacitor 216 having parasitic capacitance Cp.

[0030] Figure 3 is an equivalent diagram of a-Si residue under a pixel. In this case, Cp = ksιN*εo*Area_residue/dgate SIN Equation 1

Cst = ksιN*εo*Wp_lχeiWst/dp_assSlN Equation 2 where C_p is the parasitic capacitance, ksi_N is the dielectric constant of SiN, ε₀ is the permittivity constant in air, W_PιXeι is the width of the pixel while W_st is the width of the storage capacitor (with capacitance Cst), d_paSsSιN and d_gat_{e SI}N are the thicknesses of the passivation layer and gate-to-SiN layer respectively, and Area_reSι_du_e is the area of the residue defect under question.

[0031] At array test, a driving voltage is applied to the LC plate and the pixel responses may be observed by a voltage imaging sensor. For defects such as data metal residue and a-Si, the positive-negative (PN) driving pattern, in which the data voltage is dropped to negative before image acquisition, may be used. In this pattern, the drop of the data voltage induces a voltage drop on pixel with the ITO- data line overlap. If the data voltage drop is ΔV_d then pixel voltage drop, ΔV_P, may be expressed as follows.

AV_p = AV_d [Equation 3]

where C_p is the parasitic capacitance of ITO-data line residue overlap and C_st is the capacitance of storage capacitor, and Rsi is the sheet resistance of the amorphous silicon.

[0032] Equations 1 and 3 reveal two key points regarding the a-Si defect.

First, the parasitic capacitance is a function of the size of the defect (Area_reSιdu_e)- Second is the exponential dependency on the sheet resistance Rs,. In the insulator state (no light), Rs, may be very high (on the order of hundreds of giga-ohms per square), and thus by Eq. 3, with no exposure to light, ΔV_P is approximately equal to ΔV_d ^*(C_p/C_st) and has maximum value. Because C_p < C_st, the maximum ΔV_P with no exposure to light may be quite small, and thus the defects may not be easily detectable without availability of light. Depending on the overlap area, the variation may result in a shift of a few gray levels under a conventional 64 gray level driving scheme. The voltage step between two consecutive gray levels is approximately 5OmV. This is too small to differentiate a defect from a normal pixel. [0033] Further, however, because of the size dependency (Equation 1), it is possible that even with exposure to light, very small a-Si defects may not be detectable.

[0034] While some a-Si defects may be found using AOI, and some can be detected using AC with conventional defect detection technologies, a significant percentage of such defects is not identified early on and are only detected after the TFT-LCD cell assembly has been completed, well after the LC plate has been divided into panels and assembled into modules. In cell test, a backlight module provides light source for TFT-LCD panel to display image, while it is driven electrically. The photosensitive property of a-Si makes it possible to detect this defect under these conditions. However, it is desirable to catch the defects well before the cell assembly step, and more preferably at the array inspection step, because the residue can be relatively easily removed using a laser repair system. In addition, detecting the defects at the early stage of the manufacturing process and prior to the cell assembly saves the costs associated with assembly process and with the required color filter glass.

[0035] LCD array inspection equipment in general does not have an external light source, and thus detection of a-Si residue can be difficult. The AC47xx product family of array testers manufactured by Photon Dynamics, Inc. (Acquired by Orbotech Ltd.) incorporates a short wavelength backlight that is used in conjunction with a transparent chuck on a split axis-type system, in which the inspection area, and thus the chuck, is limited to a single modulator row. However, in gantry type systems in which the chuck covers the entire glass size, the associated backlight would also be required to cover the entire glass size either by moving (for example, a single line) or statically (for example, full coverage), and thus may be less practical nor cost effective.

[0036] For some cases in which a-Si residue cover the gate metal in the TFT, backlighting cannot penetrate the gate feature and thus detection of a-Si on gate residue is difficult. This is a frequent defect in some pixel designs having redundant TFTs, and more specifically in those cases in which the redundant TFT is electrically isolated and not connected to the pixel. When a-Si residue bridges the pixel TFT and redundant TFT, it affects performance and therefore is considered a defect. The a-Si residue increases C_gd (gate-drain parasitic capacitance). The pixel voltage drops when the gate is turned off (voltage swing: ΔV_g) due to the gate-drain capacitor coupling effect. This is called kick-back effect. The pixel voltage drop ΔV_P can be expressed as

ΔV_P = ΔV_g ^* Cgd / (Cg_d+Cst+Cic). [Equation 4] where C|_C is the cell capacitance (only present in the case of cell driving). The a-Si residue on a gate which connects pixel TFT to redundant TFT increases gate-drain capacitance, which also increases pixel voltage drop.

[0037] Other non-voltage imaging array testers, for example, testers using electron beams, may detect a-Si residue by spraying the defect with electrons, which then accumulate in the defect region. This accumulation of electrons increases the a- Si conductivity such that the associated imaging methods may detect the defect. [0038] In accordance with one embodiment of the present invention, front-side illumination apparatus and methods are provided to enable, in general, detection of a-Si residue defects at the array test step well before the cell step, and in particular, detection of a-Si residue on gate insulator of a TFT array cell. As would be appreciated by persons of skill in the art, in a TFT-array test, a-Si has high resistivity without exposure to light. On the other hand, when the a-Si residue is illuminated with a light, its resistivity decreases, which, in turn, changes the electrical properties of the TFT array cell, which may be detected using the voltage imaging optical systems (VIOS), such as those produced by Photon Dynamics, Inc. of 5970 Optical Court, San Jose, California, 95138, USA (an Orbotech Company). An exemplary embodiment of such system is described in detail in the aforesaid U.S. Patents 4,983,911 , 5,097,201 , and 5,124,635, which are incorporated herein by reference in their entirety. Accordingly, in one embodiment of the invention, the TFT array cell is exposed to illuminating light pulses, impacting the top side of the TFT panel during the testing performed using the VIOS.

[0039] In accordance with one embodiment, the front side illumination is traveling along the same path as the illumination used for voltage imaging in the VIOS. In one embodiment, the VIOS illumination is performed in the red portion of visible wavelength range. In one specific implementation, the exemplary light wavelength is 630nm. In accordance with another embodiment, the front side illumination is comprised of one or two wavelengths and is delivered at the periphery of the voltage image modulator of the VIOS.

[0040] In one embodiment of the invention, the implementation of top side or front side illumination into a flat panel array tester is accomplished in concert with the VIOS testing apparatus and its functionality. This results in cost savings and increased efficiency of the overall testing system, because several components of the VOIS column are being used for both front side illumination as well as VIOS imaging. In particular, because the ability to detect the defect of interest (a-Si) is a function of light intensity, the front side illumination of the TFT cell must be suitably uniform and repeatable over the detection areas of interest. Further, the illumination and optical apparatus for the detection of a-Si must not interfere with the functionality of the VIOS tester in its search for other types of defects that can occur in the TFT cell and some of which have been described hereinabove. [0041] In one embodiment of the invention, there is provided a system configured to produce a front side illumination of the LCD structures on the panel under test during LCD array testing with the purpose of facilitating the detection of photosensitive manufacturing defects, such as remaining a-Si residue on the structures, such as on the gate structure or attached to the data line, of the LCD pixels. In an embodiment of the inventive system, the front side of the panel is illuminated with a light having a wavelength different from the wavelength of the light used in the VIOS for voltage imaging. This is done for al least several reasons. Firstly, the light used in the VIOS illumination may have a wavelength that may not allow efficient detection of a-Si residue and/or other photosensitive defects. Second, the design of the modulator of the VIOS is such that the light used in the VIOS for voltage imaging is almost completely reflected by the pellicle of the aforesaid modulator and, therefore, never reaches the panel. Accordingly, the light for the front side illumination is chosen such that it activates (changes electrical properties) of the a-Si residue and is transmitted by the pellicle.

[0042] Finally, the overall system includes means (low pass filter 510 shown in

Figure 5) for separating these two light beams and preventing the light used for front side illumination from interfering with the VIOS imaging, which uses the aforesaid difference in the respective light wavelengths.

[0043] A diagram illustrating an exemplary embodiment of the inventive dual wavelength optical illumination system 500 is presented in Figure 5. This exemplary diagram is provided only for illustrative purposes and should not be considered to be limiting the scope of the invention in any way. As shown in Figure 5, for use in combination with a voltage imaging optical system (VΙOS)-based array inspection and test system, a dual wavelength illuminator 512 (DWI) is placed in the optical column of the VIOS illuminator. The construction of the VIOS illuminator is described, for example in US patent 5,124,635, incorporated herein in its entirety. [0044] As shown in Figure 5, the dual wavelength illuminator 512 couples a blue light 504 (for example, having wavelength 455 nm, to which the a-Si defect is particularly sensitive) generated by the blue light illuminator 502 into the same optical path as the visible light 505 (for example, having wavelength 630 nm), generated by the red light illuminator 501 , which is used for defect imaging. Specifically, Figure 8 shows the typical light absorption curve 801 of a-Si, which indicates that the light having wavelength 455 nm (802) has the highest absorption coefficient for a-Si.

[0045] The aforesaid coupling of the two light beams of different wavelength is accomplished within the dual wavelength illuminator 512 through the use of a dichroic mirror (beam splitter) 503, which substantially transmits the blue light beam 504 and substantially reflects the red light beam 505 to produce the combined light beam having both wavelengths. As would be appreciated by those of skill in the art, the coupling of the light beams of different wavelengths may be achieved in many other ways, some of which are described below with reference to other embodiments of the invention. Therefore, the particular design of the dual wavelength illuminator 512 shown in Figure 5 should not be considered limiting in any way. [0046] Turning back to the system shown in Figure 5, after passing the dichroic mirror (beam splitter) 503, the collinear blue and red light beams are reflected by the beam splitter 506 and pass through the lens assembly 507, which is provided to achieve the desired illumination distribution pattern on the optical modulator 508 and the panel under test 509.

[0047] As mentioned before, in various additional or alternative embodiments of the invention, the dual-wavelength, collinear illumination of the modulator 508 and the panel under test 509 can be achieved in several different ways. For example, in one embodiment, multi-wavelength light emitting diodes (LED), for which wavelength selection may be limited, may be employed. In this configuration, only one illuminator employing the aforesaid multi-wavelength light emitting diodes needs to be employed in place of, for example, the light source 502, while the second light source 501 and the dichroic mirror 503 can be excluded from the illumination system.

[0048] In yet an alternative embodiment, single wavelength red LEDs may be spatially interspersed with single wavelength blue LEDs in a single light source, which may be used, again in place of the light source 502. Again, in this configuration, the second light source 501 and the dichroic mirror 503 need to be excluded from the illumination system. It should be noted, however, that in such configuration using interspersed LEDs of two different wavelengths, the uniformity of the illumination may be compromised.

[0049] In one embodiment, the VIOS modulator 508 is provided with a pellicle

515, which is positioned on the surface of the modulator 508 in the close spatial proximity of the tested LCD structures of the panel under test. The pellicle 515 possesses optical properties specially selected such that the red light generated by the illuminator 501 is being reflected by it, but the blue light generated by the illuminator 502 is being transmitted by the pellicle 515. The modulator 508 modulates the intensity of the red light reflected by the pellicle 515 based on the distribution of electric potential across the top (in the Figure 5) surface of the panel under test 509, which is placed in the close spatial proximity to the pellicle of the modulator 508. After reflection by the pellicle, the modulated red light passes through the lens assembly 507, beam splitter 506 and the low pass filter 510. After passing the filter 510, the reflected red light impinges on the photo sensitive elements of the CCD device 511 , which is used to create an image of the panel under test. To prevent any blue light, which is used for illuminating the a-Si residue, from interfering with the CCD image sensor 511 of the VIOS, the CCD device 511 is provided with a low pass filter 510. This filter has optical transmission characteristics designed to greatly attenuate the blue light and to allow the red light pass through without attenuation. This prevents the front side illuminating blue light from reaching the CCD device 511 and interfering with the created image of the electrical potential on the top surface of the panel under test 509. It should be noted that in one embodiment of the invention, the blue light is only used for modifying the electrical properties of the a-Si residue in order to make it more easily detectable by, for example, the VIOS and not to produce an image of the defect itself. [0050] The tested LCD structures on the surface of the panel under test 509 are biased using a voltage source 513, while the top (on Figure 5) surface 516 of the modulator 508 is biased using the voltage source 514. In an embodiment of the invention, all the optical components of the system are provided with suitable optical coatings for best light transmission and reflection. It should be noted that the uniformity of illumination by the light of both wavelengths (blue and red) will be similar, and, typically, in one embodiment of the invention, no worse than approximately 25%. A typical uniformity of illumination ranges between 10% and 15%. Thus, the inventive dual wavelength illumination concept and the arrangement shown in Figure 5 allows a-Si defects to be illuminated at wavelengths to which they are most sensitive, but without degradation or interference with the voltage imaging test (VIOS) hardware's functionality.

[0051] It should be noted that the present invention is not limited to illumination of the modulator and the panel under test by only red and blue light. As would be appreciated by persons of skill in the art, another wavelength of the illuminating light may be selected to achieve suitable absorption by the a-Si residue, in order to sufficiently change its electrical properties to enable detection, and to reduce the interference of the front side illumination with the operation of the VIOS, which is used to recreate a voltage distribution pattern across the panel under test. [0052] In accordance with a second, alternative, embodiment of the inventive dual wavelength illuminating concept, illustrated in Figure 6, and also for use in combination with a VIOS-based array inspection and testing system, a ring illuminator 601 is incorporated into the modulator mount 600. The ring illuminator 601 is installed above the modulator 508 and the single wavelength (blue or approximately 455 nm wavelength) light sources 603, such as LEDs, are located outside the optical path of the VIOS illuminator to prevent image clipping. As in the first embodiment described above, the pellicle of the modulator 508 (not shown) transmits the blue light and reflects the light of visible wavelength generated by the red illuminator 501 , and which is required for the functionality of the voltage imaging modulator 508. The light sources 603 create illumination pattern 604. In an exemplary embodiment of the invention, each side of the mounting ring 601 carries 4 LEDs 603. However, one of ordinary skill in the art would appreciate that any other suitable number of LEDs, spaced on the mounting ring 601 in any appropriate manner, may be used to achieve desired intensity and uniformity of the illumination. Therefore, the invention is not limited to the shown arrangement of the illuminator ring 601 , the modulator mount 600 and the light sources 603. In various embodiments of the invention, the illuminator ring 601 has a square, rectangular, octagonal, circular, oval or other appropriate shape. The light generated by the light sources 603 passes through the modulator 602 and illuminates the front surface of the panel under test in order to affect the electrical properties of the a-Si residue on the panel under test.

[0053] As would be appreciated by those of skill in the art, depending on the size of the area of the modulator 508, in some cases, especially when the number of LEDs 603 is relatively small, it may be more difficult to achieve good uniformity in this embodiment as compared to the dual wavelength illuminator (DWI) embodiment described with reference to Figure 5. However, increasing the number of the LEDs 603 to more than 10 per side (more than 40 total) facilitates greater uniformity of the illumination and uniformity characteristics comparable to the ones achieved by the dual wavelength illuminator (DWI) embodiment described with reference to Figure 5 may be achieved. For best uniformity across the full extent of the modulator area, the emission angle of the LEDs must be controlled. As is well known in the art, some LEDs have Lambertian emission profiles, and thus emit in a very large solid angle, which is detrimental to the desired goal of achieving high degree of illumination uniformity, because more light is disproportionally sent to the center of the modulator. There are several alternative solutions that may be employed to overcome this shortcoming. In one embodiment, special directional LEDs are utilized as light sources 603 and directed to illuminate the innermost portion of the modulator 508.

[0054] In an alternative embodiment, collimating lenses are added, or preferably optically coupled, to each general LED to contain the spread of the Lambertian profile. Various methods for optical coupling of collimating lenses to LEDs are well known in the art. In one embodiment, each LED is equipped with its own collimating lens. Such collimating lenses facilitate enhanced uniformity of the front side illumination. In a further embodiment, directional attenuation is applied by adding a neutral density filter on the side of the LED. In addition, diffusers can be used to (1) smooth out the spatial inhomogeneities of each LED and (2) improve overall illumination uniformity of the combined LED distribution. For example, in one embodiment, diffusers manufactured and sold by Luminit, of Torrance, California, USA (a Physical Optics Corporation company) can be utilized. [0055] In one embodiment, beam shaping diffusers that produce elliptical radiation distributions may be used to improve the front side illumination uniformity. In the same or different embodiment, the front side illumination uniformity may be also improved by utilizing a light bending or direction turning film. [0056] The main advantage of the multiple light source configuration shown in

Figure 6, wherein the light sources 603 providing the front side illumination of the a- Si residue on the surface of the panel under test 509 are mounted on a separate mounting ring disposed in a vicinity of the modulator 508 over the dual wavelength illuminator system of Figure 5, wherein the second light source is integrated into the VIOS column itself, is that the formed is easier and cheaper to retrofit on existing gantry-type systems. Furthermore, the inventive concept illustrated in Figure 6 could be applied to defect detection techniques that require uniform peripheral illumination (such as electron beam-based detectors and possibly also full contact probe testers). It should be noted, however, that as indicated before, electron beam detectors are not compatible with blue light irradiation.

[0057] As would be appreciated by those of skill in the art, the system configuration for providing front side illumination involving disposing light sources in the vicinity of the modulator may be achieved in many ways other than the embodiment shown in Figure 6. Therefore, the particular design of the illuminator system shown in Figure 6 should not be considered limiting in any way. [0058] Figure 7 illustrates an exemplary schematic block diagram of the system 700 for detection of defects within flat panel displays, which employs one of the embodiments of the inventive concept. The inventive system incorporates the VIOS 702, which includes dual wavelength illuminator 703, an exemplary embodiment of which was described above with reference to Figure 5 (element 512). The light beam of a first wavelength, for example blue light, generated by the illuminator 703 is directed onto the LCD panel 701 , which is installed on a glass support. The light beam of a second wavelength generated by the illuminator 703, for example red visible light, is directed onto the modulator 705, which operates to translate the electric fields on the biased LCD panel under test into spatially modulated light signal via an electro-optical transducer (the modulator), which is reflected by the pellicle (not shown) of the modulator 705. The reflected light is focused by the lens system 704 onto the CCD device 711 , which creates the image of the area of LCD panel under test in the reflected red light, the created image being indicative of the distribution of electric potential across the panel under test 701. The exemplary system 700 may further include image acquisition/image processing PC 709, which is configured to receive the image data from the CCD device 711 , generate the image of the panel under test using the received image data and to process the generated image to identify the defective LCD cells, including the location of such defective cells on the panel under test. The location information of the defects can be recorded for further processing, such as for correction of the detected defects.

[0059] In one embodiment of the invention, the VIOS 702 is mounted on a movable X/Y/Z stage assembly 706, which is movable under control of the stage/IO control module 707. In an embodiment of the invention, more than one VIOS 702 is mounted on the same XΛ7Z stage 706 such that different regions of the panel under test are being inspected simultaneously using different VIOS 702. [0060] Finally, the test signal pattern generator 710 is disposed to provide the driving voltage pattern to the LCD panel under test, to control the illuminator trigger and to provide the necessary bias voltage to the modulator.

[0061] It should also be noted that in an embodiment of the invention, the front light illumination system can be fully integrated in the VIOS subsystem and is not restricted in any way by the detection technique described above, providing optimal absorption efficiency and irradiation uniformity. The front light illumination technique illustrated in Figure 6 may also be adapted for use in an electron-beam based detection system. However, the irradiation uniformity should be especially good for the dual wavelength illuminator design, described above and illustrated in Figure 5, in which the blue light used for a-Si activation follows the same optical path to the modulator as the main VIOS illuminator light. [0062] In one specific embodiment of the invention, the front side illumination is pulsed and optimized for duration and intensity to maximize the detection of the photosensitive defects relative to the TFT pixels. In particular, the front side illuminating light has a wavelength that matches maximum absorption optical properties of the photosensitive defects. In one specific embodiment, the blue light with wavelength less than 470nm is utilized for front side illumination of the a-Si residue.

[0063] In an embodiment of the invention, for optimal front light efficiency, the wavelength used to increase the conductivity of the amorphous silicon residue is selected to match the absorption properties of the material. Typically, a-Si has an absorption edge in the low wavelength (blue light) range, see curve 801 in Figure 8. For larger wavelengths (lower energies), the absorption decreases sharply, while for shorter wavelengths, the absorption is more or less unchanged. It should be noted that electron-beam-based defect detection is incompatible with the use of blue light, since it induces significant amounts of noise in the secondary electron detector it uses to measure pixel voltages. There are two reasons for this. First, photons with short wavelengths such as blue light are more energetic than photons having red wavelength, and therefore produce more unwanted, noise signal when they strike the scintillator-photomultiplier detector required to detect electrons. Second, since the energy of the secondary electron into the detector can be affected by collision of the electron and photon, there can be a higher variation in signal, contributing to overall noise.

[0064] Amorphous silicon is photosensitive to short-wavelength light, and thus, mobile photoelectrons are generated after irradiation, causing increase in the conductivity of a-Si defect. In some embodiments, a blue light having a wavelength of 470 nm (or shorter) is chosen because, in part, it has a relatively higher power, is more efficiently absorbed in a-Si, and has a lower sheet resistance. Figure 4 illustrates two plots of sheet resistance as a function of light intensity for two different wavelengths, 470 nm (plot 401) and 530 nm (plot 402). It can be seen from the plots that the shorter of the two wavelengths (401) decreases resistance more quickly as intensity is increased. Because the signal corresponding to the light with shorter wavelength may be stronger, the use of the shorter wavelength light may also enable detection of smaller sized defects (Equations 1 , 3).

[0065] One shortcoming of illuminating the front panel surface with light with wavelength to which the a-Si is sensitive is that TFT channels are also exposed to the same light illumination. Because the TFT structure is also composed of a-Si material, the impinging front side illumination will also increase the conductance of the a-Si material in the TFT in the same way as the defect-forming residue. When exposed to light, the off-state conductance of the TFT will increase, and hence, the leakage current of the TFT will be higher than the corresponding value in the dark state. This results in an increase in the decay of the pixel voltage, which can be detected by the voltage image tester or other similar testing methods utilizing the voltage response of the TFT for defect detection. Thus, even though the TFT channel is in fact not defective, the tester may incorrectly interpret it as having a defect depending on the pixel voltage decay. That is, illuminating good TFT pixels or channels with front side illuminating light may result in false defects being observed. [0066] One way to minimize the pixel voltage decay due to the TFT leakage current but at the same time maximizing the detection response of the a-Si residue is by pulsing the front illuminating light and varying duration and intensity of the light pulses. Figure 9 is an exemplary graphical user interface 900 showing a diagram of the front light timing relative to the timing of the LCD driving pattern signals. The signals 901 (data odd), 902 (data even), 903 (gate odd), 904 (gate even) constitute an LCD test driving pattern. The front side illumination pulse 905 is characterized by its intensity, duration, start time and end time.

[0067] Figure 10 is another example of a possible front light pattern 1000 in which the parameters of the front side illumination pulse 905 are different for every frame of a given driving pattern. Specifically, in the first (A) frame, the front side illumination pulse 905 has duration of 3 ms, start time of 3.5 ms and intensity of 50%. In the second (B) frame, the front side illumination pulse 905 is turned off. In the third (C) frame, the front side illumination pulse 905 has duration of 7 ms, start time of 0 ms and intensity of 25%. Finally, in the fourth (D) frame, the front side illumination pulse 905 has duration of 3 ms, start time of 3.5 ms and intensity of 50%. The modulator biasing voltage 906 is the same for each frame. [0068] Maximizing the pixel voltage decrease due to the a-Si residue while minimizing the voltage decrease due to TFT leakage corresponds to maximizing the defect detection sensitivity (DDS) while keeping the site standard deviation small or the signal-to-noise ratio (SNR) high. In particular, the value of the DDS is a measure of defect contrast and is defined as a comparison between pixel voltages for the normal pixel and the defect, that is DDS = (1 - V_defect/v_Site-av) and typically, the DDS should be greater than 0.3 for detection with 30% threshold, a value typically used in defect detection. Site standard deviation should remain less than 0.4 V, while the signal-to-noise ratio, SNR = (V_Sj_te-_av/Std. Dev) may be greater than 25. [0069] Figures 11A and 11 B show the test results 1100 and 1200 obtained using one exemplary embodiment of the inventive system for one specific type of defect (a parasitic data-pixel capacitance type defect). These figures show the dependence of the DDS (Figure 11 A) and SNR (Figure 11 B) on the front light end time. Specifically, the data plots 1101-1109 of Figure 11A are shown for 9 pairs of intensity and start time values. Specifically: 10% intensity, 1ms start time (plot 1101); 10% intensity, 7ms start time (plot 1102); 10% intensity, 9ms start time (plot 1103); 50% intensity, 1ms start time (plot 1104); 50% intensity, 7ms start time (plot 1105); 50% intensity, 9ms start time (plot 1106); 90% intensity, 1ms start time (plot 1107); 90% intensity, 7ms start time (plot 1108); and 90% intensity, 9ms start time (plot 1109). Plots 1201-1209 shown in Figure 11 B correspond to the same intensity/start time pairs as the respective plots 1101-1109 of Figure 11A. It should be noted that the pulse durations, intensities and start times may vary from panel to panel, and may be different for different defect types.

[0070] First, it can be observed from the provided plots 1101-1109 that DDS increases (due to the effect of the front light on the a-Si residue) and SNR decreases (due to the effect of the front light on the TFTs) with pulse end time and duration. Second, the value of the DDS increases and SNR decreases between 10% and 50% intensity, but does not change for higher intensities. This is indicative of a saturation effect. Third, the value of the DDS and SNR seem to saturate for T_end > 14ms (T=O being taken at the beginning of the positive modulator cycle). Fourth, the pulses confined to the negative modulator bias cycle, when no pixel driving takes place, have no effect.

[0071] As indicated in Figures 11 A and 11 B, in a particular embodiment of the inventive concept, the best detection, i.e. DDS > 0.3 and SNR>25% is met for intensities of 50% or higher and for pulses ending at t=8 to 11 ms after the start of the positive half of the modulator bias cycle, i.e., pulses with an overlap of 1 to 3 ms with the holding time, which ends just after the data voltage drops. It should be noted that pulses with longer durations lead to unacceptably large drops in SNR due to light induced TFT leakage. For comparison, in Figure 11 B, the SNR value 1210 corresponding to the detection of defects without front light is also shown. [0072] Finally, it should be understood that processes and techniques described herein are not inherently related to any particular apparatus and may be implemented by any suitable combination of components. Further, various types of general purpose devices may be used in accordance with the teachings described herein. It may also prove advantageous to construct a specialized apparatus to perform the method steps described herein. The present invention has been described in relation to particular examples, which are intended in all respects to be illustrative rather than restrictive. Those skilled in the art will appreciate that many different combinations of hardware, software, and firmware will be suitable for practicing the present invention.

[0073] Moreover, other implementations of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. Various aspects and/or components of the described embodiments may be used singly or in any combination in the inventive defect detection system. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims and their equivalents.

Claims

We claim:

1. A system for detecting defects in a panel under test, the system comprising: a. a front side illumination subsystem configured to deliver a front side illuminating light beam onto the panel under test, the front side illuminating light beam altering electrical properties of the defects to facilitate detection of the defects; and b. a detection subsystem configured to detect the defects based on the altered electrical properties of the defects, wherein the front side illuminating light beam is pulsed and optimized for duration and intensity to maximize the detection of the defects and minimize the detection of false defects and wherein the front side illuminating light beam has a wavelength matching maximum absorption optical properties of the defects.

2. The system of claim 1 , further comprising a voltage signal source configured to apply a voltage signal to the panel under test, the applied voltage signal causing a spatial voltage distribution across the panel under test, wherein the detection subsystem comprises a voltage imaging optical device configured to create an image indicative of the spatial voltage distribution across the panel under test and wherein the defects are detected based on the created image.

3. The system of claim 2, wherein the front side illumination subsystem is integrated within an optical path of the voltage imaging optical device.

4. The system of claim 3, wherein the optical path of the voltage imaging optical device comprises a dichroic mirror configured to combine a voltage imaging light beam and the front side illuminating light beam.

5. The system of claim 3, wherein the voltage imaging optical device comprises an imaging device configured to create the image indicative of the spatial voltage distribution across the panel under test and a low pass filter configured to prevent the front side illuminating light beam from reaching the imaging device.

6. The system of claim 3, wherein the voltage imaging optical device comprises a modulator configured to modulate the voltage imaging light beam in accordance with the spatial voltage distribution across the panel under test, the modulator having a pellicle configured to reflect the voltage imaging light beam and transmit the front side illuminating light beam.

7. The system of claim 1 , wherein the front side illuminating light beam is in a blue wavelength range and wherein a voltage imaging light beam for creating an image by the voltage imaging device has a different wavelength from the front side illuminating light beam.

8. A system for detecting defects in a panel under test, the system comprising: a. a front side illumination subsystem configured to deliver a front side illuminating light beam onto the panel under test, the front side illuminating light beam altering electrical properties of the defects to facilitate detection of the defects; and b. a detection subsystem configured to detect the defects based on the altered electrical properties of the defects, the detection subsystem comprises a voltage imaging optical device configured to create an image indicative of a spatial voltage distribution across the panel under test, wherein the defects are detected based on the created image, wherein the front side illuminating light beam has a wavelength matching maximum absorption optical properties of the defects, and wherein the front side illumination subsystem is integrated within an optical path of the voltage imaging optical device.

9. The system of claim 8, wherein the optical path of the voltage imaging optical device comprises a dichroic mirror configured to combine a voltage imaging light beam and the front side illuminating light beam.

10. The system of claim 8, wherein the voltage imaging optical device comprises an imaging device configured to create the image indicative of the spatial voltage distribution across the panel under test and a low pass filter configured to prevent the front side illuminating light beam from reaching the imaging device.

11. The system of claim 8, wherein the voltage imaging optical device comprises a modulator configured to modulate the voltage imaging light beam in accordance with the spatial voltage distribution across the panel under test, the modulator having a pellicle configured to reflect the voltage imaging light beam and transmit the front side illuminating light beam.

12. The system of claim 8, wherein the front side illuminating light beam is in a blue wavelength range and wherein a voltage imaging light beam for creating an image by the voltage imaging device has a different wavelength from the front side illuminating light beam.

13. A system for detecting defects in a panel under test, the system comprising: a. a front side illumination subsystem configured to deliver a front side illuminating light beam onto the panel under test, the front side illuminating light beam altering electrical properties of the defects to facilitate detection of the defects; b. a detection subsystem configured to detect the defects based on the altered electrical properties of the defects, the detection subsystem comprising a voltage imaging optical device configured to create an image indicative of a spatial voltage distribution across the panel under test, wherein the defects are detected based on the created image, wherein the front side illuminating light beam has a wavelength matching maximum absorption optical properties of the defects, and wherein the front side illumination subsystem is disposed outside an optical path of the voltage imaging optical device.

14. The system of claim 13, wherein the front side illumination subsystem comprises a plurality of special directional light emitting diodes arranged on a mounting ring to optimize a uniformity of the front side illuminating light beam.

15. The system of claim 13, wherein the front side illumination subsystem comprises a plurality of light emitting diodes and wherein at least one of the plurality of light emitting diodes is optically coupled with a collimating lens, arranged on a mounting ring to optimize a uniformity of the front side illuminating light beam.

16. The system of claim 13, wherein the front side illumination subsystem comprises a plurality of light emitting diodes optically coupled with a directional attenuation module to optimize a uniformity of the front side illuminating light beam.

17. The system of claim 13, wherein the directional attenuation module comprises a neutral density filter.

18. The system of claim 13, wherein the voltage imaging optical device comprises an imaging device configured to create the image indicative of the spatial voltage distribution across the panel under test and a low pass filter configured to prevent the front side illuminating light beam from reaching the imaging device.

19. The system of claim 13, wherein the voltage imaging optical device comprises a modulator configured to modulate the voltage imaging light beam in accordance with the spatial voltage distribution across the panel under test, the modulator having a pellicle configured to reflect the voltage imaging light beam and transmit the front side illuminating light beam and wherein the front side illumination subsystem is disposed in a close spatial proximity of the modulator.

20. The system of claim 13, wherein the voltage imaging optical device and the front side illumination subsystem are mounted on a movable stage assembly configured to scan across the panel under test under a control of a stage control module.

21. The system of claim 20, further comprising at least a second voltage imaging optical device and at least a second front side illumination subsystem mounted on the movable stage assembly.

22. The system of claim 13 wherein the front side illuminating light beam is in a blue wavelength range and wherein a voltage imaging light beam for creating an image by the voltage imaging device has a different wavelength from the front side illuminating light beam.

23. The system of claim 13, wherein the front side illumination subsystem comprises a plurality of light emitting diodes and wherein each of the plurality of light emitting diodes is provided with a diffuser optically coupled to the each of the plurality of light emitting diodes, the diffuser being configured to smooth out spatial inhomogeneities of the front side illuminating light beam and improve an overall illumination uniformity of the front side illuminating light beam.

24. A method for detecting defects in a panel under test, the method comprising: a. delivering a front side illuminating light beam onto the panel under test using a front side illumination subsystem, the front side illuminating light beam altering electrical properties of the defects to facilitate detection of the defects; and b. detecting the defects based on the altered electrical properties of the defects using a detection subsystem, wherein the front side illuminating light beam is pulsed and optimized for duration and intensity to maximize the detection of the defects and minimize the detection of false defects and wherein the front side illuminating light beam has a wavelength matching maximum absorption optical properties of the defects.

25. The method of claim 24, further comprising applying a voltage signal to the panel under test, the applied voltage signal causing a spatial voltage distribution across the panel under test and creating an image indicative of the spatial voltage distribution across the panel under test, wherein the defects are detected based on the created image.

26. The method of claim 25, wherein the image indicative of the spatial voltage distribution across the panel under test is created using a voltage imaging light beam, and wherein the front side illuminating light beam is being placed in an optical path of the voltage imaging light beam.

27. The method of claim 25, wherein the image indicative of the spatial voltage distribution across the panel under test is created using a voltage imaging optical device comprising an imaging device and a low pass filter configured to prevent the front side illuminating light beam from reaching the imaging device.

28. The method of claim 25, wherein the front side illuminating light beam is in a blue wavelength range and wherein a voltage imaging light beam for creating the image indicative of the spatial voltage distribution across the panel under test has a different wavelength from the front side illuminating light beam.

29. A method for detecting defects in a panel under test, the method comprising: a. delivering a front side illuminating light beam onto the panel under test using a front side illumination subsystem, the front side illuminating light beam altering electrical properties of the defects to facilitate detection of the defects; and b. detecting the defects based on the altered electrical properties of the defects using a detection subsystem, the detection subsystem comprising a voltage imaging optical device configured to create an image indicative of a spatial voltage distribution across the panel under test, wherein the defects are detected based on the created image, wherein the front side illuminating light beam has a wavelength matching maximum absorption optical properties of the defects, and wherein the front side illumination subsystem is integrated within an optical path of the voltage imaging optical device.

30. A method for detecting defects in a panel under test, the method comprising: a. delivering a front side illuminating light beam onto the panel under test using a front side illumination subsystem, the front side illuminating light beam altering electrical properties of the defects to facilitate detection of the defects; b. detecting the defects using a detection subsystem based on the altered electrical properties of the defects, the detection subsystem comprising a voltage imaging optical device configured to create an image indicative of a spatial voltage distribution across the panel under test, wherein the defects are detected based on the created image, wherein the front side illuminating light beam has a wavelength matching maximum absorption optical properties of the defects, and wherein the front side illumination subsystem is disposed outside an optical path of the voltage imaging optical device.