WO2009045113A1 - Method and system for updating a stored data value in a non-volatile memory - Google Patents
Method and system for updating a stored data value in a non-volatile memory Download PDFInfo
- Publication number
- WO2009045113A1 WO2009045113A1 PCT/NZ2008/000256 NZ2008000256W WO2009045113A1 WO 2009045113 A1 WO2009045113 A1 WO 2009045113A1 NZ 2008000256 W NZ2008000256 W NZ 2008000256W WO 2009045113 A1 WO2009045113 A1 WO 2009045113A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- volatile memory
- value
- differential value
- data value
- stored
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/0076—Write operation performed depending on read result
Definitions
- the invention relates to a method of updating a stored data value in a non-volatile memory.
- the invention further relates to a system configured to update a stored data value in a non-volatile memory.
- Non-volatile memory technology products such as EEPROM and FLASH are relatively cheap and commonly used in embedded systems that require data to be preserved when the power is turned off.
- non-volatile memory is relatively slow to write to.
- non-volatile memory has a limited life that is defined by the number of times a non-volatile memory location can be written to.
- the solid state gate cells of FLASH MEMORY or EEPROM can only tolerate a maximum number of write/erase cycles. This is typically 100,000 cycles maximum for 4k bytes of EEPROM. This predictable failure mode is a major lifetime-limiting factor for EEPROM/FLASH MEMORY used in devices that have many write/erase cycles.
- FLASH MEMORY and EEPROM can clearly become a risk factor and be unsuitable in applications where large amounts of data are stored, or where the data is frequently updated.
- the invention provides a method of updating a stored data value in a non-volatile memory, the method comprising: reading the stored data value from the non-volatile memory; reading a stored differential value from a volatile memory; receiving an updated data value; calculating a calculated differential value from the difference between the updated data value and the sum of the current data value and the stored differential value; comparing the calculated differential value with a threshold differential value; and writing the updated data value to the non-volatile memory if the calculated differential value exceeds the threshold differential value.
- FIG. 1 shows a block diagram of the system in which one form of the invention may be implemented
- Figure 2 shows a preferred form process for updating a data value
- Figure 3 shows a preferred form process for preserving differential values.
- Figure 1 illustrates a block diagram of the preferred form system 100 in which one form of the present invention may be implemented.
- System 100 includes a processor 105.
- the processor 105 is interfaced to volatile memory 110, non-volatile memory 115 and secondary non- volatile memory 120.
- An I/O component 125 is configured to read data from and write data to volatile memory 110, non- volatile memory 115 and secondary non- volatile memory 120.
- Non-volatile memory 115 Stored in non-volatile memory 115 are a plurality of data values 13O 1 N .
- Non-volatile memory 115 is a typical EEPROM or FLASH MEMORY. Data values 130 stored on non-volatile memory 115 are required to be maintained when power to the system 100 is turned off.
- the system 100 receives updated data values through input device 135 and optionally outputs data values through output device 140.
- the processor instead calculates a differential value at least partly from the updated data value, and the data value stored in the non- volatile memory 115.
- the system then stores a plurality of differential values 150, N in volatile memory 110.
- Respective differential values 150 each correspond to respective data values 130. The data values and differential values are described in more detail below.
- differential values 150 stored on volatile memory 110 are written to the secondary non-volatile memory 120 as differential values 160, N . It is envisaged diat non- volatile memory 120 has a secondary power supply 170 to ensure diat data in non- volatile memory 120 is not lost.
- Figure 2 illustrates a preferred form process 200 for updating a data value.
- the updated data value is first received 205, for example through input device 135.
- the corresponding stored data value is read 210, from non-volatile memory 115 through I/O device 125. If there is no corresponding stored data value, then the updated data value is simply written to non-volatile memory 115.
- this differential value is read 215 from volatile memory 110.
- Calculating component 180 adds the retrieved data value to the retrieved differential value in a random access memory or cache. This sum is then subtracted from the updated data value in order to calculate 220 a calculated differential value.
- Comparator 185 checks whether 225 the calculated differential value is 0, this means that the updated data value is the same as the sum of the stored data value and the stored differential value. If the calculated differential value is 0, then nothing further is needed.
- the comparator 185 determines that the calculated differential value is greater than a predefined threshold differential value, then the updated data value is stored 235 in non-volatile memory 115.
- the new differential value is set 240 to zero and the updated differential value is stored 245 in volatile memory.
- the updated differential value is stored 245 in volatile memory.
- Figure 3 shows a preferred form process for preserving the differential values 150 stored in volatile memory. It is typical to receive a warning of imminent power interruption to the system. One such warning is when the system detects a fall in voltage. This leads to an alert providing a finite amount of time before power is interrupted to the system 100. As soon as the system receives the warning 305, the system completes 310 all write operations in progress. The system reads 315 all differential values from volatile memory and writes 320 the retrieved differential values to secondary non-volatile memory.
- the above systems are particularly suited to maintaining data values that change frequently by single amounts.
- Typical applications of the above technology include utility meters and moisture measurement.
- the techniques described above go some way toward providing the benefit of extending the life of a FLASH MEMORY/EEPROM, thereby increasing the lifespan of the product in which the non-volatile memory is employed and reducing maintenance servicing requirements and cost.
- a further benefit is that the system is able to provide processing time benefits as non-volatile memory is typically slower to write to than volatile memory. By reducing the number of writes needed to a non-volatile memory, this has potential to speed up applications as well as extend non-volatile memory life.
- differential values or threshold values for differential values can be defined to be any size depending on the resource and strengths of the system, the characteristics of the data that is stored and the time required or available to store differential values in secondary non-volatile memory when a power fail event occurs.
- the technique can also be extended to cache data values completely in volatile memory if it is available, which has the potential to offer speed improvements.
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2008307828A AU2008307828A1 (en) | 2007-10-04 | 2008-09-29 | Method and system for updating a stored data value in a non-volatile memory |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NZ562200A NZ562200A (en) | 2007-10-04 | 2007-10-04 | Method and system for updating a stored data value in a non-volatile memory |
NZ562200 | 2007-10-04 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2009045113A1 true WO2009045113A1 (en) | 2009-04-09 |
Family
ID=40158349
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/NZ2008/000256 WO2009045113A1 (en) | 2007-10-04 | 2008-09-29 | Method and system for updating a stored data value in a non-volatile memory |
Country Status (5)
Country | Link |
---|---|
US (1) | US7813176B2 (en) |
AU (1) | AU2008307828A1 (en) |
CA (1) | CA2629752C (en) |
NZ (1) | NZ562200A (en) |
WO (1) | WO2009045113A1 (en) |
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EP2806482B1 (en) * | 2009-09-28 | 2017-06-28 | Hitachi, Ltd. | Battery system |
JP5661313B2 (en) * | 2010-03-30 | 2015-01-28 | キヤノン株式会社 | Storage device |
JP5139465B2 (en) * | 2010-03-31 | 2013-02-06 | 株式会社東芝 | Memory chip, information storage system, readout device |
CN103730155B (en) * | 2012-10-10 | 2018-05-29 | 华为技术有限公司 | Method for writing data and device |
US20160350734A1 (en) * | 2014-06-01 | 2016-12-01 | Gideon Samid | Versatile, Real Time, Two-Ways Payment for Power and Utilities |
CN111164687B (en) * | 2017-08-17 | 2021-11-26 | 森田公司 | Digitally supported flash memory refresh |
CN113228596B (en) * | 2018-12-04 | 2024-04-02 | 香港星辰科技有限公司 | Method and device for transmitting list information |
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2007
- 2007-10-04 NZ NZ562200A patent/NZ562200A/en not_active IP Right Cessation
-
2008
- 2008-04-24 CA CA2629752A patent/CA2629752C/en not_active Expired - Fee Related
- 2008-06-03 US US12/132,510 patent/US7813176B2/en not_active Expired - Fee Related
- 2008-09-29 WO PCT/NZ2008/000256 patent/WO2009045113A1/en active Application Filing
- 2008-09-29 AU AU2008307828A patent/AU2008307828A1/en not_active Abandoned
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Also Published As
Publication number | Publication date |
---|---|
AU2008307828A1 (en) | 2009-04-09 |
NZ562200A (en) | 2008-11-28 |
US20090091977A1 (en) | 2009-04-09 |
US7813176B2 (en) | 2010-10-12 |
CA2629752A1 (en) | 2009-04-04 |
CA2629752C (en) | 2013-04-16 |
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