WO2009002754A3 - Handling falsely doomed parents of nested transactions - Google Patents

Handling falsely doomed parents of nested transactions Download PDF

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Publication number
WO2009002754A3
WO2009002754A3 PCT/US2008/067145 US2008067145W WO2009002754A3 WO 2009002754 A3 WO2009002754 A3 WO 2009002754A3 US 2008067145 W US2008067145 W US 2008067145W WO 2009002754 A3 WO2009002754 A3 WO 2009002754A3
Authority
WO
WIPO (PCT)
Prior art keywords
nested
transactions
transaction
release
write
Prior art date
Application number
PCT/US2008/067145
Other languages
French (fr)
Other versions
WO2009002754A2 (en
Inventor
Michael M Magruder
David Detlefs
John Joseph Duffy
Goetz Graefe
Vinod K Grover
Original Assignee
Microsoft Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Corp filed Critical Microsoft Corp
Priority to CN2008800224166A priority Critical patent/CN101689138B/en
Priority to JP2010514967A priority patent/JP4923142B2/en
Priority to EP08771213.9A priority patent/EP2176762B1/en
Publication of WO2009002754A2 publication Critical patent/WO2009002754A2/en
Publication of WO2009002754A3 publication Critical patent/WO2009002754A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/466—Transaction processing
    • G06F9/467—Transactional memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/20—Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
    • G06F16/23—Updating
    • G06F16/2308—Concurrency control
    • G06F16/2315—Optimistic concurrency control
    • G06F16/2329—Optimistic concurrency control using versioning
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/20—Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
    • G06F16/23—Updating
    • G06F16/2308—Concurrency control
    • G06F16/2336—Pessimistic concurrency control approaches, e.g. locking or multiple versions without time stamps
    • G06F16/2343—Locking methods, e.g. distributed locking or locking implementation details

Abstract

[029] Various technologies and techniques are disclosed for detecting falsely doomed parent transactions of nested children in transactional memory systems. When rolling back nested transactions, a release count is tracked each time that a write lock is released due to rollback for a given nested transaction. For example, a write abort compensation map can be used to track the release count for each nested transaction. The number of times the nested transactions releases a write lock is recorded in their respective write abort compensation map. The release counts can be used during a validation of a parent transaction to determine if a failed optimistic read is really valid. If an aggregated release count for the nested children transactions accounts for the difference in version numbers exactly, then the optimistic read is valid.
PCT/US2008/067145 2007-06-27 2008-06-16 Handling falsely doomed parents of nested transactions WO2009002754A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN2008800224166A CN101689138B (en) 2007-06-27 2008-06-16 Handling falsely doomed parents of nested transactions
JP2010514967A JP4923142B2 (en) 2007-06-27 2008-06-16 Dealing with incorrect parent transaction failures
EP08771213.9A EP2176762B1 (en) 2007-06-27 2008-06-16 Handling falsely doomed parents of nested transactions

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/823,162 US7899999B2 (en) 2007-06-27 2007-06-27 Handling falsely doomed parents of nested transactions
US11/823,162 2007-06-27

Publications (2)

Publication Number Publication Date
WO2009002754A2 WO2009002754A2 (en) 2008-12-31
WO2009002754A3 true WO2009002754A3 (en) 2009-02-19

Family

ID=40161865

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2008/067145 WO2009002754A2 (en) 2007-06-27 2008-06-16 Handling falsely doomed parents of nested transactions

Country Status (6)

Country Link
US (1) US7899999B2 (en)
EP (1) EP2176762B1 (en)
JP (1) JP4923142B2 (en)
CN (1) CN101689138B (en)
TW (1) TWI363299B (en)
WO (1) WO2009002754A2 (en)

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US7890472B2 (en) * 2007-09-18 2011-02-15 Microsoft Corporation Parallel nested transactions in transactional memory
US8719515B2 (en) 2010-06-21 2014-05-06 Microsoft Corporation Composition of locks in software transactional memory
US9411634B2 (en) 2010-06-21 2016-08-09 Microsoft Technology Licensing, Llc Action framework in software transactional memory
US10073844B1 (en) * 2010-11-24 2018-09-11 Federal Home Loan Mortgage Corporation (Freddie Mac) Accelerated system and method for providing data correction
US20140281236A1 (en) * 2013-03-14 2014-09-18 William C. Rash Systems and methods for implementing transactional memory
WO2014192213A1 (en) * 2013-05-31 2014-12-04 日本電気株式会社 Distributed processing system
US20150370409A1 (en) * 2014-06-18 2015-12-24 International Business Machines Corporation Disambiguation of touch-based gestures
US10503698B2 (en) 2014-07-31 2019-12-10 Splunk Inc. Configuration replication in a search head cluster
US10152237B2 (en) 2016-05-05 2018-12-11 Micron Technology, Inc. Non-deterministic memory protocol
US10534540B2 (en) 2016-06-06 2020-01-14 Micron Technology, Inc. Memory protocol
US10635613B2 (en) 2017-04-11 2020-04-28 Micron Technology, Inc. Transaction identification
CN110347533A (en) * 2019-07-11 2019-10-18 中国工商银行股份有限公司 The processing method of data exception, calculates equipment and medium at device

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US6671686B2 (en) * 2000-11-02 2003-12-30 Guy Pardon Decentralized, distributed internet data management
US20080034172A1 (en) * 2006-08-04 2008-02-07 Microsoft Corporation Combined pessimistic and optimistic concurrency control

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6298478B1 (en) * 1998-12-31 2001-10-02 International Business Machines Corporation Technique for managing enterprise JavaBeans (™) which are the target of multiple concurrent and/or nested transactions
US6671686B2 (en) * 2000-11-02 2003-12-30 Guy Pardon Decentralized, distributed internet data management
US20080034172A1 (en) * 2006-08-04 2008-02-07 Microsoft Corporation Combined pessimistic and optimistic concurrency control

Non-Patent Citations (1)

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Title
See also references of EP2176762A4 *

Also Published As

Publication number Publication date
CN101689138A (en) 2010-03-31
EP2176762A4 (en) 2012-10-10
WO2009002754A2 (en) 2008-12-31
JP4923142B2 (en) 2012-04-25
US7899999B2 (en) 2011-03-01
JP2010532052A (en) 2010-09-30
EP2176762A2 (en) 2010-04-21
TW200907816A (en) 2009-02-16
CN101689138B (en) 2012-07-18
TWI363299B (en) 2012-05-01
US20090006404A1 (en) 2009-01-01
EP2176762B1 (en) 2020-03-18

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