WO2008146442A1 - Epitaxial wafer manufacturing method and epitaxial wafer - Google Patents

Epitaxial wafer manufacturing method and epitaxial wafer Download PDF

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Publication number
WO2008146442A1
WO2008146442A1 PCT/JP2008/001027 JP2008001027W WO2008146442A1 WO 2008146442 A1 WO2008146442 A1 WO 2008146442A1 JP 2008001027 W JP2008001027 W JP 2008001027W WO 2008146442 A1 WO2008146442 A1 WO 2008146442A1
Authority
WO
WIPO (PCT)
Prior art keywords
epitaxial
epitaxial wafer
layer
carbon
heat treatment
Prior art date
Application number
PCT/JP2008/001027
Other languages
French (fr)
Japanese (ja)
Inventor
Wei Feig Qu
Hiroyuki Kobayashi
Ryuji Sayama
Shoichi Takamizawa
Kiyoshi Mitani
Satoshi Tobe
Original Assignee
Shin-Etsu Handotai Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin-Etsu Handotai Co., Ltd. filed Critical Shin-Etsu Handotai Co., Ltd.
Publication of WO2008146442A1 publication Critical patent/WO2008146442A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02658Pretreatments
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

Provided is an epitaxial wafer manufacturing method wherein a carbon implanted layer is formed by implanting carbon ions, then, heat treatment is performed in an atmosphere containing ammonia or nitrogen by using a rapid heating/cooling (RTA) apparatus, and an epitaxial layer is formed on the heat-treated silicon wafer. By surely performing recovery heat treatment prior to the step of implanting carbon ions to form the carbon ion implanted layer and forming the silicon epitaxial layer on the implanted surface, an epitaxial wafer having high gettering performance can be manufactured at low cost without forming an epitaxial defect on the epitaxial layer.
PCT/JP2008/001027 2007-05-25 2008-04-18 Epitaxial wafer manufacturing method and epitaxial wafer WO2008146442A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-138548 2007-05-25
JP2007138548A JP2008294245A (en) 2007-05-25 2007-05-25 Method of manufacturing epitaxial wafer, and epitaxial wafer

Publications (1)

Publication Number Publication Date
WO2008146442A1 true WO2008146442A1 (en) 2008-12-04

Family

ID=40074720

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/001027 WO2008146442A1 (en) 2007-05-25 2008-04-18 Epitaxial wafer manufacturing method and epitaxial wafer

Country Status (3)

Country Link
JP (1) JP2008294245A (en)
TW (1) TW200903646A (en)
WO (1) WO2008146442A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011079033A1 (en) * 2009-12-21 2011-06-30 Omnivision Technologies, Inc. Wafer structure to reduce dark current
WO2013184715A1 (en) * 2012-06-04 2013-12-12 Nusola Inc. Photovoltaic cell and methods for manufacture
US9099578B2 (en) 2012-06-04 2015-08-04 Nusola, Inc. Structure for creating ohmic contact in semiconductor devices and methods for manufacture
WO2018164759A1 (en) * 2017-03-06 2018-09-13 Qualcomm Incorporated Gettering layer formation in a substrate and integrated circuit comprising the substrate

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5276863B2 (en) * 2008-03-21 2013-08-28 グローバルウェーハズ・ジャパン株式会社 Silicon wafer
JP2012059849A (en) * 2010-09-08 2012-03-22 Shin Etsu Handotai Co Ltd Silicon epitaxial wafer and manufacturing method thereof
DE112012002072B4 (en) 2011-05-13 2023-11-16 Sumco Corp. Method for producing an epitaxial silicon wafer, epitaxial silicon wafer and method for producing a solid-state image pickup device
JP6278591B2 (en) 2012-11-13 2018-02-14 株式会社Sumco Manufacturing method of semiconductor epitaxial wafer, semiconductor epitaxial wafer, and manufacturing method of solid-state imaging device
JP6289805B2 (en) * 2012-11-13 2018-03-07 株式会社Sumco Manufacturing method of semiconductor epitaxial wafer, semiconductor epitaxial wafer, and manufacturing method of solid-state imaging device
JP5776670B2 (en) 2012-11-13 2015-09-09 株式会社Sumco Epitaxial silicon wafer manufacturing method, epitaxial silicon wafer, and solid-state imaging device manufacturing method
JP6280301B2 (en) * 2012-11-13 2018-02-14 株式会社Sumco Epitaxial silicon wafer manufacturing method, epitaxial silicon wafer, and solid-state imaging device manufacturing method
JP5799935B2 (en) 2012-11-13 2015-10-28 株式会社Sumco Manufacturing method of semiconductor epitaxial wafer, semiconductor epitaxial wafer, and manufacturing method of solid-state imaging device
JP5776669B2 (en) 2012-11-13 2015-09-09 株式会社Sumco Epitaxial silicon wafer manufacturing method, epitaxial silicon wafer, and solid-state imaging device manufacturing method
JP6065279B2 (en) * 2013-05-01 2017-01-25 信越半導体株式会社 Manufacturing method of semiconductor device
JP6056772B2 (en) 2014-01-07 2017-01-11 株式会社Sumco Epitaxial wafer manufacturing method and epitaxial wafer
JP6427894B2 (en) * 2014-02-21 2018-11-28 株式会社Sumco Epitaxial wafer manufacturing method
JP2017123477A (en) * 2017-02-28 2017-07-13 株式会社Sumco Method for manufacturing semiconductor epitaxial wafer, semiconductor epitaxial wafer, and method for manufacturing solid-state imaging device
JP2017175145A (en) * 2017-05-01 2017-09-28 株式会社Sumco Semiconductor epitaxial wafer manufacturing method, semiconductor epitaxial wafer, and solid-state imaging element manufacturing method
JP7282019B2 (en) 2019-12-05 2023-05-26 グローバルウェーハズ・ジャパン株式会社 Silicon wafer and its heat treatment method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04130731A (en) * 1990-09-21 1992-05-01 Hitachi Ltd Manufacture of semiconductor integrated circuit device
JPH06338507A (en) * 1993-03-30 1994-12-06 Sony Corp Semiconductor substrate and solid-state image-pickup device and manufacture thereof
JP2003031582A (en) * 2000-11-28 2003-01-31 Sumitomo Mitsubishi Silicon Corp Manufacturing method for silicon wafer and silicon wafer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04130731A (en) * 1990-09-21 1992-05-01 Hitachi Ltd Manufacture of semiconductor integrated circuit device
JPH06338507A (en) * 1993-03-30 1994-12-06 Sony Corp Semiconductor substrate and solid-state image-pickup device and manufacture thereof
JP2003031582A (en) * 2000-11-28 2003-01-31 Sumitomo Mitsubishi Silicon Corp Manufacturing method for silicon wafer and silicon wafer

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011079033A1 (en) * 2009-12-21 2011-06-30 Omnivision Technologies, Inc. Wafer structure to reduce dark current
US8173535B2 (en) 2009-12-21 2012-05-08 Omnivision Technologies, Inc. Wafer structure to reduce dark current
WO2013184715A1 (en) * 2012-06-04 2013-12-12 Nusola Inc. Photovoltaic cell and methods for manufacture
US9099578B2 (en) 2012-06-04 2015-08-04 Nusola, Inc. Structure for creating ohmic contact in semiconductor devices and methods for manufacture
WO2018164759A1 (en) * 2017-03-06 2018-09-13 Qualcomm Incorporated Gettering layer formation in a substrate and integrated circuit comprising the substrate
CN110383433A (en) * 2017-03-06 2019-10-25 高通股份有限公司 Symmicton in substrate is formed and the integrated circuit including substrate
US10522367B2 (en) 2017-03-06 2019-12-31 Qualcomm Incorporated Gettering layer formation and substrate

Also Published As

Publication number Publication date
JP2008294245A (en) 2008-12-04
TW200903646A (en) 2009-01-16

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