WO2008141118A1 - Laser activated fluorine treatment of silicon substrates - Google Patents

Laser activated fluorine treatment of silicon substrates Download PDF

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Publication number
WO2008141118A1
WO2008141118A1 PCT/US2008/063141 US2008063141W WO2008141118A1 WO 2008141118 A1 WO2008141118 A1 WO 2008141118A1 US 2008063141 W US2008063141 W US 2008063141W WO 2008141118 A1 WO2008141118 A1 WO 2008141118A1
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WIPO (PCT)
Prior art keywords
fluorine
laser
wafer
silicon
dicing
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Application number
PCT/US2008/063141
Other languages
French (fr)
Inventor
Christopher Mark Bailey
Richard Allen Hogle
Mark Greene
Graham Anthony Mcfarlane
Original Assignee
Linde, Inc.
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Filing date
Publication date
Application filed by Linde, Inc. filed Critical Linde, Inc.
Publication of WO2008141118A1 publication Critical patent/WO2008141118A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

A method of etching silicon for backside thinning, formation of vias and wafer dicing that comprises the use of fluorine-containing gas, heated by a laser. The use of a fluorine-containing gas along with a laser provides advantageous control of the etching while avoiding damage to the wafer. The cleaning of deposits from processing chambers using fluorine is also provided.

Description

LASER ACTIVATED FLUORINE TREATMENT OF SILICON SUBSTRATES
Field of the Invention
(001) The present invention relates to the new apparatus and method for the treatment of silicon substrates using fluorine.
BACKGROUND OF THE INVENTION
(002) Integrated circuits are fabπcated on silicon wafers The wafers are commonly 200mm in diameter and the industry has recently been transitiomng to using 300mm diameter wafers. The integrated circuits are contained within die (chips) which are commonly only a few mm square and are always rectangular or square. Consequently several hundred to several thousand die are produced from a silicon wafer. The die are separated by a process called either singulation or dicing. This process has traditionally used precision circular saws which cut along a line known as the dicing street Diamond saw blades are used and cutting is actually achieved by abrasion. The dicing street is the space between the die, the width of which is kept as small as practically possible, to maximize the number of die that can be made on a wafer. The dicing street is always straight, because the use of circular saws does not allow for any change of direction. The dicing street often contains some features which are fabricated to enable test or metrology during the manufacture of the wafer, but which have no value m the finished product. Ln fact they are destroyed during the dicing process. The width of material that is actually removed by the saw is called the kerf.
(003) Figure 1 is an expanded view of a portion of a substrate as processed according to prior art techniques. In particular, Figure 1 shows a portion of a substrate 100, showing individual dies 120, that are separated by dicing streets 130. A kerf 140, shows the cut line for the circular saw According to prior art practice, a high speed rotary saw, normally coated with diamond particles is used to cut the substrate into individual die
(004) In addition, wafers are often thinned by backside grinding to reduce the height of the finished chip In the case of stacked chips, wafer thinning is carried out to increase the number of levels that can be incorporated m a standard height. The Wafer can be thinned before dicing (known as GBD - Grind Before Dice) or diced before grinding (DBG). Typically both grinding and dicing require the wafer to be stuck to a chuck using tape. Special equipment has been developed for taping and detapmg For example, detaping often uses UV light to reduce the adhesion to the tape The individual chips are then picked off the tape for further assembly processes using pick and place mechanisms Dicing and grinding machines employ similar technology, are used close together and are often made by the same companies.
(005) Newer technology is exploπng the concept of etch based wafer thinning, as opposed to the grinding currently done, hi addition, the use of lasers for drilling vias into (blind) and through wafers has been contemplated. The lasers used a process called ablation that essentially vaporizes the material and the ablated mateπal is removed by an accompanying gas stream.
(006) However, all of these pπor art techniques have a number of disadvantages For example, as noted above, circular saws can only cut in straight lines across the whole wafer This restricts the design of die layout on the wafer and also reduces the number of die that can be obtained from a wafer. Further, circular saws only cut m one direction Therefore, listed cutting speeds can be misleading. For example, a cutting speed of 300 mm per second may be claimed, but the user has to allow for the wheel to return to the original side of the wafer before another cut can be made, resulting in significant non-productive time. In an effort to decrease cutting time, some dicing saws have been designed with dual ganged blades; i.e. two blades on a single shaft that can cut two parallel streets at a time. However, this arrangement requires careful set up and also restricts the design of the die layout on the wafer, e.g. not only must all the dicing streets be straight, they must also be equispaced
(007) In addition, saw cutting has encountered new problems when used for dicing of low K dielectric materials. These materials are relatively weak and the chip edges are susceptible to chipping The increased requirement for wafer thinning makes this problem even more difficult to solve using traditional sawing techniques. To try to avoid this problem, the sawing process must be slowed down, thereby significantly slowing wafer throughput Moreover, saw cutting and current back grinding processes to thin wafers introduce stress cracks, particularly on low K chips. In efforts to overcome these problems, low K dielectric dies are often cut using a seπes of cuts First, a light cut, of about 20 - 50 micron deep cuts through the dielectric and into the silicon substrate. A second cut then finishes the cut through the silicon substrate The first cut needs to cut a kerf wide enough to provide clearance for both sides of the blade used in the second cut This approach both increases the time to dice a wafer, and reduces the amount of die that can be fabricated in one wafer
(008) The use of laser cutting overcomes some of the problems encountered m saw cutting In particular, lasers allow for different shapes to be cut and can cut in any direction, without the need to "fly back" without cutting. Further, laser ablation does not introduce stress cracks or chips However, laser cutting has its own disadvantages For example, it is necessary to keep the power of the laser low in order to avoid thermally overheating the wafer structure, which m turn reduces the cutting speed for laser cutting One approach at avoiding thermal overheating is to use a water guided laser wherein water surrounds the laser beam to cool the substrate and wash away debris. However, this will not work for low K dielectrics because such materials are porous and water can change the effective K value in the integrated circuit or the encapsulated chip. Therefore, extreme care needs to be taken to completely dry the separated die after dicing. The small size of the die requires costly handling to accomplish such drying and also increases the possibility of damage to the die
SUMMARY OF THE INVENTION
(009) The present invention offers several advantages over the prior art methods and solves problems associated with the saw cutting or the currently available laser systems of the prior art Pn particular, the present invention proposes the use of fluorine to etch silicon for backside thinning, formation of vias and wafer dicing Fluorine can be used to provide high etch rates and can be obtained easily from an on-site fluorine generator
BRIEF DESCRIPTION OF THE DRAWINGS
(010) Figure 1 is a expanded view of a portion of a substrate as processed according to prior art techniques.
(011) Figure 2 is a schematic drawing of an apparatus according to one embodiment of the present invention (012) Figure 3 is a schematic drawing of an apparatus according to another embodiment of the present invention.
(013) Figure 4 is a schematic drawing of an apparatus according to a further embodiment of the present invention.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
(014) The present invention uses fluorine to etch silicon for backside thinning, formation of vias and wafer dicing. Fluorine can be used to provide high etch rates and can be obtained easily from an on-site fluorine generator. The present invention provides for the partial elimination of backside grinding, being largely replaced by a dry etch process. Further, the present invention allows to the use of dry cleaning of individual die as a replacement to wet methods. While neither of these changes is essential for practicing the present mvention, the elimination of mechanically damaging grinding and sawing as well as elimination of wet processes is clearly desirable. The present invention also provides advantages in how it integrates with preceding and subsequent processes m the packaging and assembly part of semiconductor manufacture.
(015) It is noted that the use of fluorine normally produces a very isotropic etch. This is a disadvantage in applications for dicing and vias, especially when high aspect ratios are required, as the etch needs to be highly anisotropic. In this light, etching for vias or dicing using fluorine would normally require photolithographically patterning of the wafer and a subsequent photoresist removal process. However, the present mvention overcomes this disadvantage.
(016) In particular, the present invention combines the benefits of both lasers and fluorine etch for via etching and dicing. In addition, the present invention enables anisotropic etching to be achieved when using fluorine and allows for advantageous combination with fluorine etching for thinning processes The etch processes of the present mvention do not require patterning or subsequent photoresist removal
(017) The present mvention will now be explained with reference to the drawing figures Figure 2 shows an apparatus according to one embodiment of the present invention. In Figure 2, a focused beam 10 from an Excimer, UV or other suitable wavelength laser is used to activate fluorine or a fluorine containing gas compound, e.g. NF3, from a gas source 12. In one embodiment of the present invention, F2 can be provided by a F80 type generation cell without requiring an NaF bed or compressors. The activation is confined at exactly the point that needs to be etched by creating an argon curtain 14, surrounding a jet OfF2 16. The laser 10, heats the surface of a substrate 18, to just the temperature that the fluorine activates and reacts with the silicon to form a small quantity of SiF4. The activation creates fluorine radicals, but because F2 will only react when the temperature for activation is achieved, the reaction will be confined to the place where all three components intersect: i e. the surface of the substrate 18, the laser beam 10, and the F2 16. The fluorine gas supply can be continuous or pulsed. By pulsing the fluorine gas, it is possible to control the amount of Si being consumed with each pulse and the activation interface 20 can be confined. By exercising such control, the lateral expansion of the etch is reduced to produce an anisotropic cut m the silicon. Using a pulsed laser with the continuous or pulsed fluorine provides other advantages, such as allowing the etch by-products to be escape or be removed.
(018) An etch chamber 22, in which the processing of the substrate 18 takes place is partially shown m Figure 2. This etch chamber may be the same chamber m which thinning is previously or subsequently done carried out. The substrate 18 is preferably held on dicing tape (note shown). Ih operation, the chamber 22, is evacuated and backfilled to a certain pressure with a gas that is or contains fluorine optionally mixed with argon. The total pressure can be as low as 1 Torr or as high as 100 Torr, although etching is possible even outside this range. Use of atmospheric pressure with an inert gas purge is also possible. The fluorine concentration can be between 10% and 100%. A vacuum, inert gas flow or recirculation system, e.g. a stirring fan, may be used to move etch byproducts from the etch area and replace the etch area with fresh fluorine. A DC bias voltage may be applied and the laser beam 10, is turned on and focused at the surface of the substrate 18, with a point diameter smaller than the required via or kerf dimension. Optimization of the relationship between laser dimension and via or kerf dimension can be carried out by one skilled in the art. Only the gas that is intersected by the laser beam 10, is activated at the activation interface 20 By keeping the laser beam short and pulsing the gas source, the amount of gas between the substrate and the lens/window is kept small. Therefore, little excess gas is activated, minimizing the amount that could do unwanted lateral etching, hi this regard, the use of a non-reactive gas, such as NF3, can help to avoid unwanted etching that may be caused by using molecular F2.
(019) To retain F2 close to the activation interface 20, the argon curtain 14 is provided. The argon is provided from an argon source 24, and can be pre-heated by passing through a packed bed 26, having a heater 28. The fluorine gas is provided from the fluorine gas source 12, and is injected through a quartz or sapphire feed tube 30, that is cooled by cooling jacket 32, supplied with cooling water from water source 34. The fluorine gas exits through a sapphire nozzle 36, that also serves as a mix zone just above the substrate 18. The laser 10, passes through a window 38, on the cold end of the feed tube 30. Because this is in the cold zone, the window 38 can be made of glass, quartz or sapphire. The cooled fluorine gas is heated by the laser 10, as it passes through the feed tube 30, but by careful control, the temperature required for fluorine activation is not reached until the point of contact with the substrate 18. The temperature at the intersection point can range from 100 0C to 4000C for F2, while higher temperatures would be needed to activate NF3, SF6, etc. By adjusting the argon pre-heat temperature, the fluorine gas pulse, the laser pulse/power and chamber pressure, the optimum street width and cut rate can be established and maintained. The chamber pressure can range from a few Torr to atmospheric pressure if inert gases can be used to carry the by-products away effectively. By carrying out the F2 assisted laser etch in accordance with the present invention, the silicon is removed chemically and no chipping will occur. The wafer is kept cool to prevent the circuits from being affected. If dicing tape is used, it should be selected to be at least moderately resistant to F2 attack.
(020) The laser beam 10, is maintained until the required depth is achieved for either a blind via or through the entire wafer. To etch a line, movement of either the laser beam 10, or the substrate 18, is required. Movement of the laser 10, can be accomplished by physical movement or by adjusting optical arrangements, but the ability to move the cutting line in both the X and Y coordinates is required. Use of a beam splitter or more than one laser allows for reduced processing time as more than one via or dicing street can be produced simultaneously. In addition, via etching and wafer dicing can be carried out in the same process step. Etching is completed by turning the laser beam off and evacuating the chamber. The etched wafer or die from a diced wafer can then be transferred to a further processing step.
(021) In one alternative of the present invention, the fluorine can be provided through a nozzle directly to the intersection with the laser beam. The velocity of the fluorine in this embodiment can be adjusted for optimal interaction at the substrate surface.
(022) In another embodiment of the present invention a higher power laser is used. The high power laser has a frequency spectrum that is absorbed by the fluorine containing gas and is also absorbed by silicon so that the silicon melts or evaporates. This embodiment provides a faster cutting process, because the fluorine activates to perform fluorine etching, and some cutting by laser ablation also occurs. An optimum balance between fluorine etch and laser ablation as well as control of the laser power level can be achieved, hi addition, using a DC bias voltage may encourage the fluorine radicals to impinge on the wafer surface if a charge can be imparted to the thermally activated gas. Similarly, inducing vibration to the wafer may increase cutting efficiency, although potential damage to the integrated circuitry will need to be avoided.
(023) A further embodiment of the present invention allows for better control of directionality of the etch for dicing operations. In particular, as noted above, the amount of F2 in the system needed to carry out the dicing operations must be carefully controlled to avoid the expansion of the etch trough because of the presence of excess F2. According to the present invention, side etching can be controlled by starting at the edge of a wafer. In this manner, as the trough forms, it acts as a guide to move excess gases away from the sidewall and avoid over etching. In addition, the present invention can be used for surface cleaning of organic or silicon-containing coatings off of metal or ceramic surfaces using thermally activated F2. In this case anisotropy is not important because the coating may be removed in all directions and the etching will stop upon reaching the less reactive metal or ceramic substrate.
(024) As will be appreciated, the present invention provides a number of advantages. In particular, the present invention avoids damage of the wafer that can be caused by the prior art methods of cutting the silicon wafers using abrasive saws or by melting the silicon with a laser. Further, the prior art methods are significantly more time consuming than the operations according to the present invention, hi addition, the present invention allows for flexibility in the shape to be etched as opposed to the use of abrasive saws that can accommodate only straight lines. Moreover, the present invention uses thermal F2 reaction to remove the silicon in a chemical reaction as a gas, e.g. SiF4. This avoids damage caused by the prior art methods of cutting along a kerf or melting of the silicon.
(025) Figure 2 shows an apparatus according to a further embodiment of the present invention that is used in cutting a silicon wafer. As shown, F2 gas is introduced from an gas source 50, through a feed tube 52, preferably made of sapphire mateπal because the crystalline Al2O3 (sapphire) forms a passive AlF3 layer that avoids reaction with F2 at high temperatures. An inert gas such as N2 or Ar is introduced from inert gas source 54, through a packed bed 56, and heater 58, combination into an outer tube 60 The inert gas is heated to the reaction temperature, i e the temperature that when mixed with F2 will react with silicon The heated inert gas passes through the outer tube 60, and then heats the F2 exiting from the feed tube 52, to the reaction temperature Both gas streams emerge withm the process chamber, defined by chamber wall 62, generally as an F2 jet having an argon shield curtain Only at the point where the F2, hot inert gas and the silicon substrate 64, come into contact, i.e. at the activation interface 66, will combustion of silicon occur and SiF4 will form A laser 68, projected through a window 70, can provide extra focused heat to aid m further localizing of the reaction zone As noted above, in accordance with the present invention, the reaction can begin at the edge of the silicon substrate 64, to create a trough as the silicon reacts The injected gases follow the trough as cutting proceeds. This can be compared to the operation of an oxygen acetylene cutting torch wherein cutting action occurs along the path of a flowing oxygen stream directed toward the hot metal. In the present invention, SiF4 gas will form and the cut will be confined to the cutting trough by the F2 flow, the inert gas curtain, the higher temperature laser spot on the wafer and the trough being formed
(026) When the gas emerges from the bottom of the substrate 64, it will be drawn into a porous bed of activated Al2O3 68, that will absorb both HF and unreacted F2 to form inert AlF3. In this manner, excess F2 is eliminated and avoids reaction with the backside of the wafer and to provide further control of the cutting zone
(027) The present invention provides several advantages over the prior art methods In particular, debris and stress damage from mechanical cutting can be completely avoided Further, by using F2 to chemically react with the silicon and form a by-product gas, the operation temperature can be lower than that necessary to melt silicon as required when using a laser alone This again avoids damage to the wafer. The chemical reaction with F2 provides the ability to remove the silicon as a gas by-product and avoids formation of solid by-products, such a SiO2 that could form if using O2 gas. F2 gas assisted laser cutting avoids the formation of a solid silicon kerf formed by mechanical cutting and also avoids the formation of silicon and glass solids that can form when using laser melting techniques. In accordance with the present invention, the design of the injection nozzle, inert gas outer tube, laser focusing and the activated alumina abatement can be optimized to control the width and shape of the cut. While F2 gas is preferred, other fluorine source gases may be utilized, but will normally require plasma reaction, e.g. ICP or RF at vacuum.
(028) The present invention is also useful for surface cleaning operations. For example, lithography systems in fabs require periodic removal of accumulated photoresist and other materials. This is generally accomplished by disassembling the machine and separately cleaning the parts and therefore requires a significant amount of downtime and labor. The present invention provides a means of cleaning the machine surfaces without requiring disassembly.
(029) Figure 3 is a schematic drawing showing the basic components of the present invention needed to carry out surface cleaning operations. F2 from gas source 80, is supplied to a feed tube 82, such as a sapphire tube, surrounded by an outer tube 84, that provides a hot inert gas flow. The inert gas is provided from inert gas source 86, and can be heated using a packed bed of metal 88, and heater 90, combination. The feed tube 82, and outer tube 84, form a heat exchange unit that heats the F2 to the desired operating temperature. The hot inert gas and hot F2 gases emerge, such as through a nozzle (note shown), as an F2 jet having a hot inert gas curtain at the coating burning zone 92. A laser 94, directed through a window 96, can optionally be provided to provide greater temperature control at the coating burning zone 92. Only where the F2, hot inert gas, laser light and the coating are present will the reaction take place and coating be removed. The F2 will react with all hydrocarbon and silicon containing compounds to form gaseous compounds that can be removed from the chamber through vacuum exhaust 98. The addition of some O2 can further react with the carbon to form CO2 as another gas by-product. The metal surface 95, of the chamber will act as a stop to the chemical reaction because the metal will not react with F2. However, the temperature and relative flows of F2 and inert gas can be adjusted to avoid the formation of MFx passivation layers, m particular, the temperature should be kept low enough to avoid any reaction that the underlying metal surfaces, so that only unwanted photoresist, silicone, hydrocarbon, etc. deposits are removed. A neutralization step to remove residual acids on the metal surfaces can be earned out before putting the chamber back into service. An activated alumina bed can be used to absorb both by-products and unconsumed F2 and form inert AlF3
(030) For the embodiment shown m Figure 3, the F2 can be provided by a F80 type generation cell without requiring an NaF bed or compressors. Surge capacity will be minimal. All of the necessary equipment, i.e F2 generation, controls, vacuum and abatement can be contained m a rolling cart with a suitably long hose. All of the gases can be supplied sub-atmospheπcally through the hose Because the F2 is supplied at sub-atmosphenc pressure, no F2 can flow unless the head is sealed to the surface. Therefore, a fluorocarbon gasket 97, is provided to seal the head to the chamber surface and form a negative pressure zone m the head While operators will have appropriate protective clothing, etc, the potential release of reactive or toxic gas can be largely avoided by head design and use of the gasket In particular, because of the sub-atmosphenc delivery, once the head breaks contact with the surface, gas flow automatically stops. Air that may be pulled into the head will not affect the cleaning process but all gases entering the chamber will be drawn to appropriate abatement equipment through the vacuum 98, that can also be attached to the hose The present invention can be applied to any organic, silicon or tungsten containing coating on most metal surfaces, although it is particularly effective for cleaning aluminum surfaces.
(031) It will be understood that the embodiments descnbed herein are merely exemplary, and that one skilled in the art may make vanahons and modifications without departing from the spirit and scope of the invention. All such vanations and modifications are intended to be included within the scope of the invent on as descnbed hereinabove. Further, all embodiments disclosed are not necessanly m the alternative, as vanous embodiments of the invention may be combined to provide the desired result.

Claims

Claims
1 A method of dicing a silicon wafer comprising. providing a fluorine containing gas to the wafer at the point where dicing is to occur; heating the fluorine containing gas to a temperature where the fluorine is activated and with chemically react with the silicon in the wafer at the point where dicing is to occur, allowing the activated fluorine to react with the silicon until the desired dicing is completed.
2 A method according to claim 1, wherein the fluorine containing gas is F2
3. A method according to claim 1 , wherein the inert gas is nitrogen or argon.
4 A method according to claim 1, wherein heating comprises heating with a laser
5. An apparatus for dicing a silicon wafer comprising. a fluorine containing gas source; an inert gas source; a laser; delivery means to provide the fluorine containing gas, the inert gas and the laser to the point on the wafer where dicing is to occur; and control means to activate the fluorine using the inert gas and the laser so cause dicing of the wafer
6. A method of forming a via m a silicon wafer compπsing. providing a fluorine containing gas to the wafer at the point where the via is to be formed; heating the fluorine containing gas to a temperature where the fluorine is activated and with chemically react with the silicon in the wafer at the point where the via is to be formed, allowing the activated fluorine to react with the silicon until the desired via is completed.
7 A method according to claim 6, wherein heating comprises heating with a laser.
8 A method of cleaning the surfaces of a deposition chamber comprising providing a fluorine containing gas to the point of the deposition chamber surface where cleaning is to occur, heating the fluorine containing gas to a temperature where the fluorine is activated and with chemically react with deposits on the surface of the deposition chamber at the point where cleaning is to occur, allowing the activated fluorine to react with the deposits until the desired cleaning is completed
9. A method according to claim 8, wherein heating composes heating with a laser
10. An apparatus for cleaning a deposition chamber comprising- a fluorine containing gas source, an inert gas source, a laser; delivery means to provide the fluorine containing gas, the inert gas and the laser to the point on the surface of the deposition chamber where cleaning is to occur, and control means to activate the fluorine using the inert gas and the laser so cause cleaning of the surface
PCT/US2008/063141 2007-05-10 2008-05-09 Laser activated fluorine treatment of silicon substrates WO2008141118A1 (en)

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US92854607P 2007-05-10 2007-05-10
US60/928,546 2007-05-10

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5669979A (en) * 1993-09-08 1997-09-23 Uvtech Systems, Inc. Photoreactive surface processing
US20050236378A1 (en) * 2002-04-19 2005-10-27 Adrian Boyle Program-controlled dicing of a substrate using a pulsed laser
US20060249480A1 (en) * 2003-03-04 2006-11-09 Adrian Boyle Laser machining using an active assist gas

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5669979A (en) * 1993-09-08 1997-09-23 Uvtech Systems, Inc. Photoreactive surface processing
US20050236378A1 (en) * 2002-04-19 2005-10-27 Adrian Boyle Program-controlled dicing of a substrate using a pulsed laser
US20060249480A1 (en) * 2003-03-04 2006-11-09 Adrian Boyle Laser machining using an active assist gas

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