WO2008033313A3 - Programmable interface for single and multiple host use - Google Patents

Programmable interface for single and multiple host use Download PDF

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Publication number
WO2008033313A3
WO2008033313A3 PCT/US2007/019684 US2007019684W WO2008033313A3 WO 2008033313 A3 WO2008033313 A3 WO 2008033313A3 US 2007019684 W US2007019684 W US 2007019684W WO 2008033313 A3 WO2008033313 A3 WO 2008033313A3
Authority
WO
WIPO (PCT)
Prior art keywords
unit interface
host
controller
multiple host
programmable interface
Prior art date
Application number
PCT/US2007/019684
Other languages
French (fr)
Other versions
WO2008033313A2 (en
Inventor
Robert James
David Carr
Original Assignee
Integrated Device Tech
Robert James
David Carr
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Integrated Device Tech, Robert James, David Carr filed Critical Integrated Device Tech
Publication of WO2008033313A2 publication Critical patent/WO2008033313A2/en
Publication of WO2008033313A3 publication Critical patent/WO2008033313A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Abstract

A serial interface (200) including a controller (230), a first unit interface (202), and a second unit interface (203). The first unit interface communicatively couples the controller with a host (120), wherein the first unit interface communicates with the host through a first se of lanes (515). The second unit interface communicatively couples the controller with the host, wherein the second unit interface communicates with the host through a second set of lanes (525), wherein the controller bonds the first unit interface and the second unit interface to function as a single entity for communicating with the host.
PCT/US2007/019684 2006-09-14 2007-09-10 Programmable interface for single and multiple host use WO2008033313A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/522,173 2006-09-14
US11/522,173 US20080071948A1 (en) 2006-09-14 2006-09-14 Programmable interface for single and multiple host use

Publications (2)

Publication Number Publication Date
WO2008033313A2 WO2008033313A2 (en) 2008-03-20
WO2008033313A3 true WO2008033313A3 (en) 2008-09-04

Family

ID=39184282

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/019684 WO2008033313A2 (en) 2006-09-14 2007-09-10 Programmable interface for single and multiple host use

Country Status (2)

Country Link
US (1) US20080071948A1 (en)
WO (1) WO2008033313A2 (en)

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US7774526B2 (en) * 2006-09-14 2010-08-10 Integrated Device Technology, Inc. Method for deterministic timed transfer of data with memory using a serial interface
US8296486B2 (en) * 2008-03-17 2012-10-23 International Business Machines Corporation Peripheral device enabling enhanced communication
US7873768B2 (en) * 2008-03-17 2011-01-18 International Business Machines Corporation Peripheral device enabling enhanced communication
US20090234991A1 (en) * 2008-03-17 2009-09-17 International Business Machines Corporation Enhanced throughput communication with a peripheral device
JP2015043170A (en) * 2013-08-26 2015-03-05 株式会社東芝 Interface circuit and system
DE102022108950A1 (en) * 2021-04-16 2022-10-20 Maxlinear, Inc. DEVICE WITH MULTI-CHANNEL BONDING

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US20040178576A1 (en) * 2002-12-13 2004-09-16 Hillis W. Daniel Video game controller hub with control input reduction and combination schemes

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Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6512804B1 (en) * 1999-04-07 2003-01-28 Applied Micro Circuits Corporation Apparatus and method for multiple serial data synchronization using channel-lock FIFO buffers optimized for jitter
US20040178576A1 (en) * 2002-12-13 2004-09-16 Hillis W. Daniel Video game controller hub with control input reduction and combination schemes

Also Published As

Publication number Publication date
US20080071948A1 (en) 2008-03-20
WO2008033313A2 (en) 2008-03-20

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