WO2008011329A3 - Method and system for isolated and discretized process sequence integration - Google Patents

Method and system for isolated and discretized process sequence integration Download PDF

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Publication number
WO2008011329A3
WO2008011329A3 PCT/US2007/073368 US2007073368W WO2008011329A3 WO 2008011329 A3 WO2008011329 A3 WO 2008011329A3 US 2007073368 W US2007073368 W US 2007073368W WO 2008011329 A3 WO2008011329 A3 WO 2008011329A3
Authority
WO
WIPO (PCT)
Prior art keywords
modules
processing
isolated
substrate
process sequence
Prior art date
Application number
PCT/US2007/073368
Other languages
French (fr)
Other versions
WO2008011329A2 (en
Inventor
Tony P Chiang
Richard R Endo
James Tsung
Original Assignee
Intermolecular Inc
Tony P Chiang
Richard R Endo
James Tsung
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/672,473 external-priority patent/US8815013B2/en
Application filed by Intermolecular Inc, Tony P Chiang, Richard R Endo, James Tsung filed Critical Intermolecular Inc
Priority to JP2009520905A priority Critical patent/JP5389645B2/en
Priority to EP07840397A priority patent/EP2044623A4/en
Priority to KR1020097001016A priority patent/KR101412398B1/en
Priority to CNA2007800265640A priority patent/CN101490834A/en
Publication of WO2008011329A2 publication Critical patent/WO2008011329A2/en
Publication of WO2008011329A3 publication Critical patent/WO2008011329A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67184—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the presence of more than one transfer chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H01L21/67225—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one lithography chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67236—Apparatus for manufacturing or treating in a plurality of work-stations the substrates being processed being not semiconductor wafers, e.g. leadframes or chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67742—Mechanical parts of transfer devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68707—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a robot blade, or gripped by a gripper for conveyance

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Robotics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physical Vapour Deposition (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

A system for processing a semiconductor substrate is provided. The system includes a mainframe having a plurality of modules attached thereto. The modules include processing modules, storage modules, and transport mechanisms. The processing modules may include combinatorial processing modules and conventional processing modules, such as surface preparation, thermal treatment, etch and deposition modules. In one embodiment, at least one of the modules stores multiple masks. The multiple masks enable in-situ variation of spatial location and geometry across a sequence of processes and/or multiple layers of a substrate to be processed in another one of the modules. A method for processing a substrate is also provided.
PCT/US2007/073368 2006-07-19 2007-07-12 Method and system for isolated and discretized process sequence integration WO2008011329A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2009520905A JP5389645B2 (en) 2006-07-19 2007-07-12 Method and system for integration of sequences of isolation and discretization processes
EP07840397A EP2044623A4 (en) 2006-07-19 2007-07-12 Method and system for isolated and discretized process sequence integration
KR1020097001016A KR101412398B1 (en) 2006-07-19 2007-07-12 Method and system for isolated and discretized process sequence integration
CNA2007800265640A CN101490834A (en) 2006-07-19 2007-07-12 Method and system for isolated and discretized process sequence integration

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US83224806P 2006-07-19 2006-07-19
US60/832,248 2006-07-19
US11/672,473 US8815013B2 (en) 2006-07-19 2007-02-07 Method and system for isolated and discretized process sequence integration
US11/672,473 2007-02-07
US11/672,478 2007-02-07
US11/672,478 US7867904B2 (en) 2006-07-19 2007-02-07 Method and system for isolated and discretized process sequence integration

Publications (2)

Publication Number Publication Date
WO2008011329A2 WO2008011329A2 (en) 2008-01-24
WO2008011329A3 true WO2008011329A3 (en) 2008-03-20

Family

ID=38957500

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/073368 WO2008011329A2 (en) 2006-07-19 2007-07-12 Method and system for isolated and discretized process sequence integration

Country Status (5)

Country Link
EP (1) EP2044623A4 (en)
JP (1) JP5389645B2 (en)
KR (1) KR101412398B1 (en)
CN (1) CN101490834A (en)
WO (1) WO2008011329A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102075528B1 (en) * 2013-05-16 2020-03-03 삼성디스플레이 주식회사 Deposition apparatus, method for manufacturing organic light emitting display apparatus, and organic light emitting display apparatus

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4613981A (en) * 1984-01-24 1986-09-23 Varian Associates, Inc. Method and apparatus for lithographic rotate and repeat processing
US6675469B1 (en) * 1999-08-11 2004-01-13 Tessera, Inc. Vapor phase connection techniques
US20050029089A1 (en) * 1999-01-26 2005-02-10 Symyx Technologies, Inc. Method and apparatus for creating radial profiles on a substrate
US20050230765A1 (en) * 2004-03-31 2005-10-20 Eudyna Devices Inc. Semiconductor device, mask for impurity implantation, and method of fabricating the semiconductor device
US20060134347A1 (en) * 2004-12-20 2006-06-22 Shivkumar Chiruvolu Dense coating formation by reactive deposition
US20060134330A1 (en) * 2004-12-22 2006-06-22 Applied Materials, Inc. Cluster tool architecture for processing a substrate

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4588167B2 (en) * 2000-05-12 2010-11-24 株式会社半導体エネルギー研究所 Method for manufacturing semiconductor device
MY141175A (en) * 2000-09-08 2010-03-31 Semiconductor Energy Lab Light emitting device, method of manufacturing the same, and thin film forming apparatus
US8900366B2 (en) * 2002-04-15 2014-12-02 Samsung Display Co., Ltd. Apparatus for depositing a multilayer coating on discrete sheets
JP2004349508A (en) * 2003-05-22 2004-12-09 Applied Materials Inc Substrate processing method, mask member set, substrate processing apparatus, element or semiconductor device manufacturing method, and element or semiconductor device manufacturing condition determining method
KR20060007211A (en) * 2004-07-19 2006-01-24 삼성전자주식회사 Exposure system

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4613981A (en) * 1984-01-24 1986-09-23 Varian Associates, Inc. Method and apparatus for lithographic rotate and repeat processing
US20050029089A1 (en) * 1999-01-26 2005-02-10 Symyx Technologies, Inc. Method and apparatus for creating radial profiles on a substrate
US6675469B1 (en) * 1999-08-11 2004-01-13 Tessera, Inc. Vapor phase connection techniques
US20050230765A1 (en) * 2004-03-31 2005-10-20 Eudyna Devices Inc. Semiconductor device, mask for impurity implantation, and method of fabricating the semiconductor device
US20060134347A1 (en) * 2004-12-20 2006-06-22 Shivkumar Chiruvolu Dense coating formation by reactive deposition
US20060134330A1 (en) * 2004-12-22 2006-06-22 Applied Materials, Inc. Cluster tool architecture for processing a substrate

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP2044623A4 *

Also Published As

Publication number Publication date
EP2044623A2 (en) 2009-04-08
KR20090060261A (en) 2009-06-11
JP2009544173A (en) 2009-12-10
WO2008011329A2 (en) 2008-01-24
CN101490834A (en) 2009-07-22
EP2044623A4 (en) 2012-10-03
KR101412398B1 (en) 2014-06-25
JP5389645B2 (en) 2014-01-15

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