WO2007131334A1

WO2007131334A1 - Multi-pixel light emitting module

Info

Publication number: WO2007131334A1
Application number: PCT/CA2007/000814
Authority: WO
Inventors: Philippe Guillemot
Original assignee: Imaginum Inc.
Priority date: 2006-05-11
Filing date: 2007-05-11
Publication date: 2007-11-22

Abstract

A substrate for a multi-pixel display device. The substrate comprises a panel including a first and a second main surfaces opposite one another and in a spaced apart relationship, the first surface capable of receiving an array of pixels. The substrate may comprise a plurality of conductive pathways for conducting electrical signals to address the pixels, the plurality of conductive pathways including segments extending through the panel from the first surface to the second surface. Alternatively, the substrate may comprise a plurality of electrical terminals in a spaced apart relationships distributed on the second surface for receiving electrical signals for addressing respective ones of the pixels. The panel may form an air-tight structure to prevent air from propagating from the second surface to the first surface through the panel. A multi-pixel display device comprising such a substrate is also provided. The multi-pixel display device may comprise an integrated circuit for driving the pixels mounted on the second surface. Also provided are an imaging device comprising a tiled arrangement of two or more multi-pixel display modules, a process manufacturing a multi-pixel display device, a device for producing artificial light to illuminate an enclosure, and an imaging device comprising a light transmissive image generation layer and a backlight layer.

Description

TITLE: Multi-Pixel Light Emitting Module

FIELD OF THE INVENTION

The invention relates to opto-electric light emitting devices and more particularly to a multi-pixel module. The module can be used standalone for certain applications or tiled with other modules to form a larger light emitting device.

SUMMARY OF THE INVENTION

In a first broad aspect the invention provides a substrate for a multi-pixel display device, comprising: a) a panel including a first and a second main surfaces opposite one another and in a spaced apart relationship, said first surface capable of receiving an array of pixels; b) a plurality of conductive pathways for conducting electrical signals to address the pixels, the plurality of conductive pathways including segments extending through said panel from said first surface to said second surface.

For the purpose of this specification, the term "pixel" encompasses a light emitting entity. Pixels can be used for various applications. One example is a display device which produces an image or portions thereof (by "image" is meant graphics, text or both). The image can be static or can dynamically change. Another example is a device for producing artificial light to illuminate an enclosure, such as a room. In such case the pixels would normally remain lit to generate a light output, not for producing an image. Note that the invention can encompass the functionality of both devices, where the pixels provide illumination and also may produce an image, such as light pattern. Yet another possible application is for a backlight layer for an imaging device. Traditional imaging devices use a light transmissive image generation layer through which light is projected by a backlight source. The image generation layer filters the light to produce an image. Irrespective of the application selected, a pixel may be a unitary structure that including a single light emitting entity such as for example a light emitting entity that produces monochromatic light. Alternatively a pixel may be a compound structure, including, for example, two or more light emitting entities (referred to as "sub-pixels") where each sub-pixel produces a different color light. For imaging applications, a pixel (unitary or of the compound type) may be based on an active emissive technology where an emissive substance is excited to produce either monochromatic light (in the case of a unitary pixel) or multicolor light in the case of a compound type pixel. In a variant a pixel may be based on a passive light filtering technology where a light source, that can be common to a group of pixels, is filtered by the individual pixels to output filtered light. The filtering controls the amount of light that will be output and also the color of the light. In the case of a unitary pixel a single filter may be used while in the case of compound pixels, multiple filters may be used.

For backlighting and illumination applications the pixels are based on an emissive technology where they produce a light output.

In a second broad aspect the invention provides a substrate for a multi- pixel display device, comprising: a) a panel including a first and a second main surfaces opposite one another and in a spaced apart relationship, said first surface capable of receiving an array of pixels; b) a plurality of electrical terminals in a spaced apart relationships distributed on said second surface for receiving electrical signals for addressing respective ones of said pixels.

In a third broad aspect the invention provides a multi-pixel display device, comprising: a) a panel having a first main surface and an opposite second main surface; b) an array of pixels on said first surface; a plurality of conductive pathways for conducting electrical signals to address the pixels of the array, the plurality of conductive pathways including segments extending through said panel from said first surface to said second surface

In a fourth broad aspect the invention provides a multi-pixel display device, comprising: a) a panel having a first main surface and an opposite second main surface; b) an array of pixels on said first surface; c) a plurality of electrical terminals in a spaced apart relationships distributed on said second surface for receiving electrical signals for addressing respective ones of said pixels.

In a fifth broad aspect the invention provides a multi-pixel display device, comprising: a) a panel having a first main surface and an opposite second main surface; b) an array of pixels on said first surface; c) a plurality of conductive pathways passing through said panel for carrying electrical signals for addressing said pixels; d) said panel forming an air-tight structure to prevent air from propagating from said second surface to said first surface through said panel.

In a sixth broad aspect the invention provides a multi-pixel display device, comprising: a) a panel having a first main surface and an opposite second main surface; b) an array of pixels on said first surface; c) an integrated circuit for driving said pixels mounted on said second surface; d) a plurality of conductive pathways on said panel between said integrated circuit and said pixels, said conductive pathways allowing said integrated circuit to address said pixels.

In a seventh broad aspect the invention provides an imaging device, comprising: a) a tiled arrangement of two or more multi-pixel display modules, each multi-pixel display module having: i) a panel having a first main surface and an opposite second main surface; ii) an array of pixels on said first surface; iii) an integrated circuit for driving said pixels mounted on said second surface; iv) a plurality of conductive pathways on said panel between said integrated circuit and said pixels, said conductive pathways allowing said integrated circuit to address said pixels. b) a data communicative pathway between the integrated circuits of two or more of the multi-pixel display modules, said two ore more multi- pixel display modules being assembled edge to edge to form said tiled arrangement.

In an eight broad aspect the invention provides a process for manufacturing a multi-pixel display device, the process including: a) providing a panel with a first main face and a second main face opposite the first main face; b) forming in the panel a plurality of passageways extending between the first main face and the second main face; c) forming a plurality of conductive pathways on the panel, the conductive pathways including segments extending through respective ones of the passageways; d) depositing on the first surface blocks of emissive material to form an array of pixels; e) the conductive pathways connecting with respective blocks of emissive material to allow addressing the pixels by applying electrical signals to the conductive pathways.

In a ninth aspect the invention also provides a device for producing artificial light to illuminate an enclosure, said device comprising: a) a panel having a first main surface and an opposite second main surface; b) an array of pixels on said first surface; c) an integrated circuit for driving said pixels mounted on said second surface.

In a tenth aspect the invention also provides a substrate for a device producing artificial light to illuminate an enclosure, comprising: a) a panel including a first and a second main surfaces opposite one another and in a spaced apart relationship, said first surface capable of receiving an array of pixels; b) a plurality of conductive pathways for conducting electrical signals to address the pixels, the plurality of conductive pathways including segments extending through said panel from said first surface to said second surface.

In an eleventh aspect the invention also provides an imaging device, comprising: a) a light transmissive image generation layer; b) a backlight layer for producing light to be transmitted through said light transmissive image generation layer, wherein said image generation layer filters the light from said backlight layer to produce a visible image, said backlight layer including: i) a panel having a first main surface and an opposite second main surface; ii) an array of pixels on said first surface to generate light toward said image generation layer; iii) an integrated circuit for driving said pixels mounted on said second surface; iv) a plurality of conductive pathways on said panel between said integrated circuit and said pixels, said conductive pathways allowing said integrated circuit to address said pixels.

l o BRIEF DESCRIPTION OF THE DRA WINGS

A detailed description of examples of implementation of the present invention is provided hereinbelow with reference to the following drawings, in which:

15 Figure 1 is a vertical cross-sectional view of a panel used for making a substrate of a multi-pixel display module, according to a non-limiting example of implementation of the invention;

Figure 2 is a vertical cross-sectional view of the panel in Figure 1 , 20 showing vias drilled in the panel;

Figure 3 is a vertical cross-sectional view of the panel of Figure 2 following the deposition of a metallic layer that extends in the vias;

25 Figure 4 is a vertical cross-sectional view of the panel of Figure 3, following the formation of air-tight plugs in the vias;

Figure 5 is a vertical cross-sectional view of the panel of Figure 4, following the formation on the panel of insulation zones and receptacles for 30 blocks of emissive material;

Figure 6 is a vertical cross-sectional view of the panel of Figure 5, following the deposition of emissive layer blocks forming the emissive layer of the multi-pixel display module;

Figure 7 is a vertical cross-sectional view of the panel of Figure 6, following the application of a light transmissive common electrode;

Figure 8 is a vertical cross-sectional view of the panel of Figure 7, following the application of an RGB filter layer;

Figure 9 is a vertical cross-sectional view of the panel of Figure 8, following the application of a glue layer;

Figure 10 is a vertical cross-sectional view of the panel of Figure 9, following the application of a top protective transparent layer;

Figure 11 is a vertical cross-sectional view of the panel shown at Figure

10, showing the sealing operation performed on the protective transparent layer;

Figure 12 is a vertical cross-sectional view of the panel of Figure 6 according to a variant that uses different blocks of emissive material providing different color emissions;

Figure 13 is a vertical cross-sectional view of the panel of Figure 12, following the application of a light transmissive common electrode;

Figure 14 is a vertical cross-sectional view of the panel of Figure 13, following the application of a glue layer;

Figure 15 is a vertical cross-sectional view of the panel of Figure 14, illustrating the application of a top protective transparent layer;

Figure 16 is a vertical cross-sectional view of the panel shown at Figure 15, illustrating the sealing operation on the protective transparent layer; Figure 17 is a top plan view of the panel shown at Figure 16;

Figure 18 is a top plan view of the panel of Figure 17, according to a first variant;

Figure 19 is a top plan view of the panel of Figure 18, according to a second variant;

Figure 20 is cross-sectional view of a pair of panels as shown at Figure

17, tiled together on a PCB;

Figure 21 is a cross-sectional view of the pair of panels shown in Figure 17, according to a variant;

Figure 22 is a fragmentary view of the rear side of anyone of the panels shown at Figures 20 and 21 ; and

Figure 23 is a cross-sectional view of a panel according to another non- limiting example of implementation of the invention illustrating in greater detail the signal lines architecture for driving the pixels;

Figure 24 is a perspective view of a panel of the type shown in Figure 23 that has been scaled up and accommodates a multiple integrated circuits to drive a larger pixel array;

Figure 25 is a cross-sectional view of another variant where an intermediate PCB layer is used between the panel and the IC drive circuit;

Figure 26 is a cross-sectional view of an imaging device using a backlight constructed according to a non-limiting example of implementation of the invention; Figure 27 illustrates components of an IC driver for driving pixels of a display; and

Figure 28 is a more detailed block diagram of the IC driver shown in Figure 27.

In the drawings, embodiments of the invention are illustrated by way of example. It is to be expressly understood that the description and drawings are only for purposes of illustration and as an aid to understanding, and are not intended to be a definition of the limits of the invention.

DETAILED DESCRIPTION

Figures 1 to 22 illustrate generally the manufacturing process of a multi-pixel display module according to two non-limiting examples of implementation of the invention. The multi-pixel display module is used for imaging applications where the intent is to produce an image (graphics, text or both) to be seen by the human eye. As indicated previously, the invention is not limited to those applications and can also have other uses. Examples of other uses will be provided later.

As shown in Figure 1 , the process starts by providing a suitable substrate on which the opto-electric hardware will be formed. In this example, a panel of PCB material 10 is used. The size of the panel 10 depends on the desired final dimensions of the multi-pixel display module. The examples in this specification illustrate a display module having only four pixels. This is done only to facilitate the illustration of the various components of the display module. In most practical implementations the number of pixels on a module will be higher, such as arrays of 16X16 pixels, for example.

The composition of the panel 10 and its characteristics should be selected in accordance with the details of the manufacturing process. For example, if the multi-pixel display module has pixels made by deposition of blocks of emissive material, the surface roughness of the panel 10 needs to be adequately controlled. The desired surface roughness can be attained by mechanical means such as polishing or chemical treatments, as is known to those skilled in the art.

PCB material can be any of a wide range of materials suitable for use in printed circuit technology. One example of PCB material is a woven fiberglass mat impregnated with epoxy resin. Other PCB materials exist, each having particular physical and electrical characteristics suited for various operating conditions. It is to be understood that panel 10 can be made of any suitable PCB material.

Furthermore, a wide range of other materials can be used to make the panel 10, PCB material being only one example. Other materials include glass, ceramics or plastics. A composition of different materials can also be used. For instance the panel 10 can be made as a PCB like structure which includes several individual layers made of glass or other types of fibers that are retained to one another by a suitable resin. The PCB type structure offers a number of advantages, in particular the ability to create a complex signal pathway within the panel, as it will be discussed later.

In Figure 2, the panel 10 has been provided with an array of vias. Each via 12 extends between the first main surface 14 and the second main surface 16 of the panel 10. In this example, the first main surface 14 is the top surface of the panel while the second main surface 16 is the bottom surface. The array of vias 12 can be made by mechanical processing such as by drilling each individual via 12 separately. Alternatively, a selective chemical etching process can be used to dissolve the glass material only where the vias 12 are desired. Irrespective of the process chosen, the individual vias 12 extend from the first main surface 14 to the bottom main surface 16. Each via 12 extends along an imaginary axis that is generally perpendicular to the first main surface 14 and the second main surface 16. The next step of the process shown at Figure 3 is to apply on the panel 10 a conductive coating such as a metallic coating 18. The metallic coating 18 is designed to cover the first main surface 14, the second main surface 16 and to extend into the vias 12. The process selected to deposit the metallic coating 18 can vary without departing from the spirit of the invention. In one specific example, a Chemical Vapor Deposition (CVD) technique may be used. Alternatives include an electrolytic deposition process or an electroless deposition process. As to the particular metallic material used, again, it can vary according to the intended application or process technique chosen. Examples include copper and aluminum among many others. The thickness of the coating 18 will vary according to the intended application. For example, the thickness of the coating 18 may be in the order of tens of angstroms to several microns.

In Figure 4, the panel 10 which carries the conductive coating 18 is treated to make it air-tight. By air-tight is meant that the panel 10 will form a barrier that will prevent air from passing from the second surface 16 to the first surface 14. Such air-tight barrier is desirable in most applications to prevent exposure of the opto-electrical components of the multi-pixel display module to chemical constituents present in the atmosphere. Such chemical constituents may negatively affect the opto-electrical components and as a result shorten their useful life or otherwise impact their performance. It should be explicitly noted that the air-tight barrier is not considered to be an essential component of the multi-pixel display module as applications are possible where such air-tight barrier is not required.

In the example shown in Figure 4, the air-tight barrier is created by plugging the vias 12 that form natural channels allowing air to pass from the second surface 16 to the first surface 14. Any suitable material that can obdurate the vias 12 can be used for this purpose. In the specific example of implementation, an epoxy type material 20 has been found satisfactory. The epoxy type material can be applied in any suitable way in order to penetrate the vias 12. When the epoxy type material sets, the air-tight barrier is created. Other options are also possible. If the vias 12 are sufficiently small, molten solder can be used to obturate the vias 12. This is effected by dipping the second surface 16 of the panel 10 in a bath of molten solder. The vias 12 pull the molten solder there within by capillary action. When the solder solidifies the air plug is created.

As shown in Figure 5, the metallic coating 18 is selectively removed to create conductive pathways that will be used to address the individual pixels of the multi-pixel display module. The removal of the coating 18 is made by etching the coating at the areas where no conductivity is desired. This operation can be performed by a photolithographic process which requires preparing a mask to delineate between the portions of the coating 18 to retain and those to remove and then threat the coating 18 with the appropriate chemicals, such as an acid, to dissolve the coating 18 and leave only the areas to be retained. In this fashion, a conductive pathway layout is formed on panel 10. Figure 22 is an illustrative example of the conductive pathway layout as it appears on the second main surface 16. The metallic conductive layer 18 has been removed in a way to leave around each via 12 a small region of conductive material 22 which is electrically isolated from other regions 22. In this fashion, the vias 12 are electrically isolated from one another and constitute individual electrically conductive segments, passing through the panel 10 that can carry electrical signals from the second main face 16 to the first main face 14.

Referring back to Figure 5, the selective removal of the metallic coating

18 also creates a conductive layout on the first surface 14 that is different from the conductive layout established on the second surface 16. The conductive layout is such that it will electrically link each via 12 with a corresponding sub- pixel or pixel, depending on the particular display technology selected for the multi-pixel display module. In the example shown in Figure 5, the panel 10 forms a substrate for an array of pixels, where each pixel is made up of three sub-pixels. Each sub-pixel is a block of emissive material that produces a photon flux when subjected to an electrical field. The photon flux may be continuous or burst-like. The photon flux may have a wavelength in the visible range of the spectrum or in a range not visible to the human eye, which can be converted to an emission in the visible range by a suitable filter.

The conductive layout on the first main surface 14 creates a series of discrete areas 28 that receive respective blocks of emissive material. The linear boundaries 30 between the areas 28 are etched away during the selective metallic coating removal process such as to electrically isolate the discrete areas 28 from one another.

The conductive layout on the first main surface 14 can be better appreciated on Figure 17 which is a top plan view of the multi-pixel display module. The first main surface 14 is divided into quadrants, each quadrant corresponding to a pixel 30. Note that in practice the multi-pixel display module is likely to have more than four pixels. The drawing shows only four to simplify the illustration.

Discrete areas 28 may further be polished to satisfy the flatness and roughness requirements of certain emissive materials such as those used for making organic light emitting diodes.

The discrete areas 28 are in the form of rectangles and they electrically connect with a corresponding via 12. Therefore, each discrete area 28 has a geometry that corresponds to the block of emissive material forming a sub- pixel of the pixel 30. Figure 17 also shows four additional vias, designated 12a, 12b, 12c and 12d. Those vias 12a, 12b, 12c and 12d are not associated with any one of the sub-pixels and they are used to provide an electrical connection to a common electrode that will be described later.

Referring back to Figure 5, once the selective removal of the metallic coating 18 has been effected, the areas where the coating 18 has been etched is filled with electrically insulating material 32. Any suitable type of material can be used, such as for example an epoxy material. In addition to simply filling the void left by the etching operation, the procedure also builds up the deposition of insulating material 32 up to a certain thickness at the boundaries between the discrete areas 28 to form respective receptacles 34 in which the blocks of emissive material can be formed. The embodiment shown in Figure 5 has receptacles 34 in the form of rectangles that are formed on the respective discrete areas 28. In this form of construction, the metallic material forming a discrete area 28 constitutes the floor of the corresponding receptacle 34.

The insulating material can be deposited by any suitable technique, such as for example a photolithographic process, serigraphy or an ink jet process.

Figure 6 illustrates a step of the process during which emissive material is deposited in each receptacle 34. The deposition method and the formulation of the emissive material can greatly vary according to the intended application. In the example shown, the same emissive material 35 is placed in each receptacle 34. In other words, each block of emissive material 35 will generate light at the same wavelength. The thickness of the emissive material 35 is selected to match the height of the receptacle 34 walls, such that the final structure has a flush surface. Examples of emissive materials include those used for making Organic Light Emissive Diodes (OLEDs) and electroluminescent substances.

The process continues at Figure 7 where a common electrode 36 is placed on top of the blocks of emissive material. The common electrode 36 is a continuous layer of Indium Oxide or any other suitable material that is light transmissive and has dimensions spanning the entire first main surface 14. This is not absolutely required. An alternative arrangement is to make the common electrode 36 from smaller pieces tiled together. For instance, the common electrode 36 can be formed from four identical pieces, each piece corresponding to the footprint of a pixel 30 on the first main surface 14. The common electrode 36 is located in such a way on the first main surface 14 such as to establish electrical contact with the vias 12a, 12b, 12c and 12d. For the purposes of simplicity only via 12a is shown in Figure 7. The common electrode 36 is deposited by a CVD process or any other suitable technique.

In Figure 8, color filters are placed on the respective blocks of emissive material to convert the incoming light into different colors. The filter is a pane 38 of any suitable material that has different color areas which register with the respective blocks of emissive material 35. Specifically, the color filter pane 38 includes a red zone 40, a green zone 42 and a blue zone 44 that are dimensioned and spaced apart from one another such that when placed on top of the first main surface 14, they will register precisely with the underlying blocks of emissive material 35. In this fashion, a three color pixel 30 is formed, namely a Red, Green and Blue (RGB) pixel, including a red sub-pixel 46, a green sub-pixel 48 and a blue sub-pixel 50.

The color filter pane 38 also includes blackened areas 52 that cover the non-emissive areas of the first main surface 14.

In Figure 9 a glue layer 54 is applied over the color filter pane 38. The glue layer 54 may be applied uniformly or selectively over selected areas of the color filter pane 38. Those selected areas correspond to the blackened areas 52. Both possibilities work in practice. Note that the application of the glue layer 54 as a uniform coating may have some advantages in that it does not require providing a masking structure to create a selective deposition. Also, this approach is likely to provide an enhanced optical uniformity since one continuous layer covers the entirety of the pixel array. However, a uniform application requires a glue layer 54 that is reasonably transparent and that will not chemically attack or otherwise negatively interact with the emissive material 35.

In Figure 10 a top transparent glass plate 56 is placed on top of the glue layer 54. The transparent glass plate 56 provides a physical protection to the opto-electrical components underneath. Note that the glass plate 56 may need to be shaped to match the relief of the layer 38. In the example shown, the glass plate 56 has peripheral projections 57 that fit in corresponding recesses on the first main surface 14. In Figure 11 , the glass plate is sealed to cure the glue layer 54 and provide a finished multi-pixel display module. The curing operation is made by subjecting the glue layer 54 to Ultra Violet (UV) radiation that activates the glue and causes to set. The UV radiation is produced by any suitable source and acts through the glue layer 54. Note that the glue layer 54 can also be set in many other different ways, the UV radiation being only one example. In the final product, shown in Figure 11 , the opto-electric components, namely the emissive blocks 35 are hermetically sealed on the one hand by the air-tight seal formed by the panel 10 and on the other hand by the glass plate 56.

Figure 12 illustrates a variant. This figure illustrates the multi-pixel display device at the process phase equivalent to Figure 6 described earlier.

Here, the difference lies in that different emissive substances are used for the emissive blocks, such that each block will generate different color light.

Specifically, the receptacles 34, receive a first emissive substance 60 that generates red light, a second emissive substance 62 that produces green light and a third emissive substance 64 that produces blue light. In this fashion, a color filter is not required since the native colors issued by the emissive substances are already in the RGB form. The remainder of the process is very similar to what was described above. In Figure 13, a common electrode

36 is applied, overlying the blocks of emissive substance. In Figure 14 a glue layer 54 is applied over the common electrode 36. In Figure 15 the top transparent glass plate 56 is applied on the glue layer 54 and in Figure 16 the glass plate 56 is sealed, yielding a finished product.

Figure 17 shows the multi-pixel display module in plan view. Here, the receptacles 34 have rectangular shapes and they are arranged such that the sub-pixels formed by respective receptacles 34 form a pixel 30 that has pretty much a square shape. Figure 18 shows a variant in which the multi-pixel display device is triangular instead of being rectangular as in Figure 17. In addition, the sub-pixels are circular in shape which requires correspondingly shaped receptacles for the blocks of emissive material. An RGB sub-pixel group in Figure 18 forms a complete pixel 30 that also has a shape approximating the shape of a triangle. Objectively, one drawback of the triangular shaped display device using circular sub-pixels is that at least one of the pixels is incomplete, i.e., it lacks a sub-pixel. Consider for example, the two lowest rows 70 and 72 of sub-pixels. In these two rows, the sub-pixels form three complete pixels 30 and one pixel that only has a red sub-pixel 74 and a blue sub-pixel 76 and lacks the green sub-pixel. In some applications, the absence of a sub-pixel may not matter. Also a corrective measure may involve designing a pixel addressing scheme such that the IC driver circuit addresses the red sub-pixel 74, the blue pixel 76 and the green sub-pixel in the immediately adjacent multi-pixel display module (assuming that both modules have been tiled) as a common pixel. In other words the pixels are no longer constrained to the physical boundaries of the multi-pixel display module but a single pixel has components in two different display modules.

The embodiment shown in Figure 18 is useful for making large display surfaces that are not flat. For example, a hemispheric display surface can be formed by tiling triangular multi-pixel display modules.

Figure 19 is a variant of the embodiment shown in Figure 18. The difference is that the pixels 30 are shaped as triangles and the individual sub- pixels are shaped as smaller triangles, the dimensions of which being such as to complement each other and form a larger triangle corresponding to a pixel 30.

As it is shown in Figures 17, 18 and 19 the distribution of the vias 12 is correlated to the distribution of the pixels 30. In the form of implementation shown, the vias 12 are distributed on the panel 10 such that a via 12 used to carry an electric signal addressing a sub-pixel is adjacent to the receptacle 34 of that sub-pixel. The vias 12 constitute segments of the conductive pathways that allow the pixels to be addressed. In one form of implementation, where a pixel is made up of a single block of emissive material, the respective conductive pathway can carry electrical signals to address the unitary pixel. The conductive pathway is dedicated to that pixel such that the pixel can be addressed independently of any other pixel of the display device. In addition, the arrangement which provides a dedicated conductive pathway for each pixel allows addressing all the pixels simultaneously, which is not feasible with matrix type addressing schemes.

In applications where the pixels are made up of several sub-pixels, such as for example the embodiments shown in Figures 17, 18 and 19, the pixels are addressed by activating one or more of the sub-pixels of that pixel.

Here, each sub-pixel is provided with a dedicated conductive pathway, each having a via 12, allowing addressing the sub-pixels independently of one another and also in a simultaneous fashion. For instance, this characteristic allows displaying an image on the multi-pixel display device at once by addressing all the sub-pixels pixels at the same time. This is not feasible with a matrix type addressing scheme where the image is rendered pixel line by pixel line or pixel column by pixel column.

The present invention can be used with a wide variety of optoelectronic display technologies. For example, the emissive substances deposited on the panel 10 to form the unitary pixels 30 or sub-pixels in cases where a single pixel is made up of two or more sub-pixels, can be Organic Light Emitting Diodes (OLEDs). An OLED is a thin-film light emitting diode in which the emissive substance is an organic compound. Another possibility is to make the pixels/sub-pixels by using liquid crystal displays. This application requires a light source generating the light with is conditioned by the liquid crystal array to produce an image. Liquid crystal displays of the passive of the active type can be used. Another possibility is to use plasma displays where the pixels/sub-pixels use phosphors that are excited by plasma discharge to produce a light emission. Yet another possibility is to use a display of the type described in the international application PCT/FR01/03908 in the name of Philippe Guillemot. Yet another possibility is to use Light Emitting Diodes (LEDs) in the form of discrete components that are mounted on the panel 10 and soldered or otherwise connected electrically to the array of conductive pathways. This form of implementation does not require the deposition of emissive substances.

As indicated earlier in this specification, the multi-pixel display module can be used to form tiled arrangements to build-up a display screen significantly larger than a single multi-pixel display module. In a tiled arrangement, several multi-pixel display modules are mounted edge to edge. In order to increase the visual uniformity of the tiled arrangement, the individual multi-pixel display modules should be mounted as close as possible to one another, thereby reducing inter-module gaps. Several mounting arrangement are of course possible. One example uses a rigid mounting support surface on which the multi-pixel display modules are placed. Figure 20 illustrates this implementation. The drawing shows two multi-pixel display modules 100 and 102 that are mounted flat on a rigid mounting support 104. The support 104 is planar. The multi-pixel display modules 100 and 102 are placed as close as possible to one another such as to minimize the dimensions of the inter-module gap 106. Note that while the rigid support 104 is shown carrying only two multi-pixel display modules 100, 102, this is only for illustration purposes since the size of the rigid support 104 is determined by the overall dimensions of the final tiled arrangement. In most practical applications, the tiled arrangement is likely to make use of more than two multi-pixel display modules.

The material used for making the rigid support 104 can vary without departing from the spirit of the invention. The material should be sturdy enough to adequately support the tiled arrangement of multi-pixel display modules 100, 102. In a specific example of implementation, the rigid support 104 is made in the form of a Printed Circuit Board (PCB) that is sufficiently thick to provide the necessary supporting function and prevent the tiled arrangement from bending or otherwise being distorted and also provides electrical signals transport function. In addition, the rigid support receives Integrated Circuit (IC) drivers 108 that generate the electrical signals for addressing the pixels of the multi-pixel display module. For pixels that are unitary entities, in other words they are not made up of sub-pixels, the addressing is effected by signaling the pixel via the corresponding conductive pathway. When a pixel is made up of two or more sub-pixels, the pixel is considered to be addressed when one or more of the sub-pixels are addressed.

Each IC driver 108 is designed to address simultaneously a block of pixels in the tiled arrangement. For example, each IC driver 108 is dedicated to a multi-pixel display module 100, 102. Therefore, the IC driver 108 is capable of addressing simultaneously all the pixels of one multi-pixel display modulelOO, 102. In this implementation, a tiled arrangement of multi-pixel display modules 100, 102 will necessitate a number of IC drivers 108 that is equal to the number of multi-pixel display modules 100, 102 in the tiled arrangement. An IC driver 108 has a video data input (not shown) which receives the video information to be displayed by the multi-pixel display module 100, 102 from any suitable video data source (not shown). The video data essentially determines which pixels (unitary pixels or sub-pixels) need to turned on and at what intensity and which pixels (unitary pixels or sub-pixels) remain off.

Typically, the IC driver 108 has a memory that will store the video information received at the video data input. In addition to the video data input, the IC driver 108 has a control input which determines the release of this video information to the respective pixels. In one specific example, the control input is synchronized with the video data delivery such that the pixels of the multi-pixel display module are addressed only when video information for every pixel of the multi-pixel display module 100, 102 has been loaded in the IC driver memory. Accordingly, the image on the multi-pixel display module appears at once, instead of being "drawn" line by line or column by column as in traditional matrix type addressing schemes. An IC driver of the type described in the earlier referenced PCT application can be used in a satisfactory fashion. A more specific example of the IC driver will now be provided in connection with Figure 27 (Figure 2 of

CIP case) which shows an IC driver A that drives a display B that has an array of pixels C.

In the example shown in Figure 27 the display has a number of pixels 611 , each pixel 611 including three light emitting entities, commonly referred to as "sub-pixels" 614. Specifically, the sub-pixels 614 of a given pixel 611 include a Red sub-pixel 614, a Green sub-pixel 614 and a Blue (RGB) sub- pixel pixel 614. In other words, each sub-pixel 614 produces either one of a red, green or blue color. When at least one of the sub-pixels 614 is lit, the pixel 611 is considered to be lit. Note that in a possible variant, the pixel 611 can include a single light emitting entity. This is the case of a monochrome pixel.

The sub-pixels 614 forming a pixel 611 are horizontally aligned. This is one possible mode of arranging the sub-pixels 614. Many other possibilities exist without departing from the spirit of the invention. For instance the sub- pixels 614 can be grouped such as to form a triangle instead of being horizontally aligned.

The integrated circuit 610 includes a plurality of modules 616 that drive the pixels of the display. In the case where unitary pixels are being used, such as for instance a pixel that produces monochrome light, a single module 616 controls the light intensity of that pixel since there is a single light emitting source. In the situation where the pixel is a compound pixel, such as the pixel 611 that has a number of light emitting sources, such as the sub-pixels 614, the example provides for a module 616 per sub-pixel such as to independently control the light intensity generated by each sub-pixel 614.

The module 616 includes a data input 618 for receiving digital data indicative of the desired light intensity the sub-pixel 614 associated with the module 616 is to produce. Typically, the data conveys the video image information that is to be rendered on the display. The video information is rendered by lighting the individual sub-pixels 614 at a predetermined intensity level. The input 618 is shared by other modules 616 of the integrated circuit 610. This means that the digital data intended for all sub-pixels 616 is applied serially at a main data input of the integrated circuit 610 and then internally distributed to the individual modules 616. The input 618 connects to a data bus 620 that is common to all the modules 616. Therefore, the digital data applied to the main data input of the integrated circuit 610 appears at the input 618 of every module 616. A control circuit 622 determines when digital data on the bus 620 is to be loaded by a particular module 616. The control circuit 622 is essentially a flip-flop 624 receiving a clock signal, a reset signal and a D input from the Q output of the flip-flop of the previous module. Similarly, the Q output of the current module 616 connects to the D input of the next module. As a result, the control circuits 622 of the modules 616 successively trigger each other in loading digital data serially applied on the bus 620. The process continues until all the modules 616 have loaded their respective digital data.

More details on the operation of the control circuit 622 are available in the international application PCT/F R01/03908 in the name of Philippe Guillemot.

The digital data loaded in a given module 616 contains a number of bits. The number of bits determines the number of light intensity levels the associated sub-pixel 614 is to produce.

The input 618 connects to a first memory layer 624. The memory layer 624 includes a plurality of memory units 626 for holding respective digits of the digital data on the data bus 620 that is to be input into the module 616. The various memory units 626 are controlled by the control circuit 622. More particularly, each memory unit 626 has a control input connected to the Q output of the flip-flop 624. When the Q output is activated, all the memory units 626 load the respective digits of the digital data on the bus 620. In the example shown in the drawings there are as many memory units 626 as digits in the digital data on the bus 620.

The module 616 also includes a second memory layer 628 having a plurality of memory units 630. The outputs of the memory units 626 connect to respective memory units 630. In this fashion, the digital data that has been loaded in the first memory layer 624 can be transferred to the second memory layer 628. Such transfer is triggered by activating a control input 632. The control input 632 is common to all the second memory layers 628 on the integrated circuit 610. Accordingly, when the control input 632 is activated, by applying a voltage to it or applying a ground, depending on the design of the integrated circuit 610, digital data is loaded at once in the second memory layers 628 of the modules 616 across the integrated circuit.

The data held in the second memory layer 628 of the modules 616 is the image data that is produced by the display 612. Therefore, when the control input 632 is activated all the sub-pixels 614 are addressed at the same time and the image on the display 610 changes at once.

The respective outputs of the memory units 630 of the second memory layer 628 are connected to a light intensity control circuit 634 that drives the sub-pixel 614 associated with the module 616 in accordance with the digital data at the output of the second memory layer 628. The light intensity control circuit 634 includes a plurality of digital switches 636 having control inputs connected to the outputs of the respective memory units 630. Accordingly, the state of conduction of a digital switch 636 depends upon the digit at the output of the associated memory unit 630. For instance, when the digit is a binary 0, the corresponding digital switch 630 does not conduct, while if the digit is a binary 1 , the digital switch 30 is set in a state of conduction.

Collectively the digital switches 636 connect to a sub-circuit 638 creating a common output 640 for the module 616 that electrically connects to the respective sub-pixel 614. The sub-circuit 638 includes a plurality of electrical components 644 (Ci to C_N) that are individually controlled by a respective digital switch 636. A voltage V₊A/. is applied to the sub-pixels 614 via the digital switches 636 and the electrical components 644. In the example shown, the output 640 represents the individual pin of the integrated circuit 610 that connects to the sub-pixel 614 and that is used to control the light intensity produced by the sub-pixel 614 independently from other sub- pixels.

The electrical components 644 can be capacitors, resistors or current sources or others, depending on the type of display technology being used. By creating different interconnections of electrical components 644, the electrical characteristics of the output 640 will change, controlling as a result the intensity of the light produced by the sub-pixel 614. An electrical component 644 is activated by setting the digital switch 636 associated with that component in a state of conduction. For instance, assume that only digital switch SWi that is associated with component Ci is set into conduction. In such case the digital data loaded in the memory layer 628 would be all zeros except the first digit that would be a 1. The electrical characteristics of the output 640 as "seen" by the sub-pixel 614 would be therefore dependent on the value of the component C-i_. Now assume that the digital data loaded in the second memory layer 628 is all zeros except the first two digits. In such case, components Ci and C₂ would be activated. The electrical characteristics of the output 640 would be dependent on the combination of Ci and C₂ in parallel.

Preferably, each electrical component 644 of index n has double the characteristic value (capacitance, resistance, current output, etc..) of the previous one, n-1. The smallest index number corresponds to the electrical component 644 with the smallest characteristic value. Thus, an electrical component 644 of index n should have 2ⁿ times the value of electrical component 644 of index 1. The electrical characteristics of the output 640 determine the light intensity the sub-pixel 614 will produce. In the example of implementation shown in Figure 28, the components C_n are in the form of capacitors. This form of implementation is suitable for plasma displays that are driven by a capacitive load. Accordingly, the capacitance of the output 640 changes on the basis of the digital data loaded in the second memory layer 628. Each digital switch 636 connects to a capacitive element 644 that is electrically connected to the output 640. The overall capacitance at the output 640 is determined by the number of the capacitive elements 644 that are combined, which occurs when they are connected in parallel. Therefore, the larger the number of digital switches 636 in a state of conduction, the larger the overall capacitance since more capacitive elements 644 are being connected in parallel.

The light intensity produced by the sub-pixel 614 is determined by the capacitance of the output 640, which in turn is programmed by the digital data at the input 620. By varying the digital data the capacitance changes and the light intensity changes accordingly.

In the example of implementation shown in Figure 20, the electrical connections between the IC driver 108 and the respective multi-pixel display module 100, 102 are provided on the rigid support 104. As indicated earlier, this support in the form of a PCB and uses traditional techniques to create the electrical connections between the IC driver 108 and the respective multi-pixel display module 100, 102. The IC driver 108 is mounted on the side of the rigid support 104 that is opposite the side receiving the tiled arrangement of multi- pixel display modules 100, 102. Each IC driver is held in a suitable connection socket (not shown) or directly surface mounted to the rigid support 104. Each addressing pin of the IC driver 108 is connected to a respective conductive pathway of the multi-pixel display module via a respective conductor (not shown) formed on the PCB structure of the rigid support 104 and that electrically links that pin of the IC driver 108 to a respective electric terminal of the multi-pixel display module 100, 102.

Figure 22 is plan view from the second main face 16 side of the multi- pixel display module 100, 102 illustrating the distribution of the electric terminals 22. Here, the electric terminals 22 are formed by respective conductive lands that surround the respective vias 12. The face of the rigid support 104 receiving the multi-pixel display modules 100, 102 is provided with a mating array of contact pads (not shown) that receive and establish electrical contact with the respective electric terminals 22. In this fashion, once the multi-pixel display module 100, 102 is mounted on the contacts pad array (and retained therein either mechanically or soldered such as by surface mounting) an electrical continuity is created between each addressing pin of the IC driver 108 and each unitary pixel or sub-pixel.

Since each IC driver 108 is responsible of addressing only a portion of the tiled arrangement, the video source can be designed to deliver to every IC driver 108 the video information that the associated multi-pixel display module 100, 102 has to show. This would normally require a separate connection between the each IC driver 108 and the video data source. In addition it will also require that the video data be divided into separate blocks by the video data source and each block delivered to the respective IC driver 108. An alternative is to connect each of the IC drivers 108 by a data transport connection exemplified by the double headed arrow 110 in Figure 21. In this fashion, the video source delivers the video data for the entire tiled arrangement to one IC driver 108 that, in turn, distributes the data to the other IC drivers 108. The data connection 110 includes a video data connection and also a control data connection. The control data connection can be used to synchronize the pixel addressing such that each multi-pixel display module 100, 102 renders the image at the same time.

The connection 110 can be physical such as a cable connecting directly one IC driver 108 to another IC driver 108. Another possibility is to use an optical link between adjacent IC drivers 108. Since the IC drivers 108 are in geometrical alignment a simple optical link can be used to transport the video data and the control signals from one IC driver 108 to an adjacent IC driver 108. Such an optical link can be built by providing on each IC driver 108 an optical source to emit optical signals and an optical detector to detect optical signals sent by the neighboring IC driver 108. Yet another possibility is to integrate the connection 110 within the PCB support 104. This is done by providing in the PCB 104 conductive lines that carry the video data and the control data from one IC driver 108 to another IC driver 108.

Figure 23 is a cross sectional view of yet another variant that shows a multi-pixel display module 200 that includes a PCB structure 202 which provides the functions of the panel 10 and the rigid support 104. In other words, the PCB structure 202 carries on its top main face 204 a pixels array 206 (made as described earlier) and on its bottom face 208 an IC driver 210. The PCB structure 202 is build-up from several layers that allow creating within the PCB structure 202 a three-dimensional conductors array to carry electrical signals from the pins of the IC driver 210 to the individual sub-pixels (assuming that the pixel array 206 includes pixels made up of sub-pixels). The three dimensional conductors array includes electric terminals 212 on its bottom face that electrically connect with respective pins of the IC driver 210. Each electric terminal 212 is the origin of a separate conductive pathway that leads to a respective sub-pixel of the pixels array. The conductive pathway includes runs 214 that extend generally parallel to the top and bottom faces 204, 208 and runs 216 that are generally perpendicular to the top and bottom faces 204, 208. The perpendicular runs are formed by vias passing through one or more layers of the PCB structure 202. Those vias are similar to the vias 12 described earlier. The three dimensional conductors array is such that the conductors density (conductive runs per surface area of the PCB 202) progressively decreases from the electric terminals 212 to the top face 204.

A possible variant to the embodiment shown in Figure 23 is to use an intermediate PCB layer to facilitate the connection between the IC driver 210 and the PCB structure 202. The embodiment in Figure 23 requires creating on the face 208 electric terminals 212 that precisely match the respective pins of the IC driver 210. In practice, this may be difficult to realize since the inter pin distance on the IC driver 210 may be quite small; depending on the number of pixels or sub-pixels the IC driver 210 is capable of addressing. To alleviate this potential difficulty an intermediate PCB layer is provided allowing increasing the distance between the electric terminals 212 on the bottom face 208. This embodiment is schematically depicted in Figure 25. The IC driver 210 is shown mounted on the intermediate PCB structure 400. The intermediate PCB structure 400 has on its face 402 that faces the IC driver 210 an array of electric terminals mating with the pins of the IC driver 210. Those terminals connect to a three-dimensional electric pathway structure 404 within the intermediate PCB layer 400 to replicate the IC driver pins on the opposite face 404 of the intermediate PCB layer, but with an increased inter pin distance. The assembly formed by the IC driver 210 and the intermediate PCB layer 400 is mounted on the PCB structure 202, the exception being that the electric terminals 212 do not need to be made according to the size and spacing of the pins on the IC driver 210. They can be made larger and spaced further away from each other. This facilitates the manufacture of the PCB layer 202. The connection between the PCB structure 202 and the intermediate PCB layer 400 can be made according to known techniques, such as soldering or by using mechanical fasteners.

Figure 25 shows the PCB structure 202 in dotted lines. The intermediate PCB layer 400 is placed against the surface 208 and the replicated IC driver pins electrically connect with the respective electric terminals 212.

Figure 24 is a scaled-up version of the multi-pixel display module 200. The multi-pixel display module 300 is made of a larger PCB structure that supports on its top face (the face that faces bottom in Figure 24) a pixels array that is large enough to necessitate multiple IC drivers 210. Each IC driver 210 addresses a given block of pixels of the pixels array. In the example shown, 12 IC drivers 210 are used on the multi-pixel display module 300, each IC driver 210 addressing a block of 16 X 16 pixels (where each pixel has three sub-pixels). The multi-pixel display module 300 has a similar internal three dimensional conductors array as discussed in connection with the embodiment shown in Figure 23, and includes in addition video data and control data connections to distribute video data and control data to the various IC drivers 210.

The multi-pixel display module 300 also includes external connectors 302 and 304. These connectors are used to receive/transmit video data and control data to adjacent multi-pixel display modules 300, when the multi-pixel display modules are tiled together to form a large display device.

The multi-pixel display module described earlier, can be used for the display of graphics, text or both, (color or monochrome), where video data is used to drive the individual pixels. Another possible application of the invention is to provide artificial lighting to illuminate an enclosure.

A lighting fixture can be built to the desired size by tiling several multi- pixel display modules together. This will provide a flat lighting fixture that can be conveniently hung from a ceiling or from a wall. Since the pixels of the multi-pixel display module can be addressed individually, they can be lit all the same time and at maximal intensity. This enhances the light output of the fixture. In addition, it is possible to create sophisticated light patterns since the pixels are individually controlled. For light fixture applications, the multicolor pixels may be used or single color pixels can be used. A multi color pixel allows producing multiple colors lighting. Single color pixels are obviously more limited in terms of choice of colors but it simplifies the addressing since an IC driver can be used to drive a larger block of single color pixels than when multi-color pixels are used.

In terms of structure, the light fixture is made in the same fashion as, for example, the multi-pixel display module 300, but the video data and control data connections are omitted since no dynamic picture needs to be displayed. Also, the individual pixels may be made much larger than in the case of a display for a moving image, since there is no need to provide high resolution images. This allows making the multi-pixel display module much larger without the need to add more IC drivers 210 to it.

An advantage to make the light fixture in the same fashion as the multi- pixel display module 300 is to allow independent addressing of all the pixels. This provides flexibility in the light patterns that can be created. For instance, the light fixture permits lighting only certain pixels, while keeping others extinguished, or light some pixels at a different intensity than others. This would require a video data input in which data indicative of the desired light pattern is input and on the basis of which the pixels are addressed. Another option to make the light fixture which is somewhat simpler is interconnect the pixels such that they all produce the same light intensity. This option does not allow creating different light patterns but the overall construction of the device is simplified and can therefore be manufactured at a lower cost. In the case of unitary pixels, such as pixels including a single light emitting entity, the device would therefore behave as light fixture that produces a uniform light output across its surface. In this case all the unitary pixels are electrically connected to one another and driven the by IC driver in unison.

The reader will appreciate that it is also possible to divide the pixels into groups and interconnect the pixels to one another within each group but maintain the separation between the pixels in different groups. In this fashion, it is possible to independently control the pixels groups. For example, it is possible to divide all the pixels forming the light fixture into three groups, where each group covers one third the light emissive surface of the light fixture. This arrangement allows controlling the light emission of each group separately.

When compound pixels are being used, the individual light emitting entities can be connected together to provide a uniform light output with the difference that the color of the output can be varied. In other words, all the sub-pixels having the same color are connected to one another and are driven by the IC driver in unison. In this fashion, the color emitted by the light fixture can be changed since the colors are independently controlled.

The invention can also be used as a backlight in for a traditional imaging device. Such imaging device is shown in Figure 26. The imaging device 500 has two main components, namely a light transmissive image generation layer 502 and a backlight layer. The light transmissive image generation layer 502 is designed to receive a light input and to filter this light such as to produce a visible image. The light transmissive image generation layer 502 can be build according to any suitable technology such as for example using LCD pixels. Behind the light transmissive image generation layer 502 is provided a backlight layer 504 that produces the light which is filtered by the light transmissive image generation layer 502. The backlight layer 504 can be identical to the device shown in Figure 23 or 24. More specifically, the backlight layer 504 has a panel 506 on which is mounted an IC drive circuit 508. Electrical pathways (not shown) on the panel 506 allow the IC drive circuit 508 to drive the individual pixels on the panel 506.

The backlight layer 504 offers many of the advantages mentioned earlier, namely reduced thickness, high light intensity output, reduced power consumption and reduced heat generation. As discussed in connection with the light fixture application earlier, varying degrees of light emission patterning can be achieved depending on the way the pixels are interconnected. The simplest approach is to connect all the pixels together such that they are all addressed in the same fashion. This does not allow creating patterns (some pixels lit while some are not or are lit with a different intensity than others) since all the pixels produce the same light output. The color of the light output can be varied by controlling independently the light emissions of sub-pixels. For instance by connecting all the sub-pixels together, the color of the light emission can be changed uniformly across the emissive surface. On the other hand, if it is desired to create light patterns on the emissive surface, then the pixels or sub-pixels need to be addressed in an independent fashion.

Although various embodiments have been illustrated, this was for the purpose of describing, but not limiting, the invention. Various modifications will become apparent to those skilled in the art and are within the scope of this invention, which is defined more particularly by the attached claims.

Claims

CLAIMS:

1) A substrate for a multi-pixel display device, comprising: a) a panel including a first and a second main surfaces opposite one another and in a spaced apart relationship, said first surface capable of receiving an array of pixels; b) a plurality of conductive pathways for conducting electrical signals to address the pixels, the plurality of conductive pathways including segments extending through said panel from said first surface to said second surface.

2) A substrate as defined in claim 1 , wherein each segment includes a layer of conductive material adhered to said panel.

3) A substrate as defined in claim 2, wherein each segment includes a via formed in said panel.

4) A substrate as defined in claim 3, wherein said layer of conductive material includes metallic material in the via.

5) A substrate as defined in claim 4, wherein said via extends along an imaginary axis that is perpendicular to said first and second main surfaces.

6) A substrate as defined in claim 5, wherein the vias are made by a process including a step of drilling said panel.

7) A substrate as defined in claim 5, wherein the vias are made by a process including a step of chemically etching said panel.

8) A substrate as defined in claim 1 , wherein said panel is generally flat. 9) A substrate as defined in claim 8, wherein said panel is generally rectangular.

1O)A substrate as defined in claim 8, wherein said panel is generally triangular.

11)A substrate as defined in claim 8, wherein said panel is made of material selected in the group consisting of PCB material and glass.

12)A substrate as defined in claim 8, wherein said via includes an air-tight plug.

13) A substrate as defined in claim 3, wherein said layer of metallic material extends from said first surface to said second surface through said via.

14) A substrate for a multi-pixel display device, comprising: a) a panel including a first and a second main surfaces opposite one another and in a spaced apart relationship, said first surface capable of receiving an array of pixels; b) a plurality of electrical terminals in a spaced apart relationships distributed on said second surface for receiving electrical signals for addressing respective ones of said pixels.

15) A substrate as defined in claim 14, including a plurality of conductive pathways electrically connected to respective ones of said electric terminals, said plurality conductive pathways conveying the electrical signals impressed on said electric terminals to respective ones of the pixels.

16) A substrate as defined in claim 15, wherein each conductive pathway includes a layer of conductive material adhered to said panel. 17)A substrate as defined in claim 16, wherein each segment includes a via formed in said panel.

18) A substrate as defined in claim 17, wherein said via extends along an imaginary axis that is perpendicular to said first and second main surfaces.

19)A substrate as defined in claim 18, wherein said panel is generally flat.

2O)A substrate as defined in claim 19, wherein said panel is selected in the group consisting of rectangle and triangle.

21 )A substrate as defined in claim 27, wherein said panel is made of material selected in the group consisting of PCB material and glass.

22)A substrate as defined in claim 21 , wherein said via includes an air-tight plug.

23)A multi-pixel display device, comprising: a) a panel having a first main surface and an opposite second main surface; b) an array of pixels on said first surface; c) a plurality of conductive pathways for conducting electrical signals to address the pixels of the array, the plurality of conductive pathways including segments extending through said panel from said first surface to said second surface.

24)A multi-pixel display device as defined in claim 23, wherein each pixel includes a receptacle receiving an emissive substance.

25)A multi-pixel display device as defined in claim 24, wherein the emissive substance emits light in a visible range of the spectrum. 26)A multi-pixel display device as defined in claim 25, wherein said segments are characterized by a distribution that is co-related to a distribution pattern of pixels on said first surface.

27)A multi-pixel display device as defined in claim 25, wherein each pixel includes a plurality of sub-pixels.

28)A multi-pixel display device as defined in claim 27, wherein each sub-pixel produces a different color light.

29)A multi-pixel display device as defined in claim 27, wherein each pixel includes a plurality of receptacles, each receptacle receiving an emissive substance associated with a sub-pixel.

3O)A multi-pixel display device as defined in claim 29, wherein the emissive substance associated with a sub-pixel is electrically connected to a respective conductive pathway.

31 )A multi-pixel display device as defined in claim 23, wherein said segments include vias extending through said panel.

32)A multi-pixel display device as defined in claim 31, wherein said conductive pathways include conductive material adhered to said panel.

33)A multi-pixel display device as defined in claim 32, wherein the conductive material extends into said vias.

34)A multi-pixel display device as defined in claim 33, wherein said vias extend along an imaginary axis that is perpendicular to said first and second surfaces.

35)A multi-pixel display device as defined in claim 34, wherein said panel is generally flat. 36)A multi- pixel display device as defined in claim 46, wherein said panel is selected in the group consisting of a rectangle and a triangle.

37)A multi- pixel display device as defined in claim 35, including a common electrode layer overlaying a plurality of said pixels.

38)A multi- pixel display device as defined in claim 37, wherein said common electrode layer is capable of light transmission.

39)A multi- pixel display device as defined in claim 38, including a conductive element in electrical contact with said common electrode, whereby a voltage impressed across said conductive element and a conductive pathway associated with a sub-pixel overlayed by said common electrode induces the emissive substance of the sub-pixel to emit light.

4O)A multi-pixel display device as defined in claim 39, wherein said conductive element includes a via extending between said first and second surfaces.

41 )A multi-pixel display device as defined in claim 40, comprising a single common electrode spanning and overlaying said array of pixels.

42)A multi-pixel display device as defined in claim 41 , including a light transmissive protective layer overlaying said common electrode.

43)A multi-pixel display device, comprising: a) a panel having a first main surface and an opposite second main surface; b) an array of pixels on said first surface; c) a plurality of electrical terminals in a spaced apart relationships distributed on said second surface for receiving electrical signals for addressing respective ones of said pixels. 44)A multi-pixel display device as defined in claim 43, wherein each pixel includes a receptacle holding an emissive substance.

45)A multi-pixel display device as defined in claim 44, comprising a plurality of segments extending between said first and second surfaces and connected to respective ones of said electrical terminals, said segments being electrically conductive to transport the electrical signals to respective pixels.

46)A multi-pixel display device as defined in claim 45, wherein said segments include vias.

47)A multi-pixel display device as defined in claim 46, wherein each pixel includes a plurality of sub-pixels.

48)A multi-pixel display device as defined in claim 47, wherein each sub-pixel includes a receptacle receiving an emissive substance.

49)A multi-pixel display device as defined in claim 48, including an electrically conductive via associated with each receptacle.

5O)A multi-pixel display device as defined in claim 49, wherein said vias are distributed on said panel such that a via used for carry an electric signal addressing a sub-pixel is adjacent to the receptacle of that sub-pixel.

51 )A multi-pixel display device, comprising: a) a panel having a first main surface and an opposite second main surface; b) an array of pixels on said first surface; c) a plurality of conductive pathways passing through said panel for carrying electrical signals for addressing said pixels; d) said panel forming an air-tight structure to prevent air from propagating from said second surface to said first surface through said panel.

52)A multi-pixel display device, comprising: a) a panel having a first main surface and an opposite second main surface; b) an array of pixels on said first surface; c) an integrated circuit for driving said pixels mounted on said second surface; d) a plurality of conductive pathways on said panel between said integrated circuit and said pixels, said conductive pathways allowing said integrated circuit to address said pixels.

53)A multi-pixel display device as defined in claim 52, wherein said integrated circuit includes an input for receiving digital image data.

54)A multi-pixel display device as defined in claim 53, wherein said conductive pathways include segments that pass through said panel between said first main surface and said second main surface.

55)A multi-pixel display device as defined in claim 54, wherein said segments include vias in said panel.

56)A multi-pixel display device as defined in claim 55, wherein said vias are coated with metallic layers to donate electrical conductivity to the vias.

57)A multi-pixel display device as defined in claim 56, wherein each pixel includes a plurality of sub-pixels.

58)A multi-pixel display device as defined in claim 57, having a via coated with a metallic layer associated with each sub-pixel for allowing said integrated circuit to address the sub-pixel. 59)A multi-pixel display device as defined in claim 58, wherein the vias are arranged on said panel according to a pattern locating each via in adjacency to the sub-pixel associated with that via.

6O)An imaging device, comprising: a) a tiled arrangement of two or more multi-pixel display modules, each multi-pixel display module having: i) a panel having a first main surface and an opposite second main surface; ii) an array of pixels on said first surface; iii) an integrated circuit for driving said pixels mounted on said second surface; iv) a plurality of conductive pathways on said panel between said integrated circuit and said pixels, said conductive pathways allowing said integrated circuit to address said pixels. b) a data communicative pathway between the integrated circuits of two or more of the multi-pixel display modules, said two ore more multi- pixel display modules being assembled edge to edge to form said tiled arrangement.

61)An imaging device as defined in claim 60, wherein said conductive pathways include segments that pass through said panel between said first main surface and said second main surface.

62)A multi-pixel display device as defined in claim 61 , wherein said segments include vias in said panel.

63)A multi-pixel display device as defined in claim 62, wherein said vias are coated with metallic layers to donate electrical conductivity to the vias.

64)A process for manufacturing a multi-pixel display device, said process including: a) providing a panel with a first main face and a second main face opposite said first main face; b) forming in said panel a plurality of passageways extending between said first main face and said second main face; c) forming a plurality of conductive pathways on said panel, said conductive pathways including segments extending through respective ones of said passageways; d) depositing on said first surface blocks of emissive material to form a two dimensional array of pixels; e) said conductive pathways connecting with respective blocks of emissive material to allow addressing the pixels by applying electrical signals to said conductive pathways.

65)A process as defined in claim 64, wherein said passageways are formed into a pattern that is correlated to a pattern of the blocks of emissive material.

66)A process as defined in claim 65, wherein said passageways are formed into a pattern locating the segments of the respective conductive pathways in adjacency to the blocks of emissive material addressed by the respective conductive pathways.

67)A process as defined in claim 66, wherein the passageways are formed by drilling the panel.

68)A process as defined in claim 67, wherein said conductive pathways are formed by depositing on said panel metallic conductive areas.

69)A device for producing artificial light to illuminate an enclosure, said device comprising: a) a panel having a first main surface and an opposite second main surface; b) an array of pixels on said first surface; c) an integrated circuit for driving said pixels mounted on said second surface.

7O)A device as defined in claim 69, comprising a plurality of conductive pathways on said panel between said integrated circuit and said pixels, said conductive pathways allowing said integrated circuit to address said pixels.

71) A device as defined in claim 70, wherein said conductive pathways include segments that pass through said panel between said first main surface and said second main surface.

72)A device as defined in claim 71 , wherein said segments include vias in said panel.

73)A device as defined in claim 72, wherein said vias are coated with metallic layers to donate electrical conductivity to the vias.

74)A device as defined in claim 73, wherein each pixel includes a plurality of sub-pixels.

75)A device as defined in claim 74, having a via coated with a metallic layer associated with each sub-pixel for allowing said integrated circuit to address the sub-pixel.

76)A device as defined in claim 75, wherein the vias are arranged on said panel according to a pattern locating each via in adjacency to the sub-pixel associated with that via.

77)A substrate for a device producing artificial light to illuminate an enclosure, comprising: a) a panel including a first and a second main surfaces opposite one another and in a spaced apart relationship, said first surface capable of receiving an array of pixels; b) a plurality of conductive pathways for conducting electrical signals to address the pixels, the plurality of conductive pathways including segments extending through said panel from said first surface to said second surface.

78)A substrate as defined in claim 77, wherein each segment includes a layer of conductive material adhered to said panel.

79)A substrate as defined in claim 78, wherein each segment includes a via formed in said panel.

8O)A substrate as defined in claim 79, wherein said layer of conductive material includes metallic material in the via.

81 )A substrate as defined in claim 80, wherein said via extends along an imaginary axis that is perpendicular to said first and second main surfaces.

82) A substrate as defined in claim 81 , wherein the vias are made by a process including a step of drilling said panel.

83)A substrate as defined in claim 81 , wherein the vias are made by a process including a step of chemically etching said panel.

84)A substrate as defined in claim 77, wherein said panel is generally flat.

85)A substrate as defined in claim 84, wherein said panel is generally rectangular. 86)A substrate as defined in claim 85, wherein said panel is made of material selected in the group consisting of PCB material and glass.

87)A substrate as defined in claim 85, wherein said via includes an air-tight plug.

88)A substrate as defined in claim 79, wherein said layer of metallic material extends from said first surface to said second surface through said via.

89)An imaging device, comprising: a) a light transmissive image generation layer; b) a backlight layer for producing light to be transmitted through said light transmissive image generation layer, wherein said image generation layer filters the light from said backlight layer to produce a visible image, said backlight layer including: i) a panel having a first main surface and an opposite second main surface; ii) an array of pixels on said first surface to generate light toward said image generation layer; iii) an integrated circuit for driving said pixels mounted on said second surface; iv) a plurality of conductive pathways on said panel between said integrated circuit and said pixels, said conductive pathways allowing said integrated circuit to address said pixels.

9O)An imaging device as defined in claim 89, wherein said conductive pathways include segments that pass through said panel between said first main surface and said second main surface.

91)An imaging device as defined in claim 90, wherein said segments include vias in said panel. 92)An imaging device as defined in claim 91 , wherein said vias are coated with metallic layers to donate electrical conductivity to the vias.

93)An imaging device as defined in claim 92, wherein each pixel includes a plurality of sub-pixels.

94)An imaging display device as defined in claim 93, having a via coated with a metallic layer associated with each sub-pixel for allowing said integrated circuit to address the sub-pixel.

95)An imaging device as defined in claim 94, wherein the vias are arranged on said panel according to a pattern locating each via in adjacency to the sub-pixel associated with that via.