WO2007115199A3 - Memory management for high speed media access control - Google Patents

Memory management for high speed media access control Download PDF

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Publication number
WO2007115199A3
WO2007115199A3 PCT/US2007/065678 US2007065678W WO2007115199A3 WO 2007115199 A3 WO2007115199 A3 WO 2007115199A3 US 2007065678 W US2007065678 W US 2007065678W WO 2007115199 A3 WO2007115199 A3 WO 2007115199A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory
high speed
access control
media access
packet
Prior art date
Application number
PCT/US2007/065678
Other languages
French (fr)
Other versions
WO2007115199A2 (en
Inventor
Subrahmanyam Dravida
Sriram Narayan
Original Assignee
Qualcomm Inc
Subrahmanyam Dravida
Sriram Narayan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc, Subrahmanyam Dravida, Sriram Narayan filed Critical Qualcomm Inc
Priority to CN2007800106911A priority Critical patent/CN101411134B/en
Priority to EP07759865A priority patent/EP2002617B1/en
Priority to BRPI0709704-2A priority patent/BRPI0709704A2/en
Priority to JP2009503318A priority patent/JP2009532954A/en
Priority to AT07759865T priority patent/ATE543304T1/en
Priority to CA002644139A priority patent/CA2644139A1/en
Publication of WO2007115199A2 publication Critical patent/WO2007115199A2/en
Publication of WO2007115199A3 publication Critical patent/WO2007115199A3/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling
    • H04L47/62—Queue scheduling characterised by scheduling criteria
    • H04L47/621—Individual queue per connection or flow, e.g. per VC
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9015—Buffering arrangements for supporting a linked list
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9021—Plurality of buffers per packet
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9063—Intermediate storage in different physical parts of a node or terminal
    • H04L49/9068—Intermediate storage in different physical parts of a node or terminal in the network interface card
    • H04L49/9073—Early interruption upon arrival of a fraction of a packet
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W36/00—Hand-off or reselection arrangements
    • H04W36/02—Buffering or recovering information during reselection ; Modification of the traffic flow during hand-off
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W36/00—Hand-off or reselection arrangements
    • H04W36/24—Reselection being triggered by specific parameters
    • H04W36/26—Reselection being triggered by specific parameters by agreed or negotiated communication parameters
    • H04W36/28—Reselection being triggered by specific parameters by agreed or negotiated communication parameters involving a plurality of connections, e.g. multi-call or multi-bearer connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W76/00—Connection management
    • H04W76/20—Manipulation of established connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
    • H04W88/02—Terminal devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
    • H04W88/08—Access point devices

Abstract

Aspects disclosed herein address the need in the art for memory management for high speed media access control. A packet buffer may store packets with a first data structure, comprising the packet length, sequence number, and a pointer to a second data structure. Packet data may be stored in a linked list of one or more second data structures. Transmit and receive queues may be formed using linked lists or arrays of the first data structures. Memory locations for storing first and second data structures may be kept in lists indicating free locations for the respective data structure types. A flexible memory architecture is disclosed in which two configurations may be selected. In a first configuration, a first memory comprises per-flow parameters for multiple flows, and a second memory comprises a packet buffer. In a second configuration, the first memory comprises per-flow pointers to per-flow parameters in the second memory. The packet buffer resides in a third memory. Various other aspects are also presented.
PCT/US2007/065678 2006-03-31 2007-03-30 Memory management for high speed media access control WO2007115199A2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
CN2007800106911A CN101411134B (en) 2006-03-31 2007-03-30 Memory management for high speed media access control
EP07759865A EP2002617B1 (en) 2006-03-31 2007-03-30 Memory management for high speed media access control
BRPI0709704-2A BRPI0709704A2 (en) 2006-03-31 2007-03-30 memory management for high speed media access control
JP2009503318A JP2009532954A (en) 2006-03-31 2007-03-30 Memory management for high-speed media access control
AT07759865T ATE543304T1 (en) 2006-03-31 2007-03-30 STORAGE MANAGEMENT FOR HIGH-SPEED MEDIA ACCESS CONTROL
CA002644139A CA2644139A1 (en) 2006-03-31 2007-03-30 Memory management for high speed media access control

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US78791506P 2006-03-31 2006-03-31
US60/787,915 2006-03-31

Publications (2)

Publication Number Publication Date
WO2007115199A2 WO2007115199A2 (en) 2007-10-11
WO2007115199A3 true WO2007115199A3 (en) 2007-12-06

Family

ID=38324003

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/065678 WO2007115199A2 (en) 2006-03-31 2007-03-30 Memory management for high speed media access control

Country Status (11)

Country Link
US (2) US8139593B2 (en)
EP (2) EP2326049A1 (en)
JP (2) JP2009532954A (en)
KR (1) KR101027356B1 (en)
CN (2) CN101411134B (en)
AT (1) ATE543304T1 (en)
BR (2) BRPI0722378A2 (en)
CA (1) CA2644139A1 (en)
RU (2) RU2491737C2 (en)
SG (1) SG163590A1 (en)
WO (1) WO2007115199A2 (en)

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