WO2007115105B1 - Method for making an improved thin film solar cell interconnect using etch and deposition processes - Google Patents

Method for making an improved thin film solar cell interconnect using etch and deposition processes

Info

Publication number
WO2007115105B1
WO2007115105B1 PCT/US2007/065521 US2007065521W WO2007115105B1 WO 2007115105 B1 WO2007115105 B1 WO 2007115105B1 US 2007065521 W US2007065521 W US 2007065521W WO 2007115105 B1 WO2007115105 B1 WO 2007115105B1
Authority
WO
WIPO (PCT)
Prior art keywords
groove
photoresist
stack
adjacent
forming
Prior art date
Application number
PCT/US2007/065521
Other languages
French (fr)
Other versions
WO2007115105A2 (en
WO2007115105A3 (en
Inventor
Peter G Borden
Original Assignee
Applied Materials Inc
Peter G Borden
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc, Peter G Borden filed Critical Applied Materials Inc
Priority to EP07759713A priority Critical patent/EP2008157A2/en
Priority to JP2009503280A priority patent/JP2009532884A/en
Publication of WO2007115105A2 publication Critical patent/WO2007115105A2/en
Publication of WO2007115105A3 publication Critical patent/WO2007115105A3/en
Publication of WO2007115105B1 publication Critical patent/WO2007115105B1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042PV modules or arrays of single PV cells
    • H01L31/0445PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
    • H01L31/046PV modules composed of a plurality of thin film solar cells deposited on the same substrate
    • H01L31/0463PV modules composed of a plurality of thin film solar cells deposited on the same substrate characterised by special patterning methods to connect the PV cells in a module, e.g. laser cutting of the conductive or active layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Abstract

The present invention provides a method of forming interconnects in a photovoltaic module. According to one aspect, a method according to the invention includes processing steps that are similar to those performed in conventional integrated circuit fabrication. For example, the method can include masks and etches to form isolation grooves between cells, and additional etches to form a conductive step adjacent to the grooves that can be used to form interconnects between cells. According to another aspect the method for forming the conductive step can be self-aligned, such as by positioning a mirror above the module and exposing photoresist from underneath the substrate at an angle one or more times, and etching to expose the conductive step. According to another aspect, the process can include steps to form grid lines in the module to improve current transport in the structure.

Claims

AMENDED CLAIMS received by the International Bureau on 18 September 2008 (18.09.2008).
1. A method for forming an interconnect in a thin film photovoltaic module Comprising: preparing a stack of photovoltaic module layers on a top surface of a substrate; forming an isolation groove having first and second substantially parallel edges completely through the stack, while leaving photoresist on top of the stack adjacent the first and second edges of the groove; exposing areas of the photoresist adjacent to the first edge of the groove; and etching through one or more layers of the stack via the exposed photoi esist to form a contact step adjacent the first edge of the groove.
2. A method according to claim 1, wherein the exposing step includes: placing a reflector above the stack; and illuminating the substrate from underneath and through the groove at an angle, thereby reflecting light off the reflector and exposing the photoresist adjacent to the first edge.
3. A method according to claim 1, wherein the step of forming the isolation groove includes: applying the photoresist on top of the stack; exposing and developing portions of the photoresist using photolithography; and etching through the stack using the un-developed photoresist as a masking layer.
4. A method according to claim 1 , further comprising: secondly illuminating the substrate from underneath and through the groove at a second angle, thereby reflecting light off the reflector and exposing photoresist adjacent to the second edge; and removing the exposed photoresist to form a contact region on the top|of the stack adjacent to the second edge of the groove.
5. A method according to claim 1, wherein the stack includes a conductor layer having a bottom surface adjacent the substrate, and wherein the etching step stops at a top surface of the conductor layer.
6. A method according to claim 1 , wherein the stack includes a conductor layer having a bottom surface adjacent the substrate and a semiconductor material layer above a top surface of the conductor layer, and wherein the etching step stops in the semiconductor nliaterial layer before reaching the top surface of the underlying conductor.
7. A method according to claim 1 further comprising forming grid lines in a top conductor layer of the stack in a direction substantially perpendicular to the groove.
8. A method according to claim 1, further comprising: depositing a blanket insulator after forming the contact step; perforating a top etch, thereby leaving insulator portions on walls of stack corresponding to the groove and the contact step.
9. A method according to claim 8, further comprising: depositing a top conductor layer after performing the top etch; and patterning the top conductor layer to remove portions above the groove and the contact step.
10. A method according to claim 1 , further comprising: forming a connector between a top conductor of the stack adjacent the second edge of the groove and the contact step.
11. A method according to claim 10, wherein the step of forrning a connector includes depositing a conductive material at an angle after forming the contact step, thereby shadowing a wall of the stack adjacent to the contact step from deposition.
12. A method according to claim 11, wherein evaporation is used to deposit the conductive material, and wherein sputtering is used to deposit the conductive material.
13. A method according to claim 10, wherein the step of forming the connector includes: applying an additional layer of photoresist after forming the contact step; illuminating the substrate from underneath and through the groove, thereby exposing the additional photoresist over the groove and adjacent the first and second edges of the groove; removing the exposed additional photoresist, while leaving un-exposed additional photoresist; depositing a conductive material on the substrate; and removing the un-exposed additional photoresist, thereby leaving conductive material that comprises the connector.
14. A method according to claim 13, wherein the additional photoresist includes at least two layers, and wherein the step of removing the un-exposed additional photoresist includes a lift-off process.
15. A method according to claim 13, wherein the illuminating step includes over-exposing the additional photoresist.
PCT/US2007/065521 2006-03-31 2007-03-29 Method for making an improved thin film solar cell interconnect using etch and deposition processes WO2007115105A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP07759713A EP2008157A2 (en) 2006-03-31 2007-03-29 Method for making an improved thin film solar cell interconnect using etch and deposition processes
JP2009503280A JP2009532884A (en) 2006-03-31 2007-03-29 Method for manufacturing improved thin film solar cell interconnects using etching and deposition processes

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/394,723 2006-03-31
US11/394,723 US7718347B2 (en) 2006-03-31 2006-03-31 Method for making an improved thin film solar cell interconnect using etch and deposition process

Publications (3)

Publication Number Publication Date
WO2007115105A2 WO2007115105A2 (en) 2007-10-11
WO2007115105A3 WO2007115105A3 (en) 2008-09-25
WO2007115105B1 true WO2007115105B1 (en) 2008-11-13

Family

ID=38564217

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/065521 WO2007115105A2 (en) 2006-03-31 2007-03-29 Method for making an improved thin film solar cell interconnect using etch and deposition processes

Country Status (7)

Country Link
US (1) US7718347B2 (en)
EP (1) EP2008157A2 (en)
JP (1) JP2009532884A (en)
KR (1) KR20090025193A (en)
CN (1) CN101438207A (en)
TW (1) TW200802913A (en)
WO (1) WO2007115105A2 (en)

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Also Published As

Publication number Publication date
EP2008157A2 (en) 2008-12-31
US20070238285A1 (en) 2007-10-11
CN101438207A (en) 2009-05-20
WO2007115105A2 (en) 2007-10-11
US7718347B2 (en) 2010-05-18
JP2009532884A (en) 2009-09-10
WO2007115105A3 (en) 2008-09-25
KR20090025193A (en) 2009-03-10
TW200802913A (en) 2008-01-01

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