WO2007044926A3 - Initialization of flash storage via an embedded controller - Google Patents

Initialization of flash storage via an embedded controller Download PDF

Info

Publication number
WO2007044926A3
WO2007044926A3 PCT/US2006/040239 US2006040239W WO2007044926A3 WO 2007044926 A3 WO2007044926 A3 WO 2007044926A3 US 2006040239 W US2006040239 W US 2006040239W WO 2007044926 A3 WO2007044926 A3 WO 2007044926A3
Authority
WO
WIPO (PCT)
Prior art keywords
flash memory
initialization
host system
embedded
embedded controller
Prior art date
Application number
PCT/US2006/040239
Other languages
French (fr)
Other versions
WO2007044926A2 (en
Inventor
Kevin M Conley
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sandisk Corp filed Critical Sandisk Corp
Priority to JP2008535749A priority Critical patent/JP5173818B2/en
Priority to EP06816937.4A priority patent/EP1938200B1/en
Priority to CN2006800376668A priority patent/CN101313287B/en
Publication of WO2007044926A2 publication Critical patent/WO2007044926A2/en
Publication of WO2007044926A3 publication Critical patent/WO2007044926A3/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/20—Initialising; Data preset; Chip identification
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating

Abstract

A digital system including flash memory, coupled to a system-on-a-chip within which a flash memory subsystem controller is embedded, is disclosed. The system-on-a- chip includes support for a standard external interface, such as a Universal Serial Bus (USB) or IEEE 1394 interface, to which a host system such as flash memory test equipment can connect. Initialization of the flash memory is effected by opening a communications channel between the host system and the embedded flash memory subsystem controller. The host system can then effect initialization of the flash memory subsystem, including formatting of the flash memory arrays, loading application programs, and the like, over the communications channel.
PCT/US2006/040239 2005-10-13 2006-10-12 Initialization of flash storage via an embedded controller WO2007044926A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008535749A JP5173818B2 (en) 2005-10-13 2006-10-12 Initializing flash storage via embedded controller
EP06816937.4A EP1938200B1 (en) 2005-10-13 2006-10-12 Initialization of flash storage via an embedded controller
CN2006800376668A CN101313287B (en) 2005-10-13 2006-10-12 Initialization of flash storage via an embedded controller

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/250,094 US7640424B2 (en) 2005-10-13 2005-10-13 Initialization of flash storage via an embedded controller
US11/250,094 2005-10-13

Publications (2)

Publication Number Publication Date
WO2007044926A2 WO2007044926A2 (en) 2007-04-19
WO2007044926A3 true WO2007044926A3 (en) 2007-05-31

Family

ID=37897344

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/040239 WO2007044926A2 (en) 2005-10-13 2006-10-12 Initialization of flash storage via an embedded controller

Country Status (7)

Country Link
US (2) US7640424B2 (en)
EP (2) EP2053501A3 (en)
JP (2) JP5173818B2 (en)
KR (1) KR20080075110A (en)
CN (1) CN101313287B (en)
TW (1) TWI408597B (en)
WO (1) WO2007044926A2 (en)

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Also Published As

Publication number Publication date
EP1938200B1 (en) 2013-11-20
WO2007044926A2 (en) 2007-04-19
TW200745932A (en) 2007-12-16
EP2053501A3 (en) 2009-09-16
US9245634B2 (en) 2016-01-26
EP2053501A2 (en) 2009-04-29
CN101313287B (en) 2013-05-08
CN101313287A (en) 2008-11-26
TWI408597B (en) 2013-09-11
JP2012234568A (en) 2012-11-29
US20100070693A1 (en) 2010-03-18
JP2009512076A (en) 2009-03-19
US20070088940A1 (en) 2007-04-19
JP5173818B2 (en) 2013-04-03
KR20080075110A (en) 2008-08-14
EP1938200A2 (en) 2008-07-02
US7640424B2 (en) 2009-12-29

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