WO2006135549A8 - Efficient subprogram return in microprocessors - Google Patents

Efficient subprogram return in microprocessors

Info

Publication number
WO2006135549A8
WO2006135549A8 PCT/US2006/020427 US2006020427W WO2006135549A8 WO 2006135549 A8 WO2006135549 A8 WO 2006135549A8 US 2006020427 W US2006020427 W US 2006020427W WO 2006135549 A8 WO2006135549 A8 WO 2006135549A8
Authority
WO
WIPO (PCT)
Prior art keywords
microprocessors
efficient
return
operations
subprogram return
Prior art date
Application number
PCT/US2006/020427
Other languages
French (fr)
Other versions
WO2006135549A3 (en
WO2006135549A2 (en
Inventor
Erik K Renno
Oyvind Strom
Morten W Lund
Original Assignee
Atmel Corp
Erik K Renno
Oyvind Strom
Morten W Lund
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp, Erik K Renno, Oyvind Strom, Morten W Lund filed Critical Atmel Corp
Priority to CN2006800207138A priority Critical patent/CN101194228B/en
Priority to JP2008515743A priority patent/JP2009508180A/en
Priority to EP06771282.8A priority patent/EP1891519B1/en
Publication of WO2006135549A2 publication Critical patent/WO2006135549A2/en
Publication of WO2006135549A3 publication Critical patent/WO2006135549A3/en
Publication of WO2006135549A8 publication Critical patent/WO2006135549A8/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30072—Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/394—Routing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30054—Unconditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094—Condition code generation, e.g. Carry, Zero flag
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Debugging And Monitoring (AREA)
  • Microcomputers (AREA)

Abstract

A method and medium for performing subroutine return operations. Test operations (88, 90) are performed in parallel with other operations (92, 94) in a return operation (98) . These test operations (88, 90) and the return operations (96, 98) are performed in response to a single instruction (86) .
PCT/US2006/020427 2005-06-10 2006-05-25 Efficient subprogram return in microprocessors WO2006135549A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN2006800207138A CN101194228B (en) 2005-06-10 2006-05-25 Performance microprocessor and device of fast return of microcontroller subroutine
JP2008515743A JP2009508180A (en) 2005-06-10 2006-05-25 Efficient subprogram return in microprocessors.
EP06771282.8A EP1891519B1 (en) 2005-06-10 2006-05-25 Efficient subprogram return in microprocessors

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/149,611 US20060282821A1 (en) 2005-06-10 2005-06-10 Efficient subprogram return in microprocessors
US11/149,611 2005-06-10

Publications (3)

Publication Number Publication Date
WO2006135549A2 WO2006135549A2 (en) 2006-12-21
WO2006135549A3 WO2006135549A3 (en) 2007-08-16
WO2006135549A8 true WO2006135549A8 (en) 2008-01-10

Family

ID=37525517

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/020427 WO2006135549A2 (en) 2005-06-10 2006-05-25 Efficient subprogram return in microprocessors

Country Status (7)

Country Link
US (2) US20060282821A1 (en)
EP (1) EP1891519B1 (en)
JP (1) JP2009508180A (en)
KR (1) KR20080014062A (en)
CN (1) CN101194228B (en)
TW (1) TW200709043A (en)
WO (1) WO2006135549A2 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060282821A1 (en) * 2005-06-10 2006-12-14 Renno Erik K Efficient subprogram return in microprocessors
CN100442226C (en) * 2007-07-02 2008-12-10 美的集团有限公司 Setting method for microwave oven return key
US10802990B2 (en) * 2008-10-06 2020-10-13 International Business Machines Corporation Hardware based mandatory access control
CN101551749B (en) * 2009-05-11 2012-08-22 中国科学院计算技术研究所 Method and system of random test program generation and design verification method
WO2012103359A2 (en) 2011-01-27 2012-08-02 Soft Machines, Inc. Hardware acceleration components for translating guest instructions to native instructions
WO2012103367A2 (en) 2011-01-27 2012-08-02 Soft Machines, Inc. Guest to native block address mappings and management of native code storage
WO2012103253A2 (en) 2011-01-27 2012-08-02 Soft Machines, Inc. Multilevel conversion table cache for translating guest instructions to native instructions
EP2972798B1 (en) 2013-03-15 2020-06-17 Intel Corporation Method and apparatus for guest return address stack emulation supporting speculation
WO2014151652A1 (en) 2013-03-15 2014-09-25 Soft Machines Inc Method and apparatus to allow early dependency resolution and data forwarding in a microprocessor

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0185215B1 (en) * 1984-11-21 1993-09-22 Harris Corporation Forth-like language microprocessor
US4814976C1 (en) * 1986-12-23 2002-06-04 Mips Tech Inc Risc computer with unaligned reference handling and method for the same
US4926355A (en) * 1987-07-02 1990-05-15 General Datacomm, Inc. Digital signal processor architecture with an ALU and a serial processing section operating in parallel
US4891754A (en) * 1987-07-02 1990-01-02 General Datacomm Inc. Microinstruction sequencer for instructing arithmetic, logical and data move operations in a conditional manner
US5193205A (en) * 1988-03-01 1993-03-09 Mitsubishi Denki Kabushiki Kaisha Pipeline processor, with return address stack storing only pre-return processed address for judging validity and correction of unprocessed address
JP2796590B2 (en) * 1991-08-07 1998-09-10 三菱電機株式会社 Memory device and data processing device using the same
US5386563A (en) * 1992-10-13 1995-01-31 Advanced Risc Machines Limited Register substitution during exception processing
JP3499252B2 (en) * 1993-03-19 2004-02-23 株式会社ルネサステクノロジ Compiling device and data processing device
US5925125A (en) * 1993-06-24 1999-07-20 International Business Machines Corporation Apparatus and method for pre-verifying a computer instruction set to prevent the initiation of the execution of undefined instructions
GB2281986B (en) * 1993-09-15 1997-08-06 Advanced Risc Mach Ltd Data processing reset
JP3543181B2 (en) * 1994-11-09 2004-07-14 株式会社ルネサステクノロジ Data processing device
US5701493A (en) * 1995-08-03 1997-12-23 Advanced Risc Machines Limited Exception handling method and apparatus in data processing systems
DE69629495T2 (en) * 1995-10-06 2004-06-09 Advanced Micro Devices, Inc., Sunnyvale UNIFORMED MULTIFUNCTIONAL OPERATION DISTRIBUTOR FOR DISORDERED COMMAND EXECUTION IN A SUPER-SCALAR PROCESSOR
US5926642A (en) * 1995-10-06 1999-07-20 Advanced Micro Devices, Inc. RISC86 instruction set
US5778208A (en) * 1995-12-18 1998-07-07 International Business Machines Corporation Flexible pipeline for interlock removal
US5884089A (en) * 1997-10-14 1999-03-16 Motorola, Inc. Method for calculating an L1 norm and parallel computer processor
US6434584B1 (en) * 1998-06-04 2002-08-13 Texas Instruments Incorporated Flexible accumulator register file for use in high performance microprocessors
US7472259B2 (en) * 2000-12-06 2008-12-30 Analog Devices, Inc. Multi-cycle instructions
US6954849B2 (en) * 2002-02-21 2005-10-11 Intel Corporation Method and system to use and maintain a return buffer
US7051190B2 (en) * 2002-06-25 2006-05-23 Intel Corporation Intra-instruction fusion
CN1266595C (en) * 2002-06-28 2006-07-26 联想(北京)有限公司 Semiopen automatic upgrading method for embedded type operation system
US7571258B2 (en) * 2002-12-12 2009-08-04 Adaptec, Inc. Method and apparatus for a pipeline architecture
US20060282821A1 (en) * 2005-06-10 2006-12-14 Renno Erik K Efficient subprogram return in microprocessors

Also Published As

Publication number Publication date
CN101194228B (en) 2011-10-19
EP1891519A4 (en) 2010-05-19
WO2006135549A3 (en) 2007-08-16
EP1891519A2 (en) 2008-02-27
TW200709043A (en) 2007-03-01
US20100250904A1 (en) 2010-09-30
CN101194228A (en) 2008-06-04
WO2006135549A2 (en) 2006-12-21
EP1891519B1 (en) 2016-12-07
US8555041B2 (en) 2013-10-08
US20060282821A1 (en) 2006-12-14
KR20080014062A (en) 2008-02-13
JP2009508180A (en) 2009-02-26

Similar Documents

Publication Publication Date Title
WO2006135549A3 (en) Efficient subprogram return in microprocessors
DE502005004489D1 (en) Arrangement for connecting power lines, in particular pressure lines
CA2565135A1 (en) Blowout preventer and method for manipulating a ram block
EP1734432A4 (en) Indicator, program product for functioning computer as indicator, and recording medium with the program product stored therein
GB0712636D0 (en) Method for establishing a trusted running environment in the computer
EP2175390A4 (en) Molecule simulation method, molecule simulation device, molecule simulation program, and recording medium recording the program
WO2006075254A3 (en) Methods and products for in vitro genotyping
DE502004009003D1 (en) Handling device, in particular for the food industry
ATE482144T1 (en) DEVICE FOR PACKAGING OBJECTS, IN PARTICULAR CONFESSIONALS
ATE520165T1 (en) GAS DIFFUSION UNIT FOR A FUEL CELL
WO2008094945A3 (en) Compounds and methods for modulating protein expression
WO2008071963A3 (en) Apparatus comprising three dimensional shapes rotatably supported in on another
CA2509603A1 (en) Separable plug for use with a wellbore tool
EP1962210A4 (en) Method for reconstructing statement, and computer system having the function therefor
DE50203605D1 (en) Pressure medium cylinder, in particular for use in the food industry
DE502006000234D1 (en) Device for holding a doctor blade
EP1702803A3 (en) Structural element, in particular shielding element
EP1471422A3 (en) Runtime Polymorphism
EP1837873A4 (en) Recording medium, recording device, recording method and computer program
DE60008687D1 (en) Device for connecting one or more objects, e.g. Rebtriebe
WO2007057750A3 (en) Assays
DE502005002041D1 (en) STAND FOR ATTACHING A STAINED OBJECT, IN PARTICULAR A TREE
Kuroda A study on virtual reality based palpation simulator
ITPR20030108A1 (en) CALIPER, IN PARTICULAR FOR HOLDING ENVELOPES.
ES1054953Y (en) BOARD FOR FORGED.

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200680020713.8

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application
REEP Request for entry into the european phase

Ref document number: 2006771282

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 2006771282

Country of ref document: EP

ENP Entry into the national phase

Ref document number: 2008515743

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 1020077029999

Country of ref document: KR