WO2006118786A1 - Technique for forming a contact insulation layer with enhanced stress transfer efficiency - Google Patents
Technique for forming a contact insulation layer with enhanced stress transfer efficiency Download PDFInfo
- Publication number
- WO2006118786A1 WO2006118786A1 PCT/US2006/014627 US2006014627W WO2006118786A1 WO 2006118786 A1 WO2006118786 A1 WO 2006118786A1 US 2006014627 W US2006014627 W US 2006014627W WO 2006118786 A1 WO2006118786 A1 WO 2006118786A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- forming
- transistor
- gate electrode
- layer
- contact liner
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 79
- 238000012546 transfer Methods 0.000 title abstract description 6
- 238000009413 insulation Methods 0.000 title description 14
- 125000006850 spacer group Chemical group 0.000 claims abstract description 87
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 27
- 206010010144 Completed suicide Diseases 0.000 claims abstract description 16
- 239000000463 material Substances 0.000 claims description 21
- 239000004065 semiconductor Substances 0.000 claims description 21
- 238000000151 deposition Methods 0.000 claims description 15
- 238000002513 implantation Methods 0.000 claims description 12
- 239000003989 dielectric material Substances 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims 2
- 230000002040 relaxant effect Effects 0.000 claims 1
- 230000008569 process Effects 0.000 abstract description 48
- 229910052751 metal Inorganic materials 0.000 abstract description 24
- 239000002184 metal Substances 0.000 abstract description 24
- 239000002019 doping agent Substances 0.000 abstract description 17
- 230000007246 mechanism Effects 0.000 abstract description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 32
- 239000000758 substrate Substances 0.000 description 21
- 239000000377 silicon dioxide Substances 0.000 description 16
- 235000012239 silicon dioxide Nutrition 0.000 description 16
- 229910052581 Si3N4 Inorganic materials 0.000 description 15
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 12
- 229910052710 silicon Inorganic materials 0.000 description 12
- 239000010703 silicon Substances 0.000 description 12
- 230000001965 increasing effect Effects 0.000 description 10
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- 238000013459 approach Methods 0.000 description 7
- 239000002800 charge carrier Substances 0.000 description 6
- 229910021332 silicide Inorganic materials 0.000 description 6
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical group [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 5
- 230000009467 reduction Effects 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 238000011161 development Methods 0.000 description 4
- 230000002708 enhancing effect Effects 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 229910017052 cobalt Inorganic materials 0.000 description 2
- 239000010941 cobalt Substances 0.000 description 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 230000001747 exhibiting effect Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
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- 238000000059 patterning Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000012864 cross contamination Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 125000001475 halogen functional group Chemical group 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 229960002050 hydrofluoric acid Drugs 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 230000000977 initiatory effect Effects 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 150000002736 metal compounds Chemical class 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 239000003870 refractory metal Substances 0.000 description 1
- -1 silicon nitride Chemical compound 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 238000005549 size reduction Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823864—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6653—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using the removal of at least part of spacer, e.g. disposable spacer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7843—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being an applied insulating layer
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Filling Or Discharging Of Gas Storage Vessels (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008508914A JP5204645B2 (en) | 2005-04-29 | 2006-04-19 | Technology for forming contact insulation layers with enhanced stress transmission efficiency |
CN2006800145061A CN101167169B (en) | 2005-04-29 | 2006-04-19 | Technique for forming a contact insulation layer with enhanced stress transfer efficiency |
KR1020077027782A KR101229526B1 (en) | 2005-04-29 | 2006-04-19 | Technique for forming a contact insulation layer with enhanced stress transfer efficiency |
GB0720859A GB2439695B (en) | 2005-04-29 | 2007-10-24 | Technique for forming a contact insulation layer with enhanced stress transfer efficiency |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102005020133A DE102005020133B4 (en) | 2005-04-29 | 2005-04-29 | A method of fabricating a transistor element having a technique of making a contact isolation layer with improved voltage transfer efficiency |
DE102005020133.4 | 2005-04-29 | ||
US11/288,673 US7354838B2 (en) | 2005-04-29 | 2005-11-29 | Technique for forming a contact insulation layer with enhanced stress transfer efficiency |
US11/288,673 | 2005-11-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006118786A1 true WO2006118786A1 (en) | 2006-11-09 |
Family
ID=36872090
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2006/014627 WO2006118786A1 (en) | 2005-04-29 | 2006-04-19 | Technique for forming a contact insulation layer with enhanced stress transfer efficiency |
Country Status (3)
Country | Link |
---|---|
KR (1) | KR101229526B1 (en) |
GB (1) | GB2439695B (en) |
WO (1) | WO2006118786A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007123358A (en) * | 2005-10-25 | 2007-05-17 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6136636A (en) * | 1998-03-25 | 2000-10-24 | Texas Instruments - Acer Incorporated | Method of manufacturing deep sub-micron CMOS transistors |
US6335252B1 (en) * | 1999-12-06 | 2002-01-01 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device manufacturing method |
US20020192868A1 (en) * | 2001-06-14 | 2002-12-19 | Samsung Electronics Co., Ltd. | Semiconductor device having LDD-type source/drain regions and fabrication method thereof |
US20030040158A1 (en) * | 2001-08-21 | 2003-02-27 | Nec Corporation | Semiconductor device and method of fabricating the same |
US6573172B1 (en) * | 2002-09-16 | 2003-06-03 | Advanced Micro Devices, Inc. | Methods for improving carrier mobility of PMOS and NMOS devices |
US20030183881A1 (en) * | 2002-03-28 | 2003-10-02 | Lee Young-Ki | Methods of forming silicide layers on source/drain regions of MOS transistors and MOS transistors so formed |
US20040072435A1 (en) * | 2002-10-09 | 2004-04-15 | Chartered Semiconductor Manufacturing Ltd. | Method of integrating L - shaped spacers in a high performance CMOS process via use of an oxide - nitride - doped oxide spacer |
US20040235229A1 (en) * | 2000-12-27 | 2004-11-25 | Kabushiki Kaisha Toshiba | Method of manufacturing a semiconductor device with an L-shape/reversed L-shaped gate side-wall insulating film |
US20040266124A1 (en) * | 2002-06-14 | 2004-12-30 | Roy Ronnen A. | Elevated source drain disposable spacer CMOS |
US20050040472A1 (en) * | 2003-08-22 | 2005-02-24 | Samsung Electronics Co., Ltd. | Highly integrated semiconductor device with silicide layer that secures contact margin and method of manufacturing the same |
-
2006
- 2006-04-19 KR KR1020077027782A patent/KR101229526B1/en active IP Right Grant
- 2006-04-19 WO PCT/US2006/014627 patent/WO2006118786A1/en active Application Filing
-
2007
- 2007-10-24 GB GB0720859A patent/GB2439695B/en not_active Expired - Fee Related
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6136636A (en) * | 1998-03-25 | 2000-10-24 | Texas Instruments - Acer Incorporated | Method of manufacturing deep sub-micron CMOS transistors |
US6335252B1 (en) * | 1999-12-06 | 2002-01-01 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device manufacturing method |
US20040235229A1 (en) * | 2000-12-27 | 2004-11-25 | Kabushiki Kaisha Toshiba | Method of manufacturing a semiconductor device with an L-shape/reversed L-shaped gate side-wall insulating film |
US20020192868A1 (en) * | 2001-06-14 | 2002-12-19 | Samsung Electronics Co., Ltd. | Semiconductor device having LDD-type source/drain regions and fabrication method thereof |
US20030040158A1 (en) * | 2001-08-21 | 2003-02-27 | Nec Corporation | Semiconductor device and method of fabricating the same |
US20030183881A1 (en) * | 2002-03-28 | 2003-10-02 | Lee Young-Ki | Methods of forming silicide layers on source/drain regions of MOS transistors and MOS transistors so formed |
US20040266124A1 (en) * | 2002-06-14 | 2004-12-30 | Roy Ronnen A. | Elevated source drain disposable spacer CMOS |
US6573172B1 (en) * | 2002-09-16 | 2003-06-03 | Advanced Micro Devices, Inc. | Methods for improving carrier mobility of PMOS and NMOS devices |
US20040072435A1 (en) * | 2002-10-09 | 2004-04-15 | Chartered Semiconductor Manufacturing Ltd. | Method of integrating L - shaped spacers in a high performance CMOS process via use of an oxide - nitride - doped oxide spacer |
US20050040472A1 (en) * | 2003-08-22 | 2005-02-24 | Samsung Electronics Co., Ltd. | Highly integrated semiconductor device with silicide layer that secures contact margin and method of manufacturing the same |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007123358A (en) * | 2005-10-25 | 2007-05-17 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
Also Published As
Publication number | Publication date |
---|---|
GB2439695A (en) | 2008-01-02 |
GB0720859D0 (en) | 2007-12-05 |
KR101229526B1 (en) | 2013-02-04 |
GB2439695B (en) | 2010-05-26 |
KR20080007391A (en) | 2008-01-18 |
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