WO2006036601A2

WO2006036601A2 - Process control monitors for the fabrication interferometric modulators

Info

Publication number: WO2006036601A2
Application number: PCT/US2005/033221
Authority: WO
Inventors: William J. Cummings; Brian J. Gally
Original assignee: Idc, Llc
Priority date: 2004-09-27
Filing date: 2005-09-16
Publication date: 2006-04-06
Also published as: KR101232091B1; US7369252B2; TWI360518B; TW200626488A; US7403323B2; JP4501009B2; US7869055B2; KR101236291B1; TWI360520B; US20060066872A1; KR20120125673A; US7618831B2; JP4824632B2; JP2008046603A; TW200628394A; US20080002206A1; KR20070067709A; TWI409870B; KR20070067707A; US7259865B2

Abstract

Process control monitors 100, 102, and 104 are disclosed that are produced using at least some of the same process steps used to manufacture a MEMS device 108. Analysis of the process control monitors 100, 102, and 104 can provide information regarding properties of the MEMS device 108 and components or sub-components in the device. This information can be used to identify errors in processing or to optimize the MEMS device 108. In some embodiments, analysis of the process control monitors 100, 102, and 104 may utilize optical measurements.

Description

IRDM.152VPC PATENT

PROCESS CONTROL MONITORS FOR INTERFEROMETRIC MODULATORS

BACKGROUND OF THE INVENTION Field of the Invention

[0001] The field of the invention relates to microelectromechanical systems (MEMS). Description of the Related Art

[0002] Microelectromechanical systems (MEMS) include micro mechanical elements, actuators, and electronics. Micromechanical elements may be created using deposition, etching, and or other micromachining processes that etch away parts of substrates and/or deposited material layers or that add layers to form electrical and electromechanical devices. One type of MEMS device is called an interferometric modulator. As used herein, the term interferometric modulator or interferometric light modulator refers to a device that selectively absorbs and/or reflects light using the principles of optical interference. In certain embodiments, an interferometric modulator may comprise a pair of conductive plates, one or both of which may be transparent and/or reflective in whole or part and capable of relative motion upon application of an appropriate electrical signal. In a particular embodiment, one plate may comprise a stationary layer deposited on a substrate and the other plate may comprise a metallic membrane separated from the stationary layer by an air gap. As described herein in more detail, the position of one plate in relation to another can change the optical interference of light incident on the interferometric modulator. Such devices have a wide range of applications, and it would be beneficial in the art to utilize and/or modify the characteristics of these types of devices so that their features can be exploited in improving existing products and creating new products that have not yet been developed.

[0003] Errors can occur during the manufacturing of MEMS devices. Detecting the errors and the source of the errors can present a problem in the quality control and optimization of MEMS devices. Accordingly, there is a need for structures and methods for monitoring manufacturing processes and their results.

SUMMARY OF THE INVENTION

[0004] One embodiment disclosed herein includes a method of obtaining information regarding manufacturing processes used to manufacture a micro-el ectro- mechanical system (MEMS), the method including forming at least one MEMS structure on a first side of a substrate through a series of deposition and patterning steps, simultaneously forming at least one test unit on the first side of the substrate utilizing the series of deposition and patterning steps, wherein the test unit has at least one structural difference from the MEMS structure, and detecting light reflected from the test unit from a second side of the substrate opposite the first side, whereby the detected light provides a characteristic of at least one material deposited or removed during the deposition and patterning steps.

[0005] Another embodiment disclosed herein includes a method of monitoring interferometric modulator manufacturing processes, wherein the manufacturing process comprises a series of deposition and patterning steps, the method including forming a test unit using the series of deposition and patterning steps, wherein the test unit has at least one structural difference from interferometric modulators formed by the manufacturing process and detecting optical reflectance from the test unit.

[0006] Another embodiment disclosed herein includes a test unit for use in monitoring interferometric modulator manufacturing processes, wherein the interferometric modulators are adapted for use in a display, the test unit manufactured by a process comprising at least one step in common with steps used to manufacture the interferometric modulators adapted for use in the display.

[0007] Another embodiment disclosed herein includes a wafer, comprising one or more interferometric modulators adapted for use in a display and one or more test units adapted to reflect incident light and thereby provide information regarding processes used to manufacture the one or more interferometric modulators.

[0008] Another embodiment disclosed herein includes a wafer, comprising a plurality of first means for reflecting light for use in a display and second means for reflecting incident light and for monitoring processes used to manufacture the first means.

[0009] Another embodiment disclosed herein includes a method of manufacturing a first wafer for use in a display, the method including forming a plurality of interferometric modulators and at least one test unit on a second wafer and cutting said second wafer to remove the test unit and thereby produce said first wafer.

[0010] Another embodiment disclosed herein includes a method of identifying an array of interferometric modulators as suitable for use in a display, wherein the interferometric modulators are manufactured by a process comprising a series of deposition and patterning steps, the method including forming at least one test unit using at least some of the series of deposition and patterning steps and detecting at least one characteristic of the test unit.

[0011] Another embodiment disclosed herein includes a method of monitoring the extent of etching of a first material- positioned between and adjacent to two layers of other material during manufacturing of a micro-electro-mechanical system (MEMS), the method including manufacturing a test unit that comprises the two layers of other material and the first material disposed between and adjacent to the two layers, wherein one of the two layers comprises a hole, exposing the hole to an etchant, and optically detecting a distance from the center of the hole to where the etchant has etched away the first material, whereby the distance is indicative of the extent of etching of the first material.

[0012] Another embodiment disclosed herein includes a wafer, comprising a plurality of structures comprising a sacrificial layer and at least one layer above and adjacent to the sacrificial layer, wherein the structures become interferometric modulators upon removal of the sacrificial layer, wherein the at least one layer above and adjacent to the sacrificial layer comprises a plurality of holes through which an etchant can reach the sacrificial layer and a test unit also comprising the sacrificial layer and the at least one layer above and adjacent to the sacrificial layer, wherein the at least one layer above and adjacent to the sacrificial layer in the test unit comprises multiple holes, wherein the distance between the holes in the test unit is greater than the distance between the plurality of holes in the plurality of structures.

[0013] Another embodiment disclosed herein includes a wafer, comprising a plurality of structures comprising a sacrificial layer and at least one layer above and adjacent to the sacrificial layer, wherein the structures become interferometric modulators upon removal of the sacrificial layer, wherein the at least one layer above and adjacent to the sacrificial layer comprises a plurality of holes through which an etchant can reach the sacrificial layer and a test unit also comprising the sacrificial layer and the at least one layer above and adjacent to the sacrificial layer, wherein the at least one layer above and adjacent to the sacrificial layer in the test unit comprises a single hole.

[0014] Another embodiment disclosed herein includes a method of manufacturing a wafer having a micro-electro-mechanical system (MEMS) and a test unit structure, the method including forming a plurality of structures, wherein forming the plurality of structures includes one or more material deposition and removal steps, wherein the structures comprise a sacrificial layer and at least one layer above and adjacent to the sacrificial layer, wherein the at least one layer above and adjacent to the sacrificial layer comprises a plurality of holes through which an etchant can reach the sacrificial layer, simultaneously forming a test unit, wherein forming the test unit includes the one or more material deposition and removal steps, wherein the test unit also comprises the sacrificial layer and the at least one layer above and adjacent to the sacrificial layer, wherein the at least one layer above and adjacent to the sacrificial layer in the test unit comprises multiple holes, wherein the distance between the holes in the test unit is greater than the distance between the plurality of holes in the plurality of structures, and exposing the plurality of structures and the test unit to an etchant.

[0015] Another embodiment disclosed herein includes a wafer that includes a micro-electro-mechanical structure (MEMS) and a test unit adapted to measure the extent of etching of a material removed during manufacturing of the MEMS.

[0016] Another embodiment disclosed herein includes a wafer that includes first means for moving a mechanical structure in response to an electrical stimulus and second means for measuring extent of etching of a material removed during manufacturing of the first means.

[0017] Another embodiment disclosed herein includes a test unit produced by process including depositing at least three layers of material on top of each other and forming a hole in the top layer of material.

[0018] Another embodiment disclosed herein includes a method for determining the effect of an interferometric modulator manufacturing process on color reflected from interferometric modulators manufactured by the process, the method including manufacturing a plurality of interferometric modulators comprising posts that support a first mechanical membrane, manufacturing a test unit etalon comprising posts that support a second mechanical membrane, wherein the posts in the test unit are present in higher density than the posts in the plurality of interferometric modulators, and detecting light reflected from the test unit etalon, whereby the detected light provides an indication of the depth of an interferometric cavity in the plurality of interferometric modulators.

[0019] Another embodiment disclosed herein includes a test unit for monitoring the effect of a process for manufacturing interferometric modulators on color reflected by those interferometric modulators, comprising a test etalon that comprises a higher density of posts supporting a mechanical membrane in the test etalon than in interferometric modulators produced by the process.

[0020] Another embodiment disclosed herein includes a wafer, comprising a plurality of interferometric modulators adapted for use in a display and a test unit adapted to reflect light having substantially the same color as reflected from at least one of the reflective display elements.

[0021] Another embodiment disclosed herein includes a test unit, omc;idomg an etalon having a conductive partial mirror and a conductive mechanical membrane comprising a mirror, wherein the mechanical membrane is separated from the partial mirror by a plurality of posts, wherein the density of posts is high enough such that the mechanical membrane cannot collapse toward the partial mirror when a voltage is applied between the partial mirror and the mechanical membrane.

[0022] Another embodiment disclosed herein includes a method of manufacturing a combined micro-electro-mechanical system (MEMS) and test unit structure, the method including forming a MEMS structure, wherein forming the MEMS structure includes one or more material deposition and patterning steps, wherein the MEMS structure comprises a first mechanical membrane supported by a first plurality of posts and simultaneously forming a test unit, wherein forming the test unit includes the one or more material deposition and patterning steps, the test unit comprising a second mechanical membrane supported by a second plurality of posts, wherein the second plurality of posts are present in a higher density than the first plurality of posts.

[0023] Another embodiment disclosed herein includes a wafer, comprising a plurality of first means for reflecting light for use in a display and second means for stably reflecting light having substantially the same color as reflected from at least one of the second means.

[0024] Another embodiment disclosed herein includes a test unit produced by a process that includes forming a partial mirror, forming a mechanical membrane, and forming a plurality of posts supporting the mechanical membrane and separating the mechanical membrane from the partial mirror, wherein the density of posts is high enough such that the mechanical membrane cannot collapse toward the partial mirror when a voltage is applied between the partial mirror and the mechanical membrane.

[0025] Another embodiment disclosed herein includes a method of monitoring deposition of material deposited during manufacturing of a micro-electro-mechanical system (MEMS), the method including forming a test unit that consists of at least three layers of material deposited during the manufacturing, wherein the at least three layers of material is less than the number of layers deposited during manufacturing of the MEMS, wherein the at least three layers of material form an etalon and detecting light reflected from the etalon, whereby information regarding properties of the at least three layers is obtained.

[0026] Another embodiment disclosed herein includes a wafer, comprising a plurality of interferometric modulators adapted for use in a display and a non-modulating interferometer.

[0027] Another embodiment disclosed herein includes a wafer that includes a plurality of first means for interferometrically displaying light in a display and a second means for non-modulatingly and interferometrically reflecting light.

[0028] Another embodiment disclosed herein includes a method of monitoring deposition of material deposited during manufacturing of a micro-electro-mechanical system (MEMS), the method including forming a test unit comprising one or more layers of material deposited during the manufacturing, wherein the number of layers of material in the test unit is less than the number of layers deposited during manufacturing of the MEMS and detecting the reflectance of the test unit, whereby the reflectance provides information regarding properties of the layers in the test unit.

[0029] Another embodiment disclosed herein includes a wafer, comprising a plurality of interferometric modulators adapted for use in a display, the interferometric modulators comprising a plurality of material layers and a test unit comprising one or more of the material layers, wherein the test unit comprises less than all of the plurality of material layers.

[0030] Another embodiment disclosed herein includes a method of manufacturing a combined micro-electro-mechanical system (MEMS) and test unit structure, the method including forming a MEMS structure, wherein forming the MEMS structure includes one or more material deposition and patterning steps and simultaneously forming a test unit, wherein forming the test unit includes the one or more material deposition and patterning steps, wherein the test unit comprises less than all components present in the MEMS structure.

[0031] Another embodiment disclosed herein includes a wafer produced by a process that includes depositing and patterning a series of material layers on a substrate to form a MEMS structure and simultaneously depositing and patterning a series of material layers on the substrate to form a test unit, wherein the test unit comprises less than all components present in the MEMS structure.

[0032] Another embodiment disclosed herein includes a method of measuring thicknesses of layers deposited during manufacture of a micro-electro-mechanical system (MEMS), the method including forming a structure that comprises two or more layers successively deposited on top of each other, wherein the layers are formed using a process that is used for forming those layers during manufacture of the MEMS, wherein the layers are patterned such that at least two steps are formed in a profile of the structure and measuring the height of the steps by sweeping a profilometer across the structure.

[0033] Another embodiment disclosed herein includes a test unit for measuring the thicknesses of a plurality of layers deposited during manufacturing of an interferometric modulator, comprising the layers stacked on top of each other so as to form at least two steps in a profile of the test unit.

[0034] Another embodiment disclosed herein includes a wafer, comprising a plurality of interferometric modulators adapted for use in a display, the interferometric modulators comprising a plurality of material layers and a test unit comprising the plurality of material layers stacked on top of each other so as to form at least two steps in a profile of the test unit.

[0035] Another embodiment disclosed herein includes a method of manufacturing a combined micro-electro-mechanical system (MEMS) and test unit structure, the method including forming a MEMS structure, wherein forming the MEMS structure includes one or more material deposition and patterning steps, wherein the MEMS structure comprises a plurality of layers and simultaneously forming a test unit, wherein forming the test unit includes the one or more material deposition and patterning steps, wherein the test unit comprises the plurality of layers so as to form at least two steps in a profile of the test unit.

[0036] Another embodiment disclosed herein includes a wafer that includes a plurality of reflective display elements adapted for use in a display and a test unit adapted to measure the thickness of at least one material deposited during manufacture of the reflective display elements.

[0037] Another embodiment disclosed herein includes a wafer, comprising a plurality of first means for reflecting light for use in a display and second means for measuring thickness of at least one material deposited during manufacture of the first means.

[0038] Another embodiment disclosed herein includes a wafer produced by a process comprising depositing and patterning a series of material layers on a substrate to form a MEMS structure and simultaneously depositing and patterning the series of material layers on the substrate to form a test unit, wherein layers of material remaining in the test unit after the patterning form at least two steps in a profile of the test unit.

[0039] Another embodiment disclosed herein includes a method of testing a process used to manufacture a polychromatic interferometric modulator display, wherein different color interferometric modulators in the display are manufactured by forming different depth gaps between a partial reflector and a reflective mechanical membrane, wherein the depths of the gaps are determined by deposition of one or more sacrificial layers, wherein the depth of at least one gap is determined by deposition of a plurality of sacrificial layers, the method including forming a test unit that comprises the one or more sacrificial layers, wherein at least one region of the test unit comprises the plurality of sacrificial layers deposited on top of each other, measuring a profile of the test unit, and determining a cumulative thickness of the plurality of sacrificial layers from the profile.

[0040] Another embodiment disclosed herein includes a test unit for use in testing a process used to manufacture a polychromatic interferometric modulator display, wherein different color interferometric modulators in the display are manufactured by forming different depth gaps between a partial reflector and a reflective mechanical membrane, wherein the depths of the gaps are determined by deposition of one or more sacrificial layers, wherein the depth of at least one gap is determined by deposition of a plurality of sacrificial layers, the test unit comprising a plurality of material layers on top of each other, wherein one region of the test unit includes a single sacrificial layer, a second region of the test unit includes two sacrificial layers on top of each other, and a third region of the test unit includes three sacrificial layers on top of each other.

BRIEF DESCRIPTION OF THE DRAWINGS

[0041] FIG. 1 is an isometric view depicting a portion of one embodiment of an interferometric modulator display in which a movable reflective layer of a first interferometric modulator is in a relaxed position and a movable reflective layer of a second interferometric modulator is in an actuated position. [0042] FIG. 2 is a system block diagram illustrating one embodiment of an^' electronic device incorporating a 3x3 interferometric modulator display.

[0043] FIG. 3 is a diagram of movable mirror position versus applied voltage for one exemplary embodiment of an interferometric modulator of FIG. 1.

[0044] FIG. 4 is an illustration of a set of row and column voltages that may be used to drive an interferometric modulator display.

[0045] FIG. 5A illustrates one exemplary frame of display data in the 3x3 interferometric modulator display of Figure 2.

[0046] FIG. 5B illustrates one exemplary timing diagram for row and column signals that may be used to write the frame of Figure 5A.

[0047] FIGS. 6 A and 6B are system block diagrams illustrating an embodiment of a visual display device comprising a plurality of interferometric modulators.

[0048] FIG. 7A is a cross section of the device of FIG. 1.

[0049] FIG. 7B is a cross section of an alternative embodiment of an interferometric modulator.

[0050] FIG. 7C is a cross section of another alternative embodiment of an interferometric modulator.

[0051] FIG 7D is a cross section of yet another alternative embodiment of an interferometric modulator.

[0052] FIG. 7E is a cross section of an additional alternative embodiment of an interferometric modulator.

[0053] FIG. 8 is a top view of a wafer comprising a MEMS structure and multiple process control monitors.

[0054] FIG. 9 is a cross section of layers deposited during manufacture of an interferometric modulator.

[0055] FIG. 1OA is a cross section of layers in an etal on-based process control monitor for use in monitoring a process used to manufacture the interferometric modulator of FIG. 9.

[0056] FIG. 1OB is a cross section of layers in another etalon-based process control monitor for use in monitoring a process used to manufacture the interferometric modulator of FIG. 9. [0057] FIG. 1OC is a cross section of layers in another etalon-based process control monitor for use in monitoring a process used to manufacture the interferometric modulator of FIG. 9.

[0058] FIG. 1OD is a cross section of layers in another etalon-based process control monitor for use in monitoring a process used to manufacture the interferometric modulator of FIG. 9.

[0059] FIG. HA is a cross section of layers in a non-etalon-based process control monitor for use in monitoring a process used to manufacture the interferometric modulator of FIG. 9.

[0060] FIG. 1 IB is a cross section of layers in another non-etalon-based process control monitor for use in monitoring a process used to manufacture the interferometric modulator of FIG. 9.

[0061] FIG. HC is a cross section of layers in another non-etalon-based process control monitor for use in monitoring a process used to manufacture the interferometric modulator of FIG. 9.

[0062] FIG. 1 ID is a cross section of layers in another non-etalon-based process control monitor for use in monitoring a process used to manufacture the interferometric modulator of FIG. 9.

[0063] FIG. 1 IE is a cross section of layers in another non-etalon-based process control monitor for use in monitoring a process used to manufacture the interferometric modulator of FIG. 9.

[0064] FIG. 1 IF is a cross section of layers in another non-etalon-based process control monitor for use in monitoring a process used to manufacture the interferometric modulator of FIG. 9.

[0065] FIG. 1 IG is a cross section of layers in another non-etalon-based process control monitor for use in monitoring a process used to manufacture the interferometric modulator of FIG. 9.

[0066] FIG. 12 is a top view of a wafer comprising an interferometric modulator array and process control monitors used to monitor release etching and color reflected from the interferometric modulators.

[0067] FIG. 13A is a top view of a process control monitor that can be used to monitor release etching. [0068] FIG. 13B is a top view of another process control monitor that can be used to monitor release etching.

[0069] FIG. 14 is a cross section of a process control monitor that can be used to measure the thickness of layers in interferometric modulators.

[0070] FIG. 15 is a cross section of another embodiment of a process control monitor that can be used to measure the thickness of layers in the process control monitor.

[0071] FIG. 16 is a cross section of yet another embodiment of a process control monitor that can be used to measure the thickness of layers in the process control monitor.

DETAILED DESCRIPTION OF CERTAIN EMBODIMENTS [0072] The following detailed description is directed to certain specific embodiments of the invention. However, the invention can be embodied in a multitude of different ways. In this description, reference is made to the drawings wherein like parts are designated with like numerals throughout. As will be apparent from the following description, the embodiments may be implemented in any device that is configured to display an image, whether in motion (e.g., video) or stationary (e.g., still image), and whether textual or pictorial. More particularly, it is contemplated that the embodiments may be implemented in or associated with a variety of electronic devices such as, but not limited to, mobile telephones, wireless devices, personal data assistants (PDAs), hand-held or portable computers, GPS receivers/navigators, cameras, MP3 players, camcorders, game consoles, wrist watches, clocks, calculators, television monitors, flat panel displays, computer monitors, auto displays (e.g., odometer display, etc.), cockpit controls and/or displays, display of camera views (e.g., display of a rear view camera in a vehicle), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., display of images on a piece of jewelry). MEMS devices of similar structure to those described herein can also be used in non-display applications such as in electronic switching devices.

[0073] Manufacturing of MEMS devices typically involve the formation of several layers of material having structures and thicknesses formed by using a series of material deposition, patterning, and etching steps. It can be difficult to diagnose from the final MEMS device any errors that occurred during the processing of given layers in the device. Furthermore, it can be difficult to determine from the final device which specific parameters, such as film thicknesses, should be adjusted in order to optimize the device for its intended use. Accordingly, there is a need for structures and methods that can be used to monitor the result of specific processing steps. Therefore, in various embodiments, process control monitors are provided that are constructed using at least some of the same processes used to manufacture MEMS devices. Analysis of the process control monitors provide information regarding individual components or sub-sets of components that make up the MEMS device.

[0074] One interferometric modulator display embodiment comprising an interferometric MEMS display element is illustrated in Figure 1. In these devices, the pixels are in either a bright or dark state, hi the bright ("on" or "open") state, the display element reflects a large portion of incident visible light to a user. When in the dark ("off or "closed") state, the display element reflects little incident visible light to the user. Depending on the embodiment, the light reflectance properties of the "on" and "off states may be reversed. MEMS pixels can be configured to reflect predominantly at selected colors, allowing for a color display in addition to black and white.

[0075] Figure 1 is an isometric view depicting two adjacent pixels in a series of pixels of a visual display, wherein each pixel comprises a MEMS interferometric modulator. In some embodiments, an interferometric modulator display comprises a row/column array of these interferometric modulators. Each interferometric modulator includes a pair of reflective layers positioned at a variable and controllable distance from each other to form a resonant optical cavity with at least one variable dimension. In one embodiment, one of the reflective layers may be moved between two positions. In the first position, referred to herein as the relaxed position, the movable reflective layer is positioned at a relatively large distance from a fixed partially reflective layer. In the second position, referred to herein as the actuated position, the movable reflective layer is positioned more closely adjacent to the partially reflective layer. Incident light that reflects from the two layers interferes constructively or destructively depending on the position of the movable reflective layer, producing either an overall reflective or non-reflective state for each pixel.

[0076] The depicted portion of the pixel array in Figure 1 includes two adjacent interferometric modulators 12a and 12b. In the interferometric modulator 12a on the left, a movable reflective layer 14a is illustrated in a relaxed position at a predetermined distance from an optical stack 16a, which includes a partially reflective layer. In the interferometric modulator 12b on the right, the movable reflective layer 14b is illustrated in an actuated position adjacent to the optical stack 16b.

[0077] The optical stacks 16a and 16b (collectively referred to as optical stack 16), as referenced herein, typically comprise of several fused layers, which can include an electrode layer, such as indium tin oxide (ITO), a partially reflective layer, such as chromium, and a transparent dielectric. The optical stack 16 is thus electrically conductive, partially transparent and partially reflective, and may be fabricated, for example, by depositing one or more of the above layers onto a transparent substrate 20. In some embodiments, the layers are patterned into parallel strips, and may form row electrodes in a display device as described further below. The movable reflective layers 14a, 14b may be formed as a series of parallel strips of a deposited metal layer or layers (orthogonal to the row electrodes of 16a, 16b) deposited on top of posts 18 and an intervening sacrificial material deposited between the posts 18. When the sacrificial material is etched away, the movable reflective layers 14a, 14b are separated from the optical stacks 16a, 16b by a defined gap 19. A highly conductive and reflective material such as aluminum may be used for the reflective layers 14, and these strips may form column electrodes in a display device.

[0078] With no applied voltage, the cavity 19 remains between the movable reflective layer 14a and optical stack 16a, with the movable reflective layer 14a in a mechanically relaxed state, as illustrated by the pixel 12a in Figure 1. However, when a potential difference is applied to a selected row and column, the capacitor formed at the intersection of the row and column electrodes at the corresponding pixel becomes charged, and electrostatic forces pull the electrodes together. If the voltage is high enough, the movable reflective layer 14 is deformed and is forced against the optical stack 16. A dielectric layer (not illustrated in this Figure) within the optical stack 16 may prevent shorting and control the separation distance between layers 14 and 16, as illustrated by pixel 12b on the right in Figure 1. The behavior is the same regardless of the polarity of the applied potential difference. Pn this way, row/column actuation that can control the reflective vs. non-reflective pixel states is analogous in many ways to that used in conventional LCD and other display technologies.

[0079] Figures 2 through 5B illustrate one exemplary process and system for using an array of interferometric modulators in a display application.

[0080] Figure 2 is a system block diagram illustrating one embodiment of an electronic device that may incorporate aspects of the invention. In the exemplary embodiment, the electronic device includes a processor 21 which may be any general purpose single- or multi-chip microprocessor such as an ARM, Pentium^®, Pentium II , Pentium III^®, Pentium IV^®, Pentium^® Pro, an 8051, a MIPS^®, a Power PC^®, an ALPHA^®, or any special purpose microprocessor such as a digital signal processor, microcontroller, or a programmable gate array. As is conventional in the art, the processor 21 may be configured to execute one or more software modules. Pn addition to executing an operating system, the processor may be configured to execute one or more software applications, including a web browser, a telephone application, an email program, or any other software application.

[0081] In one embodiment, the processor 21 is also configured to communicate with an array driver 22. In one embodiment, the array driver 22 includes a row driver circuit 24 and a column driver circuit 26 that provide signals to a panel or display array (display) 30. The cross section of the array illustrated in Figure 1 is shown by the lines 1-1 in Figure 2. For MEMS interferometric modulators, the row/column actuation protocol may take advantage of a hysteresis property of these devices illustrated in Figure 3. It may require, for example, a 10 volt potential difference to cause a movable layer to deform from the relaxed state to the actuated state. However, when the voltage is reduced from that value, the movable layer maintains its state as the voltage drops back below 10 volts. In the exemplary embodiment of Figure 3, the movable layer does not relax completely until the voltage drops below 2 volts. There is thus a range of voltage, about 3 to 7 V in the example illustrated in Figure 3, where there exists a window of applied voltage within which the device is stable in either the relaxed or actuated state. This is referred to herein as the "hysteresis window" or "stability window." For a display array having the hysteresis characteristics of Figure 3, the row/column actuation protocol can be designed such that during row strobing, pixels in the strobed row that are to be actuated are exposed to a voltage difference of about 10 volts, and pixels that are to be relaxed are exposed to a voltage difference of close to zero volts. After the strobe, the pixels are exposed to a steady state voltage difference of about 5 volts such that they remain in whatever state the row strobe put them in. After being written, each pixel sees a potential difference within the "stability window" of 3-7 volts in this example. This feature makes the pixel design illustrated in Figure 1 stable under the same applied voltage conditions in either an actuated or relaxed pre-existing state. Since each pixel of the interferometric modulator, whether in the actuated or relaxed state, is essentially a capacitor formed by the fixed and moving reflective layers, this stable state can be held at a voltage within the hysteresis window with almost no power dissipation. Essentially no current flows into the pixel if the applied potential is fixed.

[0082] In typical applications, a display frame may be created by asserting the set of column electrodes in accordance with the desired set of actuated pixels in the first row. A row pulse is then applied to the row 1 electrode, actuating the pixels corresponding to the asserted column lines. The asserted set of column electrodes is then changed to correspond to the desired set of actuated pixels in the second row. A pulse is then applied to the row 2 electrode, actuating the appropriate pixels in row 2 in accordance with the asserted column electrodes. The row 1 pixels are unaffected by the row 2 pulse, and remain in the state they were set to during the row 1 pulse. This may be repeated for the entire series of rows in a sequential fashion to produce the frame. Generally, the frames are refreshed and/or updated with new display data by continually repeating this process at some desired number of frames per second. A wide variety of protocols for driving row and column electrodes of pixel arrays to produce display frames are also well known and may be used in conjunction with the present invention.

[0083] Figures 4, 5A, and 5B illustrate one possible actuation protocol for creating a display frame on the 3x3 array of Figure 2. Figure 4 illustrates a possible set of column and row voltage levels that may be used for pixels exhibiting the hysteresis curves of Figure 3. In the Figure 4 embodiment, actuating a pixel involves setting the appropriate column to -Vbias, and the appropriate row to +ΔV, which may correspond to -5 volts and +5 volts respectively Relaxing the pixel is accomplished by setting the appropriate column to +Vbias, and the appropriate row to the same +ΔV, producing a zero volt potential difference across the pixel. In those rows where the row voltage is held at zero volts, the pixels are stable in whatever state they were originally in, regardless of whether the column is at ⁺Vbias, or -Vb,_as- As is also illustrated in Figure 4, it will be appreciated that voltages of opposite polarity than those described above can be used, e.g., actuating a pixel can involve setting the appropriate column to +V_b,_as, and the appropriate row to -ΔV. In this embodiment, releasing the pixel is accomplished by setting the appropriate column to - Vb,as, and the appropriate row to the same -ΔV, producing a zero volt potential difference across the pixel.

[0084] Figure 5B is a timing diagram showing a series of row and column signals applied to the 3x3 array of Figure 2 which will result in the display arrangement illustrated in Figure 5A, where actuated pixels are non-reflective. Prior to writing the frame illustrated in Figure 5A, the pixels can be in any state, and in this example, all the rows are at 0 volts, and all the columns are at +5 volts. With these applied voltages, all pixels are stable in their existing actuated or relaxed states.

[0085] In the Figure 5A frame, pixels (1,1), (1,2), (2,2), (3,2) and (3,3) are actuated. To accomplish this, during a "line time" for row 1 , columns 1 and 2 are set to -5 volts, and column 3 is set to +5 volts. This does not change the state of any pixels, because all the pixels remain in the 3-7 volt stability window. Row 1 is then strobed with a pulse that goes from 0, up to 5 volts, and back to zero. This actuates the (1,1) and (1,2) pixels and relaxes the (1,3) pixel. No other pixels in the array are affected. To set row 2 as desired, column 2 is set to -5 volts, and columns 1 and 3 are set to +5 volts. The same strobe applied to row 2 will then actuate pixel (2,2) and relax pixels (2,1) and (2,3). Again, no other pixels of the array are affected. Row 3 is similarly set by setting columns 2 and 3 to -5 volts, and column 1 to +5 volts. The row 3 strobe sets the row 3 pixels as shown in Figure 5A. After writing the frame, the row potentials are zero, and the column potentials can remain at either +5 or -5 volts, and the display is then stable in the arrangement of Figure 5A. It will be appreciated that the same procedure can be employed for arrays of dozens or hundreds of rows and columns. It will also be appreciated that the timing, sequence, and levels of voltages used to perform row and column actuation can be varied widely within the general principles outlined above, and the above example is exemplary only, and any actuation voltage method can be used with the systems and methods described herein.

[0086] Figures 6A and 6B are system block diagrams illustrating an embodiment of a display device 40. The display device 40 can be, for example, a cellular or mobile telephone. However, the same components of display device 40 or slight variations thereof are also illustrative of various types of display devices such as televisions and portable media players.

[0087] The display device 40 includes a housing 41 , a display 30, an antenna 43, a speaker 45, an input device 48, and a microphone 46. The housing 41 is generally formed from any of a variety of manufacturing processes as are well known to those of skill in the art, including injection molding, and vacuum forming. In addition, the housing 41 may be made from any of a variety of materials, including but not limited to plastic, metal, glass, rubber, and ceramic, or a combination thereof. In one embodiment the housing 41 includes removable portions (not shown) that may be interchanged with other removable portions of different color, or containing different logos, pictures, or symbols.

[0088] The display 30 of exemplary display device 40 may be any of a variety of displays, including a bi-stable display, as described herein. In other embodiments, the display 30 includes a flat-panel display, such as plasma, EL, OLED, STN LCD, or TFT LCD as described above, or a non-flat-panel display, such as a CRT or other tube device, as is well known to those of skill in the art. However, for purposes of describing the present embodiment, the display 30 includes an interferometric modulator display, as described herein.

[0089] The components of one embodiment of exemplary display device 40 are schematically illustrated in Figure 6B. The illustrated exemplary display device 40 includes a housing 41 and can include additional components at least partially enclosed therein. For example, in one embodiment, the exemplary display device 40 includes a network interface 27 that includes an antenna 43 which is coupled to a transceiver 47. The transceiver 47 is connected to the processor 21, which is connected to conditioning hardware 52. The conditioning hardware 52 may be configured to condition a signal (e.g. filter a signal). The conditioning hardware 52 is connected to a speaker 45 and a microphone 46. The processor 21 is also connected to an input device 48 and a driver controller 29. The driver controller 29 is coupled to a frame buffer 28 and to the array driver 22, which in turn is coupled to a display array 30. A power supply 50 provides power to all components as required by the particular exemplary display device 40 design.

[0090] The network interface 27 includes the antenna 43 and the transceiver 47 so that the exemplary display device 40 can communicate with one or more devices over a network. In one embodiment the network interface 27 may also have some processing capabilities to relieve requirements of the processor 21. The antenna 43 is any antenna known to those of skill in the art for transmitting and receiving signals. In one embodiment, the antenna transmits and receives RF signals according to the IEEE 802.11 standard, including IEEE 802.1 l(a), (b), or (g). In another embodiment, the antenna transmits and receives RF signals according to the BLUETOOTH standard. In the case of a cellular telephone, the antenna is designed to receive CDMA, GSM, AMPS or other known signals that are used to communicate within a wireless cell phone network. The transceiver 47 pre-processes the signals received from the antenna 43 so that they may be received by and further manipulated by the processor 21. The transceiver 47 also processes signals received from the processor 21 so that they may be transmitted from the exemplary display device 40 via the antenna 43.

[0091] In an alternative embodiment, the transceiver 47 can be replaced by a receiver. In yet another alternative embodiment, network interface 27 can be replaced by an image source, which can store or generate image data to be sent to the processor 21. For example, the image source can be a digital video disc (DVD) or a hard-disc drive that contains image data, or a software module that generates image data.

[0092] Processor 21 generally controls the overall operation of the exemplary display device 40. The processor 21 receives data, such as compressed image data from the network interface 27 or an image source, and processes the data into raw image data or into a format that is readily processed into raw image data. The processor 21 then sends the processed data to the driver controller 29 or to frame buffer 28 for storage. Raw data typically refers to the information that identifies the image characteristics at each location within an image. For example, such image characteristics can include color, saturation, and gray-scale level.

[0093] In one embodiment, the processor 21 includes a microcontroller, CPU, or logic unit to control operation of the exemplary display device 40. Conditioning hardware 52 generally includes amplifiers and filters for transmitting signals to the speaker 45, and for receiving signals from the microphone 46. Conditioning hardware 52 may be discrete components within the exemplary display device 40, or may be incorporated within the processor 21 or other components.

[0094] The driver controller 29 takes the raw image data generated by the processor 21 either directly from the processor 21 or from the frame buffer 28 and reformats the raw image data appropriately for high speed transmission to the array driver 22. Specifically, the driver controller 29 reformats the raw image data into a data flow having a raster-like format, such that it has a time order suitable for scanning across the display array 30. Then the driver controller 29 sends the formatted information to the array driver 22. Although a driver controller 29, such as a LCD controller, is often associated with the system processor 21 as a stand-alone Integrated Circuit (IC), such controllers may be implemented in many ways. They may be embedded in the processor 21 as hardware, embedded in the processor 21 as software, or fully integrated in hardware with the array driver 22. [0095] Typically, the array driver 22 receives the formatted information from the driver controller 29 and reformats the video data into a parallel set of waveforms that are applied many times per second to the hundreds and sometimes thousands of leads coming from the display's x-y matrix of pixels.

[0096] In one embodiment, the driver controller 29, array driver 22, and display array 30 are appropriate for any of the types of displays described herein. For example, in one embodiment, driver controller 29 is a conventional display controller or a bi-stable display controller (e.g., an interferometric modulator controller). In another embodiment, array driver 22 is a conventional driver or a bi-stable display driver (e.g., an interferometric modulator display). In one embodiment, a driver controller 29 is integrated with the array driver 22. Such an embodiment is common in highly integrated systems such as cellular phones, watches, and other small area displays. In yet another embodiment, display array 30 is a typical display array or a bi-stable display array (e.g., a display including an array of interferometric modulators).

[0097] The input device 48 allows a user to control the operation of the exemplary display device 40. In one embodiment, input device 48 includes a keypad, such as a QWERTY keyboard or a telephone keypad, a button, a switch, a touch-sensitive screen, a pressure- or heat-sensitive membrane. In one embodiment, the microphone 46 is an input device for the exemplary display device 40. When the microphone 46 is used to input data to the device, voice commands may be provided by a user for controlling operations of the exemplary display device 40.

[0098] Power supply 50 can include a variety of energy storage devices as are well known in the art. For example, in one embodiment, power supply 50 is a rechargeable battery, such as a nickel-cadmium battery or a lithium ion battery. In another embodiment, power supply 50 is a renewable energy source, a capacitor, or a solar cell, including a plastic solar cell, and solar-cell paint. In another embodiment, power supply 50 is configured to receive power from a wall outlet.

[0099] In some implementations control programmability resides, as described above, in a driver controller which can be located in several places in the electronic display system. In some cases control programmability resides in the array driver 22. Those of skill in the art will recognize that the above-described optimization may be implemented in any number of hardware and/or software components and in various configurations. [0100] The details of the structure of interferometric modulators that operate in accordance with the principles set forth above may vary widely. For example, Figures 7A- 7E illustrate five different embodiments of the movable reflective layer 14 and its supporting structures. Figure 7A is a cross section of the embodiment of Figure 1 , where a strip of metal material 14 is deposited on orthogonally extending supports 18. In Figure 7B, the moveable reflective layer 14 is attached to supports at the corners only, on tethers 32. hi Figure 7C, the moveable reflective layer 14 is suspended from a deformable layer 34, which may comprise a flexible metal. The deformable layer 34 connects, directly or indirectly, to the substrate 20 around the perimeter of the deformable layer 34. These connections are herein referred to as support posts. The embodiment illustrated in Figure 7D has support post plugs 42 upon which the deformable layer 34 rests. The movable reflective layer 14 remains suspended over the cavity, as in Figures 7A-7C, but the deformable layer 34 does not form the support posts by filling holes between the deformable layer 34 and the optical stack 16. Rather, the support posts are formed of a planarization material, which is used to form support post plugs 42. The embodiment illustrated in Figure 7E is based on the embodiment shown in Figure 7D, but may also be adapted to work with any of the embodiments illustrated in Figures 7A-7C as well as additional embodiments not shown. In the embodiment shown in Figure 7E, an extra layer of metal or other conductive material has been used to form a bus structure 44. This allows signal routing along the back of the interferometric modulators, eliminating a number of electrodes that may otherwise have had to be formed on the substrate 20.

[0101] In embodiments such as those shown in Figure 7, the interferometric modulators function as direct-view devices, in which images are viewed from the front side of the transparent substrate 20, the side opposite to that upon which the modulator is arranged. In these embodiments, the reflective layer 14 optically shields some portions of the interferometric modulator on the side of the reflective layer opposite the substrate 20, including the deformable layer 34 and the bus structure 44. This allows the shielded areas to be configured and operated upon without negatively affecting the image quality. This separable modulator architecture allows the structural design and materials used for the electromechanical aspects and the optical aspects of the modulator to be selected and to function independently of each other. Moreover, the embodiments shown in Figures 7C-7E have additional benefits deriving from the decoupling of the optical properties of the reflective layer 14 from its mechanical properties, which are carried out by the deformable layer 34. This allows the structural design and materials used for the reflective layer 14 to be optimized with respect to the optical properties, and the structural design and materials used for the deformable layer 34 to be optimized with respect to desired mechanical properties.

Process Control Monitors

[0102] Many MEMS manufacturing processes consist of a series of material deposition and patterning steps. Various materials may be serially deposited on a substrate to form layers. Patterning with material etching between deposition steps may be used to structurally tailor the deposited material to achieve the desired MEMS structure. The multiple layer approach to MEMS manufacturing and the small scale of the structures created presents problems in trying evaluate whether the manufacturing process has produced structures and layers of materials having the desired properties. Accordingly, in one embodiment, process control monitors are provided that may be used to evaluate the results of various manufacturing processes. In some embodiments, the process control monitors are produced using at least some of the same manufacturing steps used to manufacture a MEMS device. Evaluation of these process control monitors may then be used to determine properties of various materials and structures formed during those manufacturing steps. In some embodiments, the process control monitors are produced using the same set of material deposition and patterning steps used during the manufacturing. The process control monitors may be structurally tailored by applying different patterns to the process control monitor than is applied to the MEMS structure. For example, one layer of material present in the MEMS structure may be completely absent in the process control monitor by patterning the process control monitor in such a way that the entire layer deposited is etched away during an etching step. Similarly, in other embodiments, a layer of material normally etched away during manufacture of the MEMS structure may remain in the process control monitor.

[0103] In some embodiments, information from the process control monitor may be obtained through optical means. For example, light reflected from the process control monitor may contain information regarding the materials present in the process control monitor. Those of skill in the art will appreciate other methods of evaluating process control monitors such as laser scanning, microscopy including optical, electron, and x-ray microscopy, and spectroscopy. In one embodiment, the light reflected is detected with a photodetector to obtain the intensity of reflected light. This information may be used to determine the reflectance and transmittance of materials in the process control monitor. These properties may in turn provide information regarding the thicknesses of materials in the process control monitor. For example, the amount of reflectance from an inherently reflective material will provide a measure of its thickness. In one embodiment, a Minolta® reflectometer is used, hi another embodiment, the light reflected from the process control monitor is measured with a spectrometer to obtain the wavelength dependence of the reflected light. This wavelength dependence can provide information regarding the absorptive properties of the materials in the process control monitor and the index of refraction of the materials. Furthermore, because MEMS devices often contain reflective surfaces in close proximity, reflected light may undergo constructive and destructive interference (e.g., the MEMS device may contain one or more etalon). Therefore, the wavelength dependence of the reflected light can provide information regarding the relative positioning of reflective surfaces in the MEMS, hi one embodiment, a measured spectrum is fit to a model spectrum predicted to be reflected from an etalon in order to determine properties such as the depth of the etalon. In some embodiments, a colorimeter is used to measure the color of light reflected from the process control monitor. As used herein, an "etalon" refers to two surfaces that are at least partially reflective positioned such that light may enter through one surface and be reflected between the two surfaces multiple times before reflecting back through the same surface. The multiple reflectances can lead to destructive and constructive interference at various wavelengths, allowing for the filtering of optical wavelengths.

[0104] In one embodiment, a transparent substrate may be used to support the process control monitor. Such a substrate enables optical detection from the side opposite the deposition side. Thus, in some cases, lower deposited materials may be probed where they could not otherwise be (e.g., where the upper layers include a highly reflective layer). In other embodiments, a process control monitor is optically probed from the side of material deposition.

[0105] hi one embodiment, with reference to Figure 8, process control monitors 100, 102, and 104 may be formed on the same substrate 106 at the same time as the MEMS device 108 is being formed. As discussed above, all of the substrate 106 may be exposed to the same material deposition and patterning steps, however, different patterns may be applied to form the process control monitors 100, 102, and 104. For example, the pattern applied to the process control monitors 100, 102, and 104 during a patterning step may be different then the pattern applied to the MEMS device 108 during a corresponding patterning step. The patterning steps may include any suitable patterning technique in the art (e.g. photolithography). Any number of different process control monitors 100, 102, and 104 may be formed on the substrate. The integrated wafer 110 depicted in Figure 8 allows the probing of the processes applied during the manufacturing of the specific MEMS device 108. Thus, any anomalous results can be quickly identified before the MEMS device 108 is tested electrically or incorporated into a packaged device, thereby avoiding additional expense. In some embodiments, the process control monitors 100, 102, and 104 may also be probed after manufacture of the MEMS device 108. In one embodiment, the MEMS device 108 consists of an array of interferometric modulators suitable for use in a display. In some embodiments, the process control monitors on the substrate 106 are labeled during manufacturing. Etalon Based Process Control Monitors

[0106] As noted above, in some embodiments, process control monitors are constructed such that they contain at least one etalon. The spectrum of light reflected from the etalon may then be detected and fit to an etalon model to determine properties of the process control monitor, and hence properties of analogous structures in the MEMS device. In some embodiments, the process control monitors are formed by the same material deposition steps as the MEMS device and thus contain at least some of the material layers found in the MEMS device, hi some embodiments, the number of layers found in the process control monitors is less than the number found in the MEMS device.

[0107] One set of examples of etalon based process control monitors are structures that contain less than all of the layers found an in interferometric modulator but nonetheless still contain an etalon. Figure 9 depicts an example of materials that may be deposited during manufacture of an interferometric modulator. First, a layer of indium-tin- oxide (ITO) 154 is deposited onto a transparent substrate 152. The ITO 154, which is a transparent conductor, provides a conductive plate so that a voltage can be applied between the movable mirror in the interferometric modulator and the plate. In one embodiment, the ITO is about 500 A thick. Next, a layer of chrome 150 is deposited. In one embodiment, the chrome 150 is relatively thin (in one embodiment, approximately 70 A), allowing it to act as a partial reflector. Alternatively, the chrome layer 150 may be deposited onto the substrate 152 followed by the ITO layer 154. Next, a dielectric layer 156/158 is deposited. The dielectric layer may consist of one or more oxides. In some embodiments, the oxide layer 156/158 may be a composite layer. For example, a relatively thick layer of SiO₂ 156 (in one embodiment, approximately 450 A) may be deposited followed by a thin layer of Al₂O₃ 158 (in one embodiment, approximately 70 A) to protect the SiO₂ 156. hi some embodiments, three or more oxide layers may be used (e.g., Al₂O₃-SiO₂-Al₂O₃). The oxide layer 156/158 provides an insulating layer between the movable mirror and the chrome 150. The thickness of the layer determines the interference properties of the interferometric modulator, particularly when it is in an actuated state. In the next step, a sacrificial layer 160 is deposited (in one embodiment, approximately 2000 A). The sacrificial layer provides a space filling material that can be easily etched away without affecting the other materials, hi one embodiment, the sacrificial layer 160 is molybdenum. Other examples of suitable materials for the sacrificial layer include polysilicon, amorphous silicon, or photoresist. In the last step of manufacturing, the sacrificial layer 160 will be etched away to create an air gap between the movable mirror and the oxide layer 156,158. Patterning and etching of the sacrificial layer 160 may be used to create holes and trenches in the layer for the formation of posts and rails that will support the movable mirror. Planar material 162 may be applied to fill the holes and form the posts. Finally, the mechanical membrane 164/166 containing the movable mirror is formed, hi one embodiment, the mechanical membrane 164/166 is formed by an aluminum layer 164 (in one embodiment, approximately 500 A) followed by a nickel layer (in one embodiment, approximately 1450 A) 166. hi some embodiments, an additional aluminum layer is added on top of the nickel layer to provide better adhesion of photoresist used during patterning. After etching away the sacrificial layer 160 in the structure depicted in Figure 9, an interferometric modulator similar to that depicted in Figure 7A is obtained, hi some embodiments, a dark mask layer may be added to the transparent substrate 152 prior to addition of the other layers. The dark mask layer may be patterned to reduce reflection from portions of the structure such as posts or rails. In some embodiments, the dark mask layer includes a MoCr layer and an oxide layer. Those of skill in the art will appreciate that patterning and etching steps in addition to those mentioned here may be used to form an interferometric modulator. Furthermore, it will be appreciated that other structures of interferometric modulators are possible, as for example depicted in Figures 7B-7E.

[0108] Examples of etalon based process control monitors containing some of the material layers discussed above are depicted in Figures 10A-10D. The process control monitor depicted in Figure 1OA contains the ITO 154, chrome 150, oxide 156/158, and mechanical membrane 164/166 layers deposited on top of each other onto the substrate 152. The partially reflective chrome layer 150 and the reflective mechanical membrane 164/166 form an etalon whose reflectance may be measured from the bottom side of the substrate 152. Analyzing the spectrum of light reflected from this etalon or its color can provide an indication of the combined thickness of the oxide 156/158 layers and their index of refractions and the thickness and reflectivity of the chrome 150 layer. It will also be appreciated that this configuration approximates that obtained when an interferometric modulator is in an actuated state (i.e., the mirror is collapsed against the oxide layer). Therefore, evaluating these process control monitors will provide an indication of whether interferometric modulators produced by the process used will have the desired actuated spectral characteristics.

[0109] The process control monitor depicted in Figure 1OB consists of the ITO 154, chrome 150, oxide 156/158, and sacrificial layer 160. As mentioned above, the sacrificial layer 160 may be molybdenum, which is inherently reflective. Accordingly, an etalon is formed by the partially reflective chrome layer 150 and the reflective sacrificial layer 160. In addition to providing the same parameters regarding the oxide 156/158 layers and the actuated interferometric modulator state as discussed above, reflectance from this process control monitor may provide information regarding the sacrificial layer 160. For example, reflectance from the sacrificial layer 160 will depend on the thickness of the sacrificial layer 160. In some embodiments, the sacrificial layer 160 is removed by etching and the remaining ITO 154, chrome 150, and oxide 156/158 layers analyzed to determined if the sacrificial layer 160 has interacted with any of the remaining layers.

[0110] The process control monitor depicted in Figure 1OC contains the ITO 154, chrome 150, oxide 156/158, planar 162, and mechanical membrane 164/166 layers. An etalon is formed by the chrome 150 and mechanical membrane 164/166 layers. Analyzing the spectrum of reflected light and comparing it to the results obtained for the process control monitor in Figure 1OA can provide the index of refraction of the planar material and its thickness. Furthermore, the optical response from this process control monitor will approximate that caused by the areas of an interferometric modulator array where there are posts or rails.

[0111] The process control monitor depicted in Figure 1OD contains the ITO 154, chrome 150, planar 162, and mechanical membrane 164/166 layers. An etalon is formed by the chrome 150 and mechanical membrane 164/166 layers. Analyzing the spectrum of reflected light can provide the index of refraction of the planar material 162 as well as the thickness of the planar 162 material. Comparison with the process control monitor of Figure 1OD can provide information regarding the oxide layers 156/158 (e.g., indices of refraction and thickness).

[0112] When the etalon based process control monitors described above are formed by the same deposition and patterning steps as used to manufacture interferometric modulators, as for example when it is formed on the same substrate 106 as an interferometric modulator array 108 (see Figure 8), then appropriate patterning may be applied so that layers that are not desired in the process control monitor are etched away. For example, in the process control monitor depicted in Figure 1OA, the sacrificial layer 160 and planar 162 material deposited during manufacturing may be etched away. In some embodiments, it may be desirable to protect regions of the process control monitors to prevent etching away of layers during processing. For example, deposited planar material or material from the mechanical membrane 164/166 may be patterned so that it remains on the edges of the process control monitor to protect the sacrificial layer 160 during the release etch if it is desirable to have a process control monitor containing the sacrificial layer 160.

[0113] Those of skill in the art will appreciate many other combinations of layers deposited in a process control monitor whose optical properties (e.g., interference properties) may provide information about the corresponding material formed during manufacturing of a MEMS device. Non-Etalon Based Process Control Monitors

[0114] In some embodiments, process control monitors are constructed that do not contain two reflective surfaces forming an etalon. In these process control monitors, information regarding the materials in the monitors can be obtained through reflectance and/or transmittance measurements. These reflectance and/or transmittance values may be correlated to film thicknesses. In some embodiments, the process control monitors are formed by the same material deposition steps as the MEMS device and thus contain at least some of the material layers found in the MEMS device. In some embodiments, the number of layers found in the process control monitors is less than the number found in the MEMS device. The reflectance and/or transmittance characteristics of these structures may help identify any errors that occurred during processing of the elements included in the process control monitor structures. These process control monitor structures may be evaluated using any suitable detector such as a reflectometer, photodetector, spectrometer, or colorimeter. In one embodiment, the reflectance of the film is measured using a spherical integrator and reflectometer. These process control monitor structures enable the processing of individual elements in the MEMS structures to be monitored to determine any errors and to optimize the manufacturing process.

[0115] Figures 11 A- 11 G depict one set of examples of non-etalon based process control monitors that contain less than all layers of material deposited during manufacture of interferometric modulators such as depicted in Figure 9. The process control monitor in Figure HA consists of the ITO layer 154 and the chrome layer 150 deposited onto the substrate 152. The reflectivity of this process control monitor provides an indication of the thickness of the chrome layer 150 and the transparency of the ITO layer 154. In order for the chrome layer 150 to act as a partially reflective mirror in an interferometric modulator, the film making up the partial reflector may be very thin. For example, the film may have a thickness of about 70 A. The thickness of such thin films are difficult to measure and verify. Therefore, in one embodiment, the thickness of the chrome layer 150 is determined by measuring the reflectance of the layer in the process control monitor of Figure HA. As the thickness of the film increases, so will the reflectance. Therefore, by calibrating film thickness with measured reflectance for a given material, the thickness can be easily determined from a measured reflectance. The optical properties of the process control monitor of Figure HA also approximate the optical properties observed in an interferometric modulator array between columns where the mechanical membrane and oxide layers have been removed. Accordingly, these process control monitors can be used to determine if the intercolumn properties are acceptable for using the array as a display.

[0116] In another embodiment, a process control monitor containing only the chrome layer 150 on the substrate 152 may be used to determine the reflectance, and hence the thickness, of the chrome layer 150. Measurements of this process control monitor may be compared to those obtained for the process control monitor depicted in Figure HA to determine the optical properties of the ITO layer 154. For example, reflectance from the surface of the ITO layer 154 may be proportional to the ratio of the reflectance from the two process control monitors. In some embodiments, a chrome-only process control monitor may manufactured on a wafer separate from that used to manufacture the interferometric modulators if the processing conditions for the interferometric modulators cannot be used to create a chrome-only layer. [0117] Figure HB depicts another embodiment of a non-etalon based process control monitor structure that consists of the ITO layer 154, chrome layer 150, and oxide layer 156/158. This structure may be used to measure the optical characteristics of the ITO- chrome-oxide combination. For example, measuring the transmittance through the process control monitor provides an indication of the combined attenuation caused by the ITO layer 154, chrome layer 150, and oxide layer 156/158. Comparison of the measurements of this process control monitor structure with the measurements of the process control monitor in Figure HA can be used to isolate the optical properties of the oxide layer 156/158. In addition to providing information regarding the optical characteristics of the oxide layer 156/158, the comparison can also be used to determine the thickness of the oxide layer 156/158 (e.g., a lower transmittance will indicate a thicker oxide layer 156/158). The optical properties of the process control monitor in Figure HB also approximates those observed in an interferometric modulator array in the area of the etch release holes in the mechanical membrane.

[0118] Figure HC depicts another embodiment of a process control monitor structure that consists of the mechanical membrane layer 164/166. This process control monitor may be used to isolate and measure the reflective properties of the mechanical membrane layer 164/166.

[0119] Figure HD depicts still another embodiment of a process control monitor structure consisting only of the sacrificial layer 160 deposited onto the substrate 152. This process control monitor may be used to measure characteristics of the sacrificial layer 160 alone, including its thickness. This process control monitor may be analyzed prior to any release etch. Alternatively a layer of a protective material may be deposited over the sacrificial layer 160 to protect it during a release etch.

[0120] Figure HE depicts another embodiment of a process control monitor having oxide layers 156/158, planar material 162, and mechanical membrane layer 164/166. The reflectance from this process control monitor approximates that observed in an interferometric modulator array between rows where cuts in the ITO 154 and chrome 158 layers have been made.

[0121] Figure HF depicts an embodiment of a process control monitor having the ITO layer 154, chrome layer 150, and mechanical membrane layer 164/166. Because the chrome layer 150 and mechanical membrane layer 164/166 will together act is a reflector, the reflectance from this process control monitor can provide information regarding the transparency, thickness, and index of refraction of the ITO layer 154. Furthermore, the reflectance from this process control monitor may be compared with that for Figure 1 IA to isolate the optical properties of the chrome layer 150. hi other words, the results from testing this process monitor may be used to subtract the optical effects of the ITO layer 154 in the process control monitor of Figure 1 IA.

[0122] Figure HG depicts still another embodiment of a process control monitor that comprises the oxide layer 156/158 and the mechanical membrane layer 164/166. Because the mechanical membrane layer 164/166 acts as a strong reflector, this process control monitor may be used to determine the transparency, thickness, and index of refraction of the oxide layer 156/158.

[0123] As for the etalon based process control monitors, the non-etalon based process control monitors described above may be formed by the same deposition and patterning steps as used to manufacture the interferometric modulators. Appropriate patterning may be applied so that layers that are not desired in the process control monitor are etched away, hi addition, appropriate protection against etching may be applied.

[0124] Those of skill in the art will appreciate many other combinations of layers deposited in a process control monitor whose optical properties (e.g., reflectance and/or transmittance) may provide information about the corresponding material formed during manufacturing of a MEMS device. Release Etch Process Control Monitors

[0125] The rate and extent of the release etch process during MEMS manufacture may be monitored using a release etch or spatial process control monitor. Figure 12 depicts a wafer 200 containing an interferometric modulator array 202 and a series of process control monitors 204, 206, and 208. The interferometric modulator array 202 contains a number of posts 210 and rails 212 to support the mechanical membrane. A series of etch holes 214 are formed into the mechanical membrane so that etchant can reach the sacrificial layer during the release etch. For the manufacturing to be successful, the sacrificial layer should be completely removed from the array region. Accordingly, in one embodiment, process control monitors are provided to monitor the rate and extent of release etching.

[0126] One such process control monitor is depicted in process control monitor 206. This process control monitor 206 consists of the same interferometric modulator structure as present in the array 202, however, only a single hole 216 is patterned into the mechanical membrane. The distance between the hole 216 and the edges of the process control monitor 206 is greater than the distance between the holes 214 in the interferometric modulator array 202. Because the process control monitor 206 contains only a single hole 216 as opposed to multiple holes 214, not all of the sacrificial layer can be removed from the process control monitor 206 in the amount of time it takes the release etchant to remove the entire sacrificial layer in the array 202. As the etching in the process control monitor 206 proceeds, the area of the process control monitor where the sacrificial layer has been removed will contrast in color from the areas where the etchant has not yet reached as observed from the side of the substrate opposite the process side. In cases where a reflective sacrificial layer is used (e.g., molybdenum), this contrast is due to the different etalons formed. Where the sacrificial layer is still present, an etalon will be formed between the chrome layer and the reflective sacrificial layer. Where the sacrificial layer has been removed, an etalon will be formed between the chrome layer and the reflective mechanical membrane. Thus, the color observed where the sacrificial layer has been removed will approximate the color of an unactuated interferometric modulator (e.g., a bright state) while the color observed where the sacrificial layer remains will approximate the color of an actuated interferometric modulator (e.g., a dark state). The distance from the center of the hole 216 to the boundary of color change (e.g., the radius) will provide a measure of the extent of etching. This process control monitor may be used to measure the rate and extent of etching either during the process itself (i.e., in-situ) or after its completion.

[0127] A similar etch-release process control monitor is depicted by the process control monitor 208. In this process control monitor, multiple holes 218 are formed in the mechanical membrane, however, the distance between each hole 218 is greater than the distance between the holes 214 in the interferometric modulator array 202. Thus, etching in the process control monitor 208 will be incomplete after the entire sacrificial layer has been removed from the interferometric modulator array 202. A distance indicating the extent of etching may be measured from the center of each hole 218 in the process control monitor 208.

[0128] Etch-release process control monitors as described above may take on any suitable shape. For example, instead of a structure similar to that found in the interferometric modulator array, the process control monitor may consist of a strip shape 250 with one or more holes 252 in the mechanical membrane, as depicted in Figure 13 A. The extent of etching may then be measured by determining the linear distance from the holes 252 along the strip 250 to where etching has extended, hi another embodiment, depicted in Figure 13B, holes having the shape of rectangular slots 254 are formed into the strip 250 instead of holes having a circular shape. In some embodiments, a plurality of slots 254 are provided having varying widths (e.g., 3 μm, 4 μm, 5 μm).

[0129] In some embodiments, planarization or other protective material may be patterned around the edges of the process control monitor to provide a seal to protect against the release etchant from reaching the sacrificial layer from the edges. Accordingly, the sacrificial layer will only be removed by etchant entering the etch release holes. In some embodiments, the mechanical membrane in the etch release process control monitor may be electrically shorted to the ITO/chrome layers.

[0130] The extent of etching may be measured using the process control monitors described above by visually observing the process control monitors or by electronically imaging the process control monitors, such as by using a CCD camera, and then computationally analyzing the image so that the measuring is automated, hi some embodiments, posts in the process control monitor may be used as a vernier for determining the extant of etching. For example, posts may be formed in the process control monitor having a known distance from each other. The number of posts along a line from the center of the hole may then be used to approximate the distance. In some embodiments, a higher density of posts than formed in the interferometric modulators may be used to provide a more precise measurement. Those of skill in the art will appreciate many other shapes and structures that may be used to measure the extent of etching. Interferometric Modulator Process Control Monitors

[0131] In one embodiment, the interference properties (e.g., the spectrum of reflected light) of interferometric modulators may be determined by using a process control monitor that consists of an interferometric modulator with enhanced stability. Such process control monitors may be constructed so that the mechanical membrane is resistant to movement, and therefore fixed in position, forming a static etalon. In one embodiment, such process control monitors may be formed by using a substantially transparent dielectric layer (e.g., an oxide layer) in place of the sacrificial layer. The reflective mechanical membrane will thus rest against the dielectric layer and be in a fixed position. Such a process control monitor may advantageously be manufactured separately from a display interferometric modulator array so that a thicker oxide layer can be deposited than is deposited during typical interferometric modulator manufacture.

[0132] In another embodiment, a process control monitor is formed that may be manufactured by the same material depositions as a display interferometric modulator array. For example, as depicted in Figure 12, a process control monitor 204 may be constructed that comprises a higher density of posts 220 than is found in the interferometric modulator array 202. The higher density of posts 220 provide increased positional stability to the mechanical membrane that they support. Accordingly, even under application of an electric potential (e.g., less than about 10 volts, 15 volts, or 20 volts), the mechanical membrane in the process control monitor 204 will resist moving toward the ITO layer and thereby, reflect the same spectrum of light. As used herein, by "posts" it is meant any intermittent structure that may be used to support a mechanical membrane. Accordingly, it is intended that "posts" include "point" structures consisting essentially of a vertical linear structure. It is also intended that "posts" include structures consisting essentially of a strip of vertical material, also known as rails.

[0133] Process control monitors having stable mechanical membranes, such as described above, may be used to optimize manufacturing to produce interferometric modulators that will reflect a desired spectrum of light. Furthermore, such process control monitors provide a quick check of the success of a manufacturing process. In some embodiments, where a manufacturing process produces an array of interferometric modulators that reflect different colors (e.g., for use in a polychromatic display), multiple process control monitors as described above may be used, each reflecting the corresponding color. Alternatively, a single process control monitor may be formed having different regions where each region has posts having a different height than other regions. Thus, each region will reflect a different color light. Thickness Process Control Monitors

[0134] Still another type of process control monitor is used to measure the thickness of each layer deposited during processing. In one embodiment, thickness process control monitors are manufactured such that a single step is formed from the substrate to the top of the process control monitor. The step height of the single step will thus correspond to the combined thickness of the all the layers of the process control monitor at the location of the step. Non-limiting examples of layers that may be deposited include the ITO and chrome layers, the oxide layers, the sacrificial layer, planarization on the sacrificial layer, mechanical membrane layer on the oxide layers, and mechanical membrane layers on the sacrifical layer on the oxide layers.

[0135] In another embodiment, multiple layer process control monitors are formed such that a stack with a stair-step pattern profile may be formed. The step heights will correspond to the thickness of one or more deposited layers. For example, the resulting process control monitor may have a structure similar to that in Figure 14. The process control monitor in Figure 14 contains each of the layers deposited during manufacturing of an interferometric modulator, such as the one depicted in Figure 9. The process control monitor provides steps corresponding to the thickness of the ITO layer 154, the chrome layer 150, the oxide layers 156/158, the sacrificial layer 160, the planar material 162, and the mechanical membrane, 164/166. The thickness of each step may be measured in a single sweep of an appropriate thickness measuring technique rather than having to measure each layer in a separate process control monitor. In a non-limiting example, a stylus-based surface profiler (e.g., a profilometer), such as available from KLA-Tencor may be used to measure step heights by a single sweep of the stylus and thus quickly determine the thickness of each layer deposited in a particular interferometric modulator manufacturing run. The stair step pattern reduces the natural bounce encountered when using profilometers and thereby improves accuracy as compared to sweeping across each layer individually. Those of skill in the art will recognize that any combination of layers may be used in a multi-stair step pattern. Thus, not all layers deposited during manufacture of interferometric modulators need to be included.

[0136] Another embodiment of a thickness process control monitor is depicted in Figure 15. This process control monitor also has a stair-step profile; however, the stair¬ step pattern formed does not monotonically increase in height. One advantage of such a pattern is that the step heights may be formed to more closely correspond to actual thicknesses present in some interferometric modulators. In addition to layers discussed above, the process control monitor of Figure 15 also contains a dark mask layer 275. The dark mask layer 275 may be used in interferometric modulators to inhibit reflection from some static structures such as posts and rails. In this embodiment, an additional oxide layer 277 may be deposited above the dark mask layer 275.

[0137] Step 300 in Figure 15 corresponds to the combined thicknesses of all of the oxide layers (277, 156, and 158) and the dark mask 275. This step may be compared with step 302 to determine the thickness of the dark mask 275. The absolute height of step 304 provides the combined thickness of the oxide layers 277, 156, and 158 and the ITO 154 and chrome 150 layers. Comparison with step 302 provides the thickness of the combined ITO 154 and chrome 150 layers. Step 306 provides the thickness of the oxide layers 156/158 that are deposited on top of the ITO 154 and chrome 150 layers. Step 308 corresponds to the thickness of the mechanical membrane 164/166. The absolute height of step 308 will also approximate the combined thicknesses of material when an interferometric modulator is in an actuated state with the mechanical membrane 164/166 collapsed on top of the oxide layer 158. Step 310 corresponds to the combined thicknesses of the mechanical membrane 164/166 and the planar material 162. Comparison with step 308 may be used to determine the thickness of the planar material 162. Step 312 corresponds to the thickness of the sacrificial layer 160. Finally, step 314 corresponds to the thickness of the planar material 312. The absolute height of step 314 also corresponds to the position of the mechanical membrane 164/166 when an interferometric modulator is in an unactuated state.

[0138] In some embodiments, polychromatic interferometric modulator displays are formed. One such polychromatic display uses interferometric modulators having different gap depths to reflect different colors. For example, interferometric modulators having three different gap depths adapted to reflect predominantly red, green, or blue colors may be employed. One method of forming such a polychromatic display is to deposit and pattern three sacrificial layers prior to deposition of the planar material and mechanical membrane layers. The patterning of the sacrificial layers may be such that a single layer remains for one set of interferometric modulators, two layers remain for another set of interferometric modulators, and three layers remain for a final set of interferometric modulators. After deposition of the mechanical membrane and release etching, a smaller gap depth will be formed where the single sacrificial layer was formed, a medium gap depth will be formed where two sacrificial layers were formed, and a larger gap depth will be formed where three sacrificial layers were formed. Figure 16 depicts a thickness process control monitor that may be used to measure layer thicknesses formed during use of such a three-sacrificial layer process. In addition to sacrificial layer 160, sacrificial layers 279 and 281 are also formed. Those of skill in the art will appreciate that the sacrificial layers 160, 279, and 281 may be deposited sequentially or they may be deposited in a different order if liftoff or etch back techniques are utilized. Step 350 corresponds to the combined thicknesses of all of the oxide layers (277, 156, and 158) and the dark mask 275. This step may be compared with step 352 to determine the thickness of the dark mask 275. The absolute height of step 354 provides the combined thickness of the oxide layers 277, 156, and 158 and the ITO 154 and chrome 150 layers. Comparison with step 352 provides the thickness of the combined ITO 154 and chrome 150 layers. The comparison of step 356 with step 354 provides the thickness of the oxide layers 156/158 that are deposited on top of the ITO 154 and chrome 150 layers. Step 358 corresponds to the thickness of the mechanical membrane 164/166. The absolute height of step 358 also approximates the combined thicknesses of material when an interferometric modulator is in an actuated state with the mechanical membrane 164/166 collapsed on top of the oxide layer 158. Step 360 corresponds to the combined thicknesses of the mechanical membrane 164/166 and the planar material 162. Comparison with step 358 may be used to determine the thickness of the planar material 162.

[0139] Step 362 corresponds to the combined thickness of the mechanical membrane 164/166 and the single sacrificial layer 160. Comparison of step 362 with step 358 provides the thickness of the sacrificial layer 160. The absolute height of step 362 also corresponds to the position of the mechanical membrane 164/166 when the interferometric modulator having the smallest gap depth is in an unactuated state. The absolute height of step 364 corresponds to the combined height in an interferometric modulator array over a post that is between two interferometric modulators having the smallest gap depth. Comparison of step 364 with step 358 provides the height of the post. In a similar manner, step 366 corresponds to the combined thickness of the mechanical membrane 164/166 and the first 160 and second 279 sacrificial layers. Comparison of step 366 with step 362 provides the thickness of the second sacrificial layer 279. The absolute height of step 366 also corresponds to the position of the mechanical membrane 164/166 when the interferometric modulator having the medium gap depth is in an unactuated state. The absolute height of step 368 corresponds to the combined height in an interferometric modulator array over a post that is between two interferometric modulators having the medium gap depth. Comparison of step 368 with step 358 provides the height of the post. Step 370 corresponds to the combined thickness of the mechanical membrane 164/166 and first 160, second 279, and third 281 sacrificial layers. Comparison of step 370 with step 366 provides the thickness of the third sacrificial layer 281. The absolute height of step 370 also corresponds to the position of the mechanical membrane 164/166 when the interferometric modulator having the largest gap depth is in an unactuated state. The absolute height of step 372 corresponds to the combined height in an interferometric modulator array over a post that is between two interferometric modulators having the largest gap depth. Comparison of step 372 with step 358 provides the height of the post.

[0140] The process control monitor of Figure 16 provides for the accurate measurement of the gap depths produced by a particular interferometric modulator manufacturing process. Measuring the cumulative height of the sacrificial layers corresponding to the medium and large gap depth interferometric modulators provides a more accurate indication of the resulting gap depth than would be obtained by measuring the individual thicknesses of the three sacrificial layers. If the three layers were measured separately, local variation in the thickness of each layer would be compounded when the thicknesses are added together to obtain total gap depths. In contrast, the process control monitor of Figure 16 provides single measurements of the combined thicknesses the sacrificial layers, reducing errors introduced by local variances in each separate sacrificial layer.

[0141] In the embodiments of Figures 15 and 16, the mechanical membrane 164/166 may be used to protect the sacrificial layer 160 in the process control monitors , during the release etch. Accordingly, in some embodiments, the thickness process control monitors may be evaluated after release etch. In some other embodiments, thickness process control monitors may be evaluated prior to the release etch. If the results indicate a problem with one or more layer thicknesses, the wafer may be scrapped prior to the release etch, thereby saving time and money.

[0142] Those of skill in the art will recognize that many other stair-step patterned process control monitors may be produced. It will also be appreciated that thickness process control monitors that contain less than all of the layers in a MEMS device may be constructed.

[0143] Although the invention has been described with reference to embodiments and examples, it should be understood that numerous and various modifications can be made without departing from the spirit of the invention. Accordingly, the invention is limited only by the following claims.

Claims

WHAT IS CLAIMED IS:

1. A method of obtaining information regarding manufacturing processes used to manufacture a micro-electro-mechanical system (MEMS), comprising: forming at least one MEMS structure on a first side of a substrate through a series of deposition and patterning steps; simultaneously forming at least one test unit on the first side of the substrate utilizing the series of deposition and patterning steps, wherein the test unit has at least one structural difference from the MEMS structure; and detecting light reflected from the test unit from a second side of the substrate opposite the first side, whereby the detected light provides a characteristic of at least one material deposited or removed during the deposition and patterning steps.

2. The method of claim 1, wherein the MEMS structure is an interferometric modulator.

3. The method of claim 1, wherein the test unit is formed using the same sequence of deposition and patterning steps used to form the MEMS structure.

4. The method of claim 1, wherein after forming the test unit and the MEMS structure, the test unit comprises a layer of material not present in the MEMS structure.

5. The method of claim 1, wherein after forming the test unit and the MEMS structure, the MEMS structure comprises a layer of material not present in the test unit.

6. The method of claim 1, wherein after forming the test unit and the MEMS structure, the test unit comprises the same layers of material as present in the MEMS structure.

7. The method of claim 1, wherein said detecting includes measuring the reflected light with a photodetector.

8. The method of claim 1, wherein said detecting includes measuring the reflected light with a spectrometer.

9. The method of claim 1, wherein said detecting includes measuring the reflected light with a colorimeter.

10. The method of claim 1, wherein said detecting includes detecting the reflected light with a camera.

11. The method of claim 1 , wherein the characteristic of said material deposited or removed includes the thickness of the material.

12. The method of claim 1, wherein the characteristic of said material deposited or removed includes the material's index of refraction.

13. The method of claim 1, wherein the characteristic of said material deposited or removed includes the material's reflectivity.

14. A method of monitoring interferometric modulator manufacturing processes, wherein the manufacturing process comprises a series of deposition and patterning steps, the method comprising: forming a test unit using the series of deposition and patterning steps, wherein the test unit has at least one structural difference from interferometric modulators formed by the manufacturing process; and detecting optical reflectance from the test unit.

15. The method of claim 14, wherein optical reflectance is detected from a side of the test unit where the deposition and patterning steps are applied.

16. The method of claim 14, wherein optical reflectance is detected from a side of the test unit opposite a side where the deposition and patterning steps are applied.

17. The method of claim 14, wherein the test unit is formed using the same sequence of deposition and patterning steps used in the manufacturing process.

18. The method of claim 14, wherein after forming the test unit, the test unit comprises a layer of material not present in interferometric modulators formed by the manufacturing process.

19. The method of claim 14, wherein after forming the test unit, the test unit is lacking a layer of material present in interferometric modulators formed by the manufacturing process.

20. The method of claim 14, wherein after forming the test unit, the test unit comprises the same layers of material as present in interferometric modulators formed by the manufacturing process.

21. The method of claim 14, wherein the detecting step includes using a photodetector.

22. The method of claim 14, wherein the detecting step includes using a spectrometer.

23. The method of claim 14, wherein said detecting includes measuring the reflected light with a colorimeter.

24. The method of claim 14, wherein said detecting includes detecting the reflected light with a camera.

25. A test unit for use in monitoring interfero metric modulator manufacturing processes, wherein the interferometric modulators are adapted for use in a display, the test unit manufactured by a process comprising at least one step in common with steps used to manufacture the interferometric modulators adapted for use in the display.

26. The test unit of claim 25, wherein the at least one step in common includes a deposition step.

27. The test unit of claim 25, wherein the test unit comprises at least one layer of material also present in the interferometric modulators.

28. The test unit of claim 25, wherein the test unit comprises an etalon.

29. The test unit of claim 28, wherein the etalon comprises: a layer of partially reflective material; a layer of substantially totally reflective material; and one or more dielectric layers positioned between the partially reflective material and the substantially totally reflective material.

30. The test unit of claim 29, wherein the partially reflective material and the substantially totally reflective material contact the one more dielectric layers.

31. A wafer, comprising: one or more reflective display elements adapted for use in a display; and one or more test units adapted to reflect incident light and thereby provide information regarding processes used to manufacture the one or more reflective display elements.

32. The wafer of claim 31, wherein the reflective display elements are interferometric modulators.

33. The wafer of claim 31, wherein at least one of the one or more test units includes an etalon.

34. The wafer of claim 31, wherein the information regarding manufacturing processes includes information regarding properties of a material deposited during the manufacturing processes.

35. The wafer of claim 34, wherein the information regarding properties of deposited material includes the material's thickness.

36. The wafer of claim 34, wherein the information regarding properties of deposited material includes the material's index of refraction.

37. The wafer of claim 34, wherein the information regarding properties of deposited material includes the material's reflectivity.

38. The wafer of claim 31, wherein at least one of the one or more test units comprises at least one layer of material also present in the reflective display elements.

39. A wafer, comprising: a plurality of first means for reflecting light for use in a display; and second means for reflecting incident light and for monitoring processes used to manufacture the first means.

40. The wafer of claim 39, wherein the first means comprise interferometric modulators.

41. The wafer of claims 39 or 40, wherein the second means comprises a test unit formed on the wafer.

42. The wafer of claim 39, 40, or 41, wherein the processes monitored include one or more deposition steps.

43. The wafer of claim 39, 40, 41, or 42, wherein the second means provides information regarding the processes prior to the first means being rendered functional.

44. The wafer of claim 39, 40, 41, 42, 43, or 44, wherein the second means for monitoring provides information regarding the processes after the second means are rendered functional.

45. A method of manufacturing a first wafer for use in a display, the method comprising: forming a plurality of interferometric modulators and at least one test unit on a second wafer; and cutting said second wafer to remove the test unit and thereby produce said first wafer.

46. A display comprising a first wafer produced by the process of claim 45.

47. A method of identifying an array of interferometric modulators as suitable for use in a display, wherein the interferometric modulators are manufactured by a process comprising a series of deposition and patterning steps, the method comprising: forming at least one test unit using at least some of the series of deposition and patterning steps; and detecting at least one characteristic of the test unit.

48. The method of claim 47, wherein the characteristic is an optical characteristic.

49. The method of claim 47, wherein the characteristic is a height profile of the test unit.

50. An array of interferometric modulators identified as suitable for use as a display by the method of claim 47.

51. A method of monitoring the extent of etching of a first material positioned between and adjacent to two layers of other material during manufacturing of a micro- electro-mechanical system (MEMS), comprising: manufacturing a test unit that comprises the two layers of other material and the first material disposed between and adjacent to the two layers, wherein one of the two layers comprises a hole; exposing the hole to an etchant; and optically detecting a distance from the center of the hole to where the etchant has etched away the first material, whereby the distance is indicative of the extent of etching of the first material.

52. The method of claim 51, wherein the optical detecting comprises detecting reflectance of light from a side of the test unit where the first material and the two layers of other material are deposited during manufacturing of the test unit.

53. The method of claim 51, wherein the optical detecting comprises detecting reflectance of light from a side of the test unit opposite the side where the first material and the two layers of other material are deposited during manufacturing of the test unit.

54. The method of claim , 51, wherein the MEMS includes interferometric modulators and the first material is a sacrificial layer that determines positioning of a mechanical membrane relative to other layers in the interferometric modulators.

55. The method of claim 54, wherein the first material is molybdenum.

56. The method of claim 54, wherein the first material is silicon.

57. The method of claim 51 , wherein the hole is photolithographically created.

58. The method of claim 51, wherein substantially different reflectivity in the visible spectrum is detected where the etchant has etched away the first material as compared to where the etchant has not etched away the first material.

59. The method of claim 51, wherein the optical detecting includes visually observing the test unit.

60. The method of claim 51, wherein the optical detecting includes detecting light reflected from the test unit with a camera.

61. The method of claim 51, wherein the optical detecting comprises visually observing the distance.

62. The method of claim 51, wherein the optical detecting is performed while exposing the hole to the etchant.

63. The method of claim 51, wherein the optical detecting is performed after exposing the hole to the etchant.

64. The method of claim 63, wherein the optical detecting is performed after removing the test unit from an etchant chamber.

65. The method of claim 51, wherein the manufacturing comprises forming a plurality of posts in the test unit that support the separation of the two layers of other material after removal of the first material.

66. The method of claim 65, wherein the posts are used as a vernier to determine said distance.

67. A wafer, comprising: a plurality of structures comprising a sacrificial layer and at least one layer above and adjacent to the sacrificial layer, wherein the structures become interferometric modulators upon removal of the sacrificial layer, wherein the at least one layer above and adjacent to the sacrificial layer comprises a plurality of holes through which an etchant can reach the sacrificial layer; and a test unit also comprising the sacrificial layer and the at least one layer above and adjacent to the sacrificial layer, wherein the at least one layer above and adjacent to the sacrificial layer in the test unit comprises multiple holes, wherein the distance between the holes in the test unit is greater than the distance between the plurality of holes in said plurality of structures.

68. The wafer of claim 67, wherein the distance between the holes in the interferometric modulators and the test unit are such that the etchant can substantially completely remove the sacrificial layer in the interferometric modulators before it can substantially completely remove the sacrificial layer in the test unit.

69. The wafer of claim 67, wherein the at least one layer above the sacrificial layer comprises a mechanical membrane that includes a mirror.

70. The wafer of claim 67, wherein the plurality of structures and the test unit are disposed on a substantially transparent substrate.

71. A wafer, comprising: a plurality of structures comprising a sacrificial layer and at least one layer above and adjacent to the sacrificial layer, wherein the structures become interferometric modulators upon removal of the sacrificial layer, wherein the at least one layer above and adjacent to the sacrificial layer comprises a plurality of holes through which an etchant can reach the sacrificial layer; and a test unit also comprising the sacrificial layer and the at least one layer above and adjacent to the sacrificial layer, wherein the at least one layer above and adjacent to the sacrificial layer in the test unit comprises a single hole.

72. The wafer of claim 71, wherein the single hole has a diameter substantially the same as the plurality of holes.

73. The wafer of claim 71, wherein the test unit is adapted so that the etchant can substantially completely remove the sacrificial layer in the interferometric modulators before it can substantially completely remove the sacrificial layer in the test unit.

74. The wafer of claim 71, wherein the distance between the single hole and the edges of the test unit is greater than the distance between the plurality of holes in said plurality of structures.

75. The wafer of claim 71, wherein the at least one layer above the sacrificial layer comprises a mechanical membrane that includes a mirror.

76. The wafer of claim 71, wherein the plurality of structures and the test unit are disposed on a substantially transparent substrate.

77. A method of manufacturing a wafer having a micro-electro-mechanical system (MEMS) and a test unit structure, the method comprising: forming a plurality of structures, wherein forming the plurality of structures includes one or more material deposition and removal steps, wherein the structures comprise a sacrificial layer and at least one layer above and adjacent to the sacrificial layer, wherein the at least one layer above and adjacent to the sacrificial layer comprises a plurality of holes through which an etchant can reach the sacrificial layer; simultaneously forming a test unit, wherein forming the test unit includes said one or more material deposition and removal steps, wherein the test unit also comprises the sacrificial layer and the at least one layer above and adjacent to the sacrificial layer, wherein the at least one layer above and adjacent to the sacrificial layer in the test unit comprises multiple holes, wherein the distance between the holes in the test unit is greater than the distance between the plurality of holes in said plurality of structures; and exposing the plurality of structures and the test unit to an etchant.

78. The method of claim 77, wherein the test unit is formed with a structure different from the plurality of structures by applying at least one different patterning step.

79. The method of claim 78, wherein the different patterning step comprises defining a pattern for the multiple holes in the test unit.

80. A wafer produced by the process of claim 77.

81. A wafer, comprising: a micro-electro-mechanical structure (MEMS); and a test unit adapted to measure the extent of etching of a material removed during manufacturing of the MEMS.

82. A wafer, comprising: first means for moving a mechanical structure in response to an electrical stimulus; and second means for measuring extent of etching of a material removed during manufacturing of the first means.

83. The wafer of claim 82, wherein the first means comprises a micro-electro¬ mechanical structure (MEMS).

84. The wafer of claims 82 or 83, wherein the second means comprises a test unit.

85. The wafer of claim 83, wherein the MEMS comprises an interferometric modulator.

86. The wafer of claim 82, 83, 84, or 85, wherein the material comprises a sacrificial layer that determines the depth of a gap in the first means.

87. A test unit produced by process comprising: depositing at least three layers of material on top of each other; and forming a hole in the top layer of material.

88. A method for determining the effect of an interferometric modulator manufacturing process on color reflected from interferometric modulators manufactured by the process, comprising: manufacturing a plurality of interferometric modulators comprising posts that support a first mechanical membrane; manufacturing a test unit etalon comprising posts that support a second mechanical membrane, wherein the posts in the test unit are present in higher density than the posts in the plurality of interferometric modulators; and detecting light reflected from the test unit etalon, whereby the detected light provides an indication of the depth of an interferometric cavity in the plurality of interferometric modulators.

89. The method of claim 88, wherein the test unit comprises at least two regions where the posts in one region have a different height than posts in the other region such that light reflected from the two regions are of different color.

90. The method of claim 88, wherein at least two test unit etalons are manufactured where the posts in one test unit have a different height than posts in the other test unit such that light reflected from the two test units are of different color.

91. The method of claim 88, wherein the reflected light is detected during manufacture of the plurality of interferometric modulators and the test unit.

92. The method of claim 88, wherein the reflected light is detected after manufacture of the plurality of interferometric modulators and the test unit.

93. The method of claim 88, wherein manufacturing the interferometric modulators and manufacturing the test unit comprise same one or more material deposition and patterning steps.

94. The method of claim 88, wherein the first and second mechanical membranes are structurally substantially identical.

95. The method of claim 88, wherein detecting the reflected light comprises measuring a color of the reflected light with a colorimeter.

96. The method of claim 88, wherein detecting the reflected light comprises measuring a spectrum of the reflected light with a spectrometer.

97. The method of claim 96, further comprising determining the depth of the etalon in the test unit from the detected light.

98. The method of claim 97, wherein the determining comprises fitting the measured spectrum to a model of etalon interference.

99. A test unit for monitoring the effect of a process for manufacturing interferometric modulators on the color of light reflected by those interferometric modulators, comprising a test etalon that comprises a higher density of posts supporting a mechanical membrane in the test etalon than in interferometric modulators produced by the process.

100. The test unit of claim 99, wherein the mechanical membrane in the test etalon has substantially the same structure as a mechanical membrane in the interferometric modulators produced by the process.

101. The test unit of claim 99, wherein, except for the higher density of posts, the test unit has substantially the same structure as the interferometric modulators produced by the process.

102. A wafer, comprising: a plurality of reflective display elements adapted for use in a display; and a test unit adapted to reflect light having substantially the same color as reflected from at least one of said reflective display elements.

103. The wafer of claim 102, wherein the reflective display elements are interferometric modulators.

104. The wafer of claim 102, wherein the test unit comprises an etalon having a higher density of posts supporting a mechanical membrane than in the plurality of reflective display elements.

105. The wafer of claim 104, wherein, except for the higher density of posts, the reflective display elements and the test unit have substantially the same structure.

106. The wafer of claim 104, wherein a first set of the reflective display elements comprise etalons having a different color than a second set of the reflective display elements, wherein the etalon of the test unit has a color substantially the same as the first set of the reflective display elements, wherein the wafer further comprises a second test unit having a color substantially the same as the second set of the reflective display elements.

107. A test unit, comprising an etalon having a conductive partial mirror and a conductive mechanical membrane comprising a mirror, wherein the mechanical membrane is separated from the partial mirror by a plurality of posts, wherein the density of posts is high enough such that the mechanical membrane cannot collapse toward the partial mirror when a voltage is applied between the partial mirror and the mechanical membrane.

108. The test unit of claim 107, wherein the mechanical membrane cannot collapse toward the partial mirror when a voltage less than about 10 volts is applied.

109. The test unit of claim 107, wherein the mechanical membrane cannot collapse toward the partial mirror when a voltage less than about 15 volts is applied.

110. The test unit of claim 107, wherein the mechanical membrane cannot collapse toward the partial mirror when a voltage less than about 20 volts is applied.

111. A method of manufacturing a combined micro-electro-mechanical system (MEMS) and test unit structure, comprising: forming a MEMS structure, wherein forming the MEMS structure includes one or more material deposition and patterning steps, wherein the MEMS structure comprises a first mechanical membrane supported by a first plurality of posts; and simultaneously forming a test unit, wherein forming the test unit includes said one or more material deposition and patterning steps, the test unit comprising a second mechanical membrane supported by a second plurality of posts, wherein the second plurality of posts are present in a higher density than the first plurality of posts.

112. The method of claim 111, wherein the first and second mechanical membranes have substantially the same structure.

113. The method of claim 111, wherein the test unit is formed using the same sequence of deposition and patterning steps used to form the MEMS structure.

114. A wafer produced by the process of claim 111.

115. A wafer, comprising: a plurality of first means for reflecting light for use in a display; and second means for stably reflecting light having substantially the same color as reflected from at least one of said second means.

116. The wafer of claim 115, wherein the first means are interferometric modulators.

1 17. The wafer of claim 115 or 116, wherein the second means is a test unit that comprises an etalon having a higher density of posts supporting a mechanical membrane than in the interferometric modulators.

118. A test unit produced by a process comprising: forming a partial mirror; forming a mechanical membrane; and forming a plurality of posts supporting the mechanical membrane and separating the mechanical membrane from the partial mirror, wherein the density of posts is high enough such that the mechanical membrane cannot collapse toward the partial mirror when a voltage is applied between the partial mirror and the mechanical membrane.

119. A method of monitoring deposition of material deposited during manufacturing of a micro-electro-mechanical system (MEMS), comprising: forming a test unit that consists of at least three layers of material deposited during the manufacturing, wherein the at least three layers of material is less than the number of layers deposited during manufacturing of the MEMS, wherein the at least three layers of material form an etalon; and detecting light reflected from the etalon, whereby information regarding properties of the at least three layers is obtained.

120. The method of claim 119, wherein forming the test unit comprises exposing the test unit to the same material deposition and patterning steps as used during the manufacturing.

121. The method of claim 119, further comprising determining an index of refraction of at least one of the materials from the detected light.

122. The method of claim 119, further comprising determining reflectivity of at least one of the materials from the detected light.

123. The method of claim 119, further comprising determining transmittance of at least one of the materials from the detected light.

124. The method of claim 119, further comprising determining the thickness of at least one of the materials from the detected light.

125. The method of claim 119, further comprising determining the depth of the etalon from the detected light.

126. The method of claim 1 19, wherein the detecting comprises measuring the reflected light with a photodetector.

127. The method of claim 119, wherein the detecting comprises measuring a spectrum of the reflected light with a spectrometer.

128. The method of claim 127, further comprising fitting the spectrum with a model of light reflected from an etalon.

129. The method of claim 119, wherein the detecting comprises measuring the reflected light with a colorimeter.

130. The method of claim 119, wherein detecting the reflected light comprises detecting reflectance from a side of the test unit where the at least three layers of material are deposited during formation of the test unit.

131. The method of claim 119, wherein detecting the reflected light comprises detecting reflectance from a side of the test unit opposite the side where the at least three layers of material are deposited during formation of the test unit.

132. A wafer, comprising: a plurality of interferometric modulators adapted for use in a display; and a non-modulating interferometer.

133. The wafer of claim 132, wherein the non-modulating interferometer comprises at least one layer of material that is substantially the same as a layer of material in the interferometric modulators.

134. The wafer of claim 132, wherein the non-modulating interferometer comprises at least three layers of material that together form an etalon.

135. The wafer of claim 134, wherein no substantial air gap exists between reflecting surfaces in the etalon.

136. A wafer, comprising: a plurality of first means for interferometrically displaying light in a display; and a second means for non-modulatingly and interferometrically reflecting light.

137. The wafer of claim 136, wherein the first means are interferometric modulators.

138. The wafer of claim 136 or 137, wherein the second means is a non- modulating interferometer.

139. A method of monitoring deposition of material deposited during manufacturing of a micro-electro-mechanical system (MEMS), comprising: forming a test unit comprising one or more layers of material deposited during the manufacturing, wherein the number of layers of material in the test unit is less than the number of layers deposited during manufacturing of the MEMS; and detecting the reflectance of the test unit, whereby the reflectance provides information regarding properties of the layers in the test unit.

140. The method of claim 139, wherein forming the test unit comprises applying an identical sequence of material deposition and patterning steps as used in the manufacturing of the MEMS.

141. The method of claim 139, wherein the final layer of material in the test unit is substantially reflective.

142. The method of claim 139, further comprising determining the reflectance of one of the layers in the test unit.

143. The method of claim 139, further comprising determining the transmittance of one of the layers in the test unit.

144. The method of claim 139, further comprising determining the thickness of one of the layers in the test unit.

145. The method of claim 139, wherein the detecting comprises measuring a spectrum of light reflected from the test unit.

146. The method of claim 139, wherein detecting the reflectance comprises detecting reflectance from a side of the test unit where the one or more layers of material are deposited during formation of the test unit.

147. The method of claim 139, wherein detecting the reflectance comprises detecting reflectance from a side of the test unit opposite the side where the one or more layers of material are deposited during formation of the test unit.

148. A wafer, comprising: a plurality of interferometric modulators adapted for use in a display, the interferometric modulators comprising a plurality of material layers; and a test unit comprising one or more of the material layers, wherein the test unit comprises less than all of the plurality of material layers.

149. The wafer of claim 148, wherein the test unit comprises an etalon.

150. The wafer of claim 148, wherein the final layer in the test unit is substantially reflective.

151. The wafer of claim 150, wherein layers other than the final layer in the test unit are substantially transparent.

152. A method of manufacturing a combined micro-electro-mechanical system (MEMS) and test unit structure, comprising: forming a MEMS structure, wherein forming the MEMS structure includes one or more material deposition and patterning steps; and simultaneously forming a test unit, wherein forming the test unit includes said one or more material deposition and patterning steps, wherein the test unit comprises less than all components present in the MEMS structure.

153. A combined micro-electro-mechanical system (MEMS) and test unit structure produced by the process of claim 152.

154. A wafer produced by a process, comprising: depositing and patterning a series of material layers on a substrate to form a MEMS structure; and simultaneously depositing and patterning a series of material layers on the substrate to form a test unit, wherein the test unit comprises less than all components present in the MEMS structure.

155. A method of measuring thicknesses of layers deposited during manufacture of a micro-electro-mechanical system (MEMS), comprising: forming a test unit that comprises two or more layers successively deposited on top of each other, wherein the layers are formed using a process that is used for forming those layers during manufacture of the MEMS, wherein the layers are patterned such that at least two steps are formed in a profile of the structure; and measuring the height of the steps by sweeping a profilometer across the structure.

156. The method of claim 155, wherein forming the test unit comprises applying an identical sequence of material deposition and patterning steps as used in the manufacturing of the MEMS.

157. The method of claim 155, wherein the profilometer is swept once across the structure.

158. The method of claim 155, wherein the MEMS is an interferometric modulator.

159. A test unit for measuring the thicknesses of a plurality of layers deposited during manufacturing of an interferonietric modulator, comprising the layers stacked on top of each other so as to form at least two steps in a profile of the test unit.

160. The test unit of claim 159, wherein steps in the test unit monotonically increase and then monotonically decrease from one side of the profile to the other.

161. The test unit of claim 159, comprising a plurality of sacrificial layers, said sacrificial layers determining the depth of gaps formed in the interferometric modulators.

162. The test unit of claim 159, comprising a sacrificial layer and a mechanical membrane, wherein the mechanical membrane is adapted to protect the sacrificial layer during a release etch process.

163. The test unit of claim 159, comprising a cut in at least one layer such that the cut forms a step down in the profile of the test unit.

164. The test unit of claim 159, wherein at least one step in the test unit consists of one or more dielectric layers.

165. The test unit of claim 159, wherein at least one step in the test unit consists of a mechanical membrane structure.

166. The test unit of claim 159, wherein the height of at least one step in the test unit is substantially determined by the thickness of a sacrificial layer.

167. The test unit of claim 159, wherein the height of at least one step in the test unit is substantially determined by the thickness of planar material.

168. A wafer, comprising: a plurality of reflective display elements adapted for use in a display, the reflective display elements comprising a plurality of material layers; and a test unit comprising the plurality of material layers stacked on top of each other so as to form at least two steps in a profile of the test unit.

169. A method of manufacturing a combined micro-electro-mechanical system (MEMS) and test unit structure, comprising: forming a MEMS structure, wherein forming the MEMS structure includes one or more material deposition and patterning steps, wherein the MEMS structure comprises a plurality of layers; and simultaneously forming a test unit, wherein forming the test unit includes said one or more material deposition and patterning steps, wherein the test unit comprises the plurality of layers so as to form at least two steps in a profile of the test unit.

170. A combined micro-electro-mechanical system (MEMS) and test unit structure produced by the process of claim 169.

171. A wafer, comprising: a plurality of reflective display elements adapted for use in a display; and a test unit adapted to measure the thickness of at least one material deposited during manufacture of said reflective display elements.

172. A wafer, comprising: a plurality of first means for reflecting light for use in a display; and second means for measuring thickness of at least one material deposited during manufacture of said first means.

173. The wafer of claim 172, wherein said first means comprises interferometric modulators.

174. The wafer of claim 172 or 173, wherein said second means comprises a test unit comprising a plurality of material layers stacked on top of each other so as to form at least two steps in a profile of the test unit.

175. A wafer produced by a process comprising: depositing and patterning a series of material layers on a substrate to form a MEMS structure; and simultaneously depositing and patterning the series of material layers on the substrate to form a test unit, wherein layers of material remaining in the test unit after the patterning form at least two steps in a profile of the test unit.

176. A method of testing a process used to manufacture a polychromatic interferometric modulator display, wherein different color interferometric modulators in the display are manufactured by forming different depth gaps between a partial reflector and a reflective mechanical membrane, wherein the depths of the gaps are determined by deposition of one or more sacrificial layers, wherein the depth of at least one gap is determined by deposition of a plurality of sacrificial layers, the method comprising: forming a test unit that comprises the one or more sacrificial layers, wherein at least one region of the test unit comprises the plurality of sacrificial layers deposited on top of each other; measuring a profile of the test unit; and determining a cumulative thickness of the plurality of sacrificial layers from the profile.

177. The method of claim 176, wherein forming the test unit comprises: sequentially depositing the plurality of sacrificial layers; and patterning each sacrificial layer after its deposition and before depositing another sacrificial layer so that regions of the test unit are formed where less than all of the plurality of sacrificial layers are present.

178. The method of claim 176, wherein forming the test unit comprises depositing the mechanical membrane on top of the test unit so as to protect the sacrificial layers during an interferometric modulator release etch.

179. The method of claim 176, wherein measuring the profile of the test unit comprises: measuring the thickness of the test unit in a region comprising a single sacrificial layer; measuring the thickness of the test unit in a region comprising two sacrificial layers; and measuring the thickness of the test unit in a region comprising three sacrificial layers.

180. A test unit for use in testing a process used to manufacture a polychromatic interferometric modulator display, wherein different color interferometric modulators in the display are manufactured by forming different depth gaps between a partial reflector and a reflective mechanical membrane, wherein the depths of the gaps are determined by deposition of one or more sacrificial layers, wherein the depth of at least one gap is determined by deposition of a plurality of sacrificial layers, the test unit comprising a plurality of material layers on top of each other, wherein one region of the test unit includes a single sacrificial layer, a second region of the test unit includes two sacrificial layers on top of each other, and a third region of the test unit includes three sacrificial layers on top of each other.

181. The method of claim 180, wherein the test unit comprises the mechanical membrane deposited on the top of the test unit so as to protect the sacrificial layers during an interferometric modulator release etch.

182. The method of claim 180, wherein the test unit comprises planar material between regions comprising sacrificial layers.