WO2006017224A3 - Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package - Google Patents

Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package Download PDF

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Publication number
WO2006017224A3
WO2006017224A3 PCT/US2005/024538 US2005024538W WO2006017224A3 WO 2006017224 A3 WO2006017224 A3 WO 2006017224A3 US 2005024538 W US2005024538 W US 2005024538W WO 2006017224 A3 WO2006017224 A3 WO 2006017224A3
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WO
WIPO (PCT)
Prior art keywords
die
spacer
package
grid array
attach region
Prior art date
Application number
PCT/US2005/024538
Other languages
French (fr)
Other versions
WO2006017224A2 (en
Inventor
Marcos Karnezos
Flynn Carson
Youngcheol Kim
Original Assignee
Chippac Inc
Marcos Karnezos
Flynn Carson
Youngcheol Kim
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chippac Inc, Marcos Karnezos, Flynn Carson, Youngcheol Kim filed Critical Chippac Inc
Priority to KR1020077000112A priority Critical patent/KR100996318B1/en
Priority to JP2007521536A priority patent/JP5005534B2/en
Publication of WO2006017224A2 publication Critical patent/WO2006017224A2/en
Publication of WO2006017224A3 publication Critical patent/WO2006017224A3/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
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    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Abstract

A multipackage module has multiple die of various types and having various functions and, in some embodiments, the module includes a digital processor, an analog device, and memory. A first die, having a comparatively large footprint, is mounted onto first die attach region on a surface of a first package substrate. A second die, having a significantly smaller footprint, is mounted upon the surface of the first die, on a second die attach region toward one edge of the first die. The first die is electrically connected by wire bonds to conductive traces in the die-attach side of the substrate. The second die is electrically connected by wire bonds to the first package substrate, and may additionally be electrically connected by wire bonds to the first die. In some embodiments a spacer is mounted upon the first die, on a spacer attach region of the surface of the first die that is not within the die attach region, and which may be generally near a margin of the first die. A land grid array (LGA) package is inverted and mounted upon the spacer, with one margin of the LGA package near the edge of the spacer, so that much of the LGA package overhangs the second die. In other embodiments an additional spacer is mounted upon the first die, on a second spacer attach region that is not within the die attach region and not within the first spacer attach region, and the inverted LGA package is mounted upon both spacers. In still other embodiments a first spacer having a thickness approximating the thickness of the second die is mounted in a spacer attach region upon the first die; additional spacers are mounted upon both the first spacer and the second die, and the inverted LGA package is mounted upon the additional spacers. The LGA package is electrically connected to the first package substrate by wire bonds between bond sites on the LGA package and bond sites on the BGA package.
PCT/US2005/024538 2004-07-13 2005-07-11 Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package WO2006017224A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1020077000112A KR100996318B1 (en) 2004-07-13 2005-07-11 Semiconductor Multipackage Module Including Die and Inverted Land Grid Array Package Stacked Over Ball Grid Array Package
JP2007521536A JP5005534B2 (en) 2004-07-13 2005-07-11 Semiconductor multi-package module comprising a die and an inverted land grid array package stacked over a ball grid array package

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US58742804P 2004-07-13 2004-07-13
US60/587,428 2004-07-13
US11/022,375 US7253511B2 (en) 2004-07-13 2004-12-23 Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package
US11/022,375 2004-12-23

Publications (2)

Publication Number Publication Date
WO2006017224A2 WO2006017224A2 (en) 2006-02-16
WO2006017224A3 true WO2006017224A3 (en) 2006-08-10

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PCT/US2005/024538 WO2006017224A2 (en) 2004-07-13 2005-07-11 Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package

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US (3) US7253511B2 (en)
JP (1) JP5005534B2 (en)
KR (1) KR100996318B1 (en)
TW (1) TWI380431B (en)
WO (1) WO2006017224A2 (en)

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