WO2005110057A3 - Crystallographic alignment of high-density nanowire arrays - Google Patents

Crystallographic alignment of high-density nanowire arrays Download PDF

Info

Publication number
WO2005110057A3
WO2005110057A3 PCT/US2005/000568 US2005000568W WO2005110057A3 WO 2005110057 A3 WO2005110057 A3 WO 2005110057A3 US 2005000568 W US2005000568 W US 2005000568W WO 2005110057 A3 WO2005110057 A3 WO 2005110057A3
Authority
WO
WIPO (PCT)
Prior art keywords
nanowires
nanowire arrays
substrate
growth
crystallographic
Prior art date
Application number
PCT/US2005/000568
Other languages
French (fr)
Other versions
WO2005110057A2 (en
Inventor
Peidong Yang
Tevye Kuykendal
Peter Pauzauskie
Original Assignee
Univ California
Peidong Yang
Tevye Kuykendal
Peter Pauzauskie
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ California, Peidong Yang, Tevye Kuykendal, Peter Pauzauskie filed Critical Univ California
Publication of WO2005110057A2 publication Critical patent/WO2005110057A2/en
Publication of WO2005110057A3 publication Critical patent/WO2005110057A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02609—Crystal orientation
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02551—Group 12/16 materials
    • H01L21/02554—Oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02603—Nanowires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H01L21/02645—Seed materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02653—Vapour-liquid-solid growth

Abstract

A method for controlling the crystallographic growth direction and geometric and physical characteristics of nanowires using a metal-organic chemical vapor deposition and substrate selection. As an illustration of the method, epitaxial growth of wurtzite gallium nitride on (100) y -LiAIO2 and (111) MgO single crystal substrates resulted in the selective growth of nanowires in the orthogonal [110] and [001] directions, respectively. Triangular and hexagonal cross sections were observed as a result of substrate-induced constraints of lattice parameter matching and symmetry registry. These nanowire arrays exhibit a systematic difference in their temperature­ dependent band-edge emission resulting from the different size, shape, and anisotropic polarity of the nanostructures. Scaling of the synthetic process is entirely compatible with existing GaN thin-film technology and should enable the realization of a new generation of GaN nanowire devices and systems.
PCT/US2005/000568 2004-01-06 2005-01-06 Crystallographic alignment of high-density nanowire arrays WO2005110057A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US53475904P 2004-01-06 2004-01-06
US60/534,759 2004-01-06

Publications (2)

Publication Number Publication Date
WO2005110057A2 WO2005110057A2 (en) 2005-11-24
WO2005110057A3 true WO2005110057A3 (en) 2006-04-27

Family

ID=35394616

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/000568 WO2005110057A2 (en) 2004-01-06 2005-01-06 Crystallographic alignment of high-density nanowire arrays

Country Status (1)

Country Link
WO (1) WO2005110057A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006110163A2 (en) * 2004-08-20 2006-10-19 Yale University Epitaxial growth of aligned algainn nanowires by metal-organic chemical vapor deposition
CN103572312B (en) * 2012-08-07 2017-02-08 中国科学院大连化学物理研究所 Method for preparing self-sustained silicon nanowire array
CN112563881B (en) * 2020-11-27 2022-02-11 东南大学 Plasmon laser based on ZnO/Al core-shell nanowire and preparation method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5831277A (en) * 1997-03-19 1998-11-03 Northwestern University III-nitride superlattice structures
US20020130311A1 (en) * 2000-08-22 2002-09-19 Lieber Charles M. Doped elongated semiconductors, growing such semiconductors, devices including such semiconductors and fabricating such devices
US20020175408A1 (en) * 2001-03-30 2002-11-28 The Regents Of The University Of California Methods of fabricating nanostructures and nanowires and devices fabricated therefrom
KR20030060619A (en) * 2002-01-10 2003-07-16 학교법인 포항공과대학교 A process for preparing a zinc oxide nanowire by metal organic chemical vapor deposition and a nanowire prepared therefrom

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5831277A (en) * 1997-03-19 1998-11-03 Northwestern University III-nitride superlattice structures
US20020130311A1 (en) * 2000-08-22 2002-09-19 Lieber Charles M. Doped elongated semiconductors, growing such semiconductors, devices including such semiconductors and fabricating such devices
US20020175408A1 (en) * 2001-03-30 2002-11-28 The Regents Of The University Of California Methods of fabricating nanostructures and nanowires and devices fabricated therefrom
KR20030060619A (en) * 2002-01-10 2003-07-16 학교법인 포항공과대학교 A process for preparing a zinc oxide nanowire by metal organic chemical vapor deposition and a nanowire prepared therefrom

Also Published As

Publication number Publication date
WO2005110057A2 (en) 2005-11-24

Similar Documents

Publication Publication Date Title
US9362113B2 (en) Engineered substrates for semiconductor epitaxy and methods of fabricating the same
AU2015213350B2 (en) Nanowire epitaxy on a graphitic substrate
US10435812B2 (en) Heterogeneous material integration through guided lateral growth
US20040224484A1 (en) Methods of growing nitride-based film using varying pulses
WO2012067687A3 (en) Nanoscale emitters with polarization grading
WO2006110163A3 (en) Epitaxial growth of aligned algainn nanowires by metal-organic chemical vapor deposition
WO2007136412A3 (en) Methods for oriented growth of nanowires on patterned substrates
EP1630878A3 (en) GaN semiconductor substrate and semiconductor device manufactured by epitaxial growth on the GaN semiconductor substrate
CN103262211A (en) Method for manufacturing a group iii nitride substrate using a chemical lift-ff process
WO2009035095A1 (en) EPITAXIAL SiC SINGLE CRYSTAL SUBSTRATE AND METHOD FOR MANUFACTURING EPITAXIAL SiC SINGLE CRYSTAL SUBSTRATE
GR1008013B (en) Method for heteroepitaxial growth of iii metal-face polarity iii-nitrides on diamond substrates
Ikejiri et al. GaAs nanowire growth on polycrystalline silicon thin films using selective-area MOVPE
CN206558530U (en) A kind of deep ultraviolet LED chip
TW200603445A (en) Gallium nitride-based semiconductor stacked structure, production method thereof, and compound semiconductor and light-emitting device each using the stacked structure
CN105793958A (en) Gan on si(100)substrate using epi-twist
KR20180095608A (en) Fabrication method of composite GaN nanocolumn and light emitting structure fabricated by the method
TW200631079A (en) Growth process of a crystalline gallium nitride based compound and semiconductor device including gallium nitride based compound
Hong et al. Position‐Controlled Selective Growth of ZnO Nanorods on Si Substrates Using Facet‐Controlled GaN Micropatterns
WO2005110057A3 (en) Crystallographic alignment of high-density nanowire arrays
Yu et al. Low-temperature and global epitaxy of GaN on amorphous glass substrates by molecular beam epitaxy via a compound buffer layer
Lin et al. Epitaxy of m-plane GaN on nanoscale patterned c-plane sapphire substrates
CN105405745A (en) Preparation method for vertical III-V family antimonide semiconductor monocrystalline thin film
Wu et al. Study of the morphology evolution of AlN grown on nano-patterned sapphire substrate
KR102068322B1 (en) Epitaxy structure using graphene sacrificial layer and method for manufacturing the same
Zeghouane et al. Formation of voids in selective area growth of InN nanorods in SiNx on GaN templates

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

NENP Non-entry into the national phase

Ref country code: DE

WWW Wipo information: withdrawn in national office

Country of ref document: DE

122 Ep: pct application non-entry in european phase