WO2005050699A3 - Method of forming a semiconductor package and structure thereof - Google Patents

Method of forming a semiconductor package and structure thereof Download PDF

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Publication number
WO2005050699A3
WO2005050699A3 PCT/US2004/029845 US2004029845W WO2005050699A3 WO 2005050699 A3 WO2005050699 A3 WO 2005050699A3 US 2004029845 W US2004029845 W US 2004029845W WO 2005050699 A3 WO2005050699 A3 WO 2005050699A3
Authority
WO
WIPO (PCT)
Prior art keywords
conductive layer
wire bond
forming
mold
electrically coupled
Prior art date
Application number
PCT/US2004/029845
Other languages
French (fr)
Other versions
WO2005050699A2 (en
Inventor
Dave S Mahadevan
Michael E Chapman
Arvind S Salian
Original Assignee
Freescale Semiconductor Inc
Dave S Mahadevan
Michael E Chapman
Arvind S Salian
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc, Dave S Mahadevan, Michael E Chapman, Arvind S Salian filed Critical Freescale Semiconductor Inc
Priority to EP04817765A priority Critical patent/EP1668699A2/en
Priority to JP2006528047A priority patent/JP4608494B2/en
Publication of WO2005050699A2 publication Critical patent/WO2005050699A2/en
Publication of WO2005050699A3 publication Critical patent/WO2005050699A3/en
Priority to KR1020067005846A priority patent/KR101076972B1/en

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    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
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    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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Abstract

An electromagnetic interference (EMI) and/or electromagnetic radiation shield is formed by forming a conductive layer (42, 64) over a mold encapsulant (35, 62). The conductive layer (42, 64) may be electrically coupled using a wire to the leadframe (10, 52) of the semiconductor package (2, 50). The electrical coupling can be performed by wire bonding two device portions (2, 4, 6, 8) of a leadframe (10) together and then cutting the wire bond (32) by forming a groove (40) in the overlying mold encapsulant (35) to form two wires (33). The conductive layer (42) is then electrically coupled to each of the two wires (33). In another embodiment, a looped wire bond (61) is formed on top of a semiconductor die (57). After mold encapsulation, portions of the mold encapsulant (62) are removed to expose portions of the looped wire bond (61). The conductive layer (64) is then formed over the mold encapsulant (62) and the exposed portion of the looped wire bond (61) so that the conductive layer (64) is electrically coupled to the looped wire bond (61).
PCT/US2004/029845 2003-09-25 2004-09-14 Method of forming a semiconductor package and structure thereof WO2005050699A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP04817765A EP1668699A2 (en) 2003-09-25 2004-09-14 Method of forming a semiconductor package and structure thereof
JP2006528047A JP4608494B2 (en) 2003-09-25 2004-09-14 Method for forming semiconductor package and structure thereof
KR1020067005846A KR101076972B1 (en) 2003-09-25 2006-03-24 Method of forming a semiconductor package and structure thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/670,631 US7030469B2 (en) 2003-09-25 2003-09-25 Method of forming a semiconductor package and structure thereof
US10/670,631 2003-09-25

Publications (2)

Publication Number Publication Date
WO2005050699A2 WO2005050699A2 (en) 2005-06-02
WO2005050699A3 true WO2005050699A3 (en) 2005-12-22

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US (1) US7030469B2 (en)
EP (1) EP1668699A2 (en)
JP (1) JP4608494B2 (en)
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CN (1) CN100561732C (en)
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9520835B2 (en) 2012-06-14 2016-12-13 Skyworks Solutions, Inc. Power amplifier modules including bipolar transistor with grading and related systems, devices, and methods

Families Citing this family (216)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6930256B1 (en) 2002-05-01 2005-08-16 Amkor Technology, Inc. Integrated circuit substrate having laser-embedded conductive patterns and method therefor
US7633765B1 (en) 2004-03-23 2009-12-15 Amkor Technology, Inc. Semiconductor package including a top-surface metal layer for implementing circuit features
US9691635B1 (en) 2002-05-01 2017-06-27 Amkor Technology, Inc. Buildup dielectric layer having metallization pattern semiconductor package fabrication method
US7548430B1 (en) 2002-05-01 2009-06-16 Amkor Technology, Inc. Buildup dielectric and metallization process and semiconductor package
US20050146057A1 (en) * 2003-12-31 2005-07-07 Khor Ah L. Micro lead frame package having transparent encapsulant
US20080112151A1 (en) 2004-03-04 2008-05-15 Skyworks Solutions, Inc. Overmolded electronic module with an integrated electromagnetic shield using SMT shield wall components
US7198987B1 (en) * 2004-03-04 2007-04-03 Skyworks Solutions, Inc. Overmolded semiconductor package with an integrated EMI and RFI shield
US8399972B2 (en) * 2004-03-04 2013-03-19 Skyworks Solutions, Inc. Overmolded semiconductor package with a wirebond cage for EMI shielding
US11081370B2 (en) 2004-03-23 2021-08-03 Amkor Technology Singapore Holding Pte. Ltd. Methods of manufacturing an encapsulated semiconductor device
US10811277B2 (en) 2004-03-23 2020-10-20 Amkor Technology, Inc. Encapsulated semiconductor package
CN1755929B (en) * 2004-09-28 2010-08-18 飞思卡尔半导体(中国)有限公司 Method for forming semiconductor package and its structure
US7545662B2 (en) * 2005-03-25 2009-06-09 Taiwan Semiconductor Manufacturing Co., Ltd. Method and system for magnetic shielding in semiconductor integrated circuit
US7746656B2 (en) * 2005-05-16 2010-06-29 Stats Chippac Ltd. Offset integrated circuit package-on-package stacking system
US20060286706A1 (en) * 2005-06-21 2006-12-21 Salian Arvind S Method of making a substrate contact for a capped MEMS at the package level
US7316965B2 (en) * 2005-06-21 2008-01-08 Freescale Semiconductor, Inc. Substrate contact for a capped MEMS and method of making the substrate contact at the wafer level
US8434220B2 (en) * 2007-06-27 2013-05-07 Rf Micro Devices, Inc. Heat sink formed with conformal shield
US7451539B2 (en) * 2005-08-08 2008-11-18 Rf Micro Devices, Inc. Method of making a conformal electromagnetic interference shield
US8959762B2 (en) 2005-08-08 2015-02-24 Rf Micro Devices, Inc. Method of manufacturing an electronic module
US8062930B1 (en) 2005-08-08 2011-11-22 Rf Micro Devices, Inc. Sub-module conformal electromagnetic interference shield
US8053872B1 (en) 2007-06-25 2011-11-08 Rf Micro Devices, Inc. Integrated shield for a no-lead semiconductor device package
JP4914589B2 (en) 2005-08-26 2012-04-11 三菱電機株式会社 Semiconductor manufacturing apparatus, semiconductor manufacturing method, and semiconductor device
US7536909B2 (en) * 2006-01-20 2009-05-26 Memsic, Inc. Three-dimensional multi-chips and tri-axial sensors and methods of manufacturing the same
US7342303B1 (en) * 2006-02-28 2008-03-11 Amkor Technology, Inc. Semiconductor device having RF shielding and method therefor
US20080014678A1 (en) * 2006-07-14 2008-01-17 Texas Instruments Incorporated System and method of attenuating electromagnetic interference with a grounded top film
TWI302732B (en) * 2006-08-03 2008-11-01 Unimicron Technology Corp Embedded chip package process and circuit board with embedded chip
US8269319B2 (en) * 2006-10-13 2012-09-18 Tessera, Inc. Collective and synergistic MRAM shields
US7550857B1 (en) 2006-11-16 2009-06-23 Amkor Technology, Inc. Stacked redistribution layer (RDL) die assembly package
US7476563B2 (en) * 2006-11-17 2009-01-13 Freescale Semiconductor, Inc. Method of packaging a device using a dielectric layer
TW200824067A (en) * 2006-11-29 2008-06-01 Advanced Semiconductor Eng Stacked chip package structure and fabricating method thereof
WO2008093414A1 (en) * 2007-01-31 2008-08-07 Fujitsu Microelectronics Limited Semiconductor device and method for manufacturing the same
US7750465B2 (en) 2007-02-28 2010-07-06 Freescale Semiconductor, Inc. Packaged integrated circuit
US7869225B2 (en) * 2007-04-30 2011-01-11 Freescale Semiconductor, Inc. Shielding structures for signal paths in electronic devices
US8043892B2 (en) * 2007-05-02 2011-10-25 Samsung Electronics Co., Ltd. Semiconductor die package and integrated circuit package and fabricating method thereof
US7898066B1 (en) 2007-05-25 2011-03-01 Amkor Technology, Inc. Semiconductor device having EMI shielding and method therefor
US7576415B2 (en) 2007-06-15 2009-08-18 Advanced Semiconductor Engineering, Inc. EMI shielded semiconductor package
US7648858B2 (en) * 2007-06-19 2010-01-19 Freescale Semiconductor, Inc. Methods and apparatus for EMI shielding in multi-chip modules
US20080315376A1 (en) * 2007-06-19 2008-12-25 Jinbang Tang Conformal EMI shielding with enhanced reliability
US20090002967A1 (en) * 2007-06-29 2009-01-01 Tdk Corporation Electronic module and fabrication method thereof
US7745910B1 (en) 2007-07-10 2010-06-29 Amkor Technology, Inc. Semiconductor device having RF shielding and method therefor
DE102007035181B4 (en) * 2007-07-27 2011-11-10 Epcos Ag Method of making a module and module
US20090072357A1 (en) * 2007-09-13 2009-03-19 Jinbang Tang Integrated shielding process for precision high density module packaging
US7651889B2 (en) * 2007-09-13 2010-01-26 Freescale Semiconductor, Inc. Electromagnetic shield formation for integrated circuit die package
US8310069B2 (en) * 2007-10-05 2012-11-13 Texas Instruements Incorporated Semiconductor package having marking layer
US7902644B2 (en) * 2007-12-07 2011-03-08 Stats Chippac Ltd. Integrated circuit package system for electromagnetic isolation
US8178956B2 (en) * 2007-12-13 2012-05-15 Stats Chippac Ltd. Integrated circuit package system for shielding electromagnetic interference
TWI473240B (en) * 2007-12-20 2015-02-11 Freescale Semiconductor Inc Electromagnetic shield formation for integrated circuit die package
US7714419B2 (en) * 2007-12-27 2010-05-11 Stats Chippac Ltd. Integrated circuit package system with shielding
US8350367B2 (en) * 2008-02-05 2013-01-08 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US7989928B2 (en) * 2008-02-05 2011-08-02 Advanced Semiconductor Engineering Inc. Semiconductor device packages with electromagnetic interference shielding
US8212339B2 (en) 2008-02-05 2012-07-03 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8022511B2 (en) * 2008-02-05 2011-09-20 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8138024B2 (en) * 2008-02-26 2012-03-20 Stats Chippac Ltd. Package system for shielding semiconductor dies from electromagnetic interference
US20090243051A1 (en) * 2008-03-28 2009-10-01 Micron Technology, Inc. Integrated conductive shield for microelectronic device assemblies and associated methods
US20090243012A1 (en) * 2008-03-28 2009-10-01 Micron Technology, Inc. Electromagnetic interference shield structures for semiconductor components
US8008753B1 (en) 2008-04-22 2011-08-30 Amkor Technology, Inc. System and method to reduce shorting of radio frequency (RF) shielding
US9123663B2 (en) * 2008-06-10 2015-09-01 Stats Chippac, Ltd. Semiconductor device and method of forming shielding layer grounded through metal pillars formed in peripheral region of the semiconductor
JP2010010441A (en) * 2008-06-27 2010-01-14 Murata Mfg Co Ltd Circuit module and method of manufacturing the same
US7981730B2 (en) 2008-07-09 2011-07-19 Freescale Semiconductor, Inc. Integrated conformal shielding method and process using redistributed chip packaging
DE102008035255B4 (en) * 2008-07-29 2021-10-07 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Optoelectronic semiconductor component and method for producing an optoelectronic semiconductor component
US8373264B2 (en) 2008-07-31 2013-02-12 Skyworks Solutions, Inc. Semiconductor package with integrated interference shielding and method of manufacture thereof
CN102105981B (en) * 2008-07-31 2013-11-13 斯盖沃克斯解决方案公司 Semiconductor package with integrated interference shielding and method of manufacture therof
US8410584B2 (en) * 2008-08-08 2013-04-02 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US20100110656A1 (en) 2008-10-31 2010-05-06 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
US7915715B2 (en) * 2008-11-25 2011-03-29 Amkor Technology, Inc. System and method to provide RF shielding for a MEMS microphone package
US8129824B1 (en) 2008-12-03 2012-03-06 Amkor Technology, Inc. Shielding for a semiconductor package
US8102032B1 (en) 2008-12-09 2012-01-24 Amkor Technology, Inc. System and method for compartmental shielding of stacked packages
US8012868B1 (en) 2008-12-15 2011-09-06 Amkor Technology Inc Semiconductor device having EMI shielding and method therefor
US7851894B1 (en) 2008-12-23 2010-12-14 Amkor Technology, Inc. System and method for shielding of package on package (PoP) assemblies
US7900521B2 (en) * 2009-02-10 2011-03-08 Freescale Semiconductor, Inc. Exposed pad backside pressure sensor package
US20100207257A1 (en) * 2009-02-17 2010-08-19 Advanced Semiconductor Engineering, Inc. Semiconductor package and manufacturing method thereof
US8110902B2 (en) 2009-02-19 2012-02-07 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
US7960818B1 (en) 2009-03-04 2011-06-14 Amkor Technology, Inc. Conformal shield on punch QFN semiconductor package
US7960827B1 (en) 2009-04-09 2011-06-14 Amkor Technology, Inc. Thermal via heat spreader package and method
TW201041054A (en) * 2009-05-11 2010-11-16 Acsip Technology Corp Electronic component manufacturing method and packaging structure thereof
US8623753B1 (en) 2009-05-28 2014-01-07 Amkor Technology, Inc. Stackable protruding via package and method
US8222538B1 (en) 2009-06-12 2012-07-17 Amkor Technology, Inc. Stackable via package and method
US8212340B2 (en) 2009-07-13 2012-07-03 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
US8093691B1 (en) * 2009-07-14 2012-01-10 Amkor Technology, Inc. System and method for RF shielding of a semiconductor package
US20110012035A1 (en) * 2009-07-15 2011-01-20 Texas Instruments Incorporated Method for Precision Symbolization Using Digital Micromirror Device Technology
US8471154B1 (en) 2009-08-06 2013-06-25 Amkor Technology, Inc. Stackable variable height via package and method
US8362598B2 (en) * 2009-08-26 2013-01-29 Amkor Technology Inc Semiconductor device with electromagnetic interference shielding
US8796561B1 (en) 2009-10-05 2014-08-05 Amkor Technology, Inc. Fan out build up substrate stackable package and method
JP5448727B2 (en) * 2009-11-05 2014-03-19 ルネサスエレクトロニクス株式会社 Semiconductor device and manufacturing method thereof
US8501539B2 (en) * 2009-11-12 2013-08-06 Freescale Semiconductor, Inc. Semiconductor device package
US8378466B2 (en) * 2009-11-19 2013-02-19 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with electromagnetic interference shielding
US8030750B2 (en) * 2009-11-19 2011-10-04 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8368185B2 (en) * 2009-11-19 2013-02-05 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8937381B1 (en) 2009-12-03 2015-01-20 Amkor Technology, Inc. Thin stackable package and method
US9691734B1 (en) 2009-12-07 2017-06-27 Amkor Technology, Inc. Method of forming a plurality of electronic component packages
US8987830B2 (en) * 2010-01-12 2015-03-24 Marvell World Trade Ltd. Attaching passive components to a semiconductor package
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof
TWI489610B (en) 2010-01-18 2015-06-21 矽品精密工業股份有限公司 Method for making emi shielding package structure
US8536462B1 (en) 2010-01-22 2013-09-17 Amkor Technology, Inc. Flex circuit package and method
TWI404187B (en) * 2010-02-12 2013-08-01 矽品精密工業股份有限公司 Quad flat non leaded package structure capable of preventing electromagnetic interference and method for forming the same
US8199518B1 (en) 2010-02-18 2012-06-12 Amkor Technology, Inc. Top feature package and method
TWI411075B (en) 2010-03-22 2013-10-01 Advanced Semiconductor Eng Semiconductor package and manufacturing method thereof
US8946886B1 (en) 2010-05-13 2015-02-03 Amkor Technology, Inc. Shielded electronic component package and method
US8300423B1 (en) 2010-05-25 2012-10-30 Amkor Technology, Inc. Stackable treated via package and method
US8294276B1 (en) 2010-05-27 2012-10-23 Amkor Technology, Inc. Semiconductor device and fabricating method thereof
US8508023B1 (en) 2010-06-17 2013-08-13 Amkor Technology, Inc. System and method for lowering contact resistance of the radio frequency (RF) shield to ground
CN102339763B (en) 2010-07-21 2016-01-27 飞思卡尔半导体公司 The method of assembling integrated circuit (IC)-components
JPWO2012011210A1 (en) * 2010-07-22 2013-09-09 パナソニック株式会社 Semiconductor device and manufacturing method thereof
US8338229B1 (en) 2010-07-30 2012-12-25 Amkor Technology, Inc. Stackable plasma cleaned via package and method
TWI540698B (en) 2010-08-02 2016-07-01 日月光半導體製造股份有限公司 Semiconductor package and manufacturing method thereof
US8717775B1 (en) 2010-08-02 2014-05-06 Amkor Technology, Inc. Fingerprint sensor package and method
JP5636497B2 (en) 2010-08-05 2014-12-03 エプコス アーゲーEpcos Ag Method for manufacturing electronic device assembly having electromagnetic shield and heat radiation portion, and electronic device having electromagnetic shield and heat radiation portion
DE102010033551A1 (en) * 2010-08-05 2012-02-09 Epcos Ag Method for producing a plurality of electromagnetic shielded electronic components and electromagnetic shielded electronic component
US9137934B2 (en) 2010-08-18 2015-09-15 Rf Micro Devices, Inc. Compartmentalized shielding of selected components
US9007273B2 (en) 2010-09-09 2015-04-14 Advances Semiconductor Engineering, Inc. Semiconductor package integrated with conformal shield and antenna
US8337657B1 (en) 2010-10-27 2012-12-25 Amkor Technology, Inc. Mechanical tape separation package and method
US8482134B1 (en) 2010-11-01 2013-07-09 Amkor Technology, Inc. Stackable package and method
US9748154B1 (en) 2010-11-04 2017-08-29 Amkor Technology, Inc. Wafer level fan out semiconductor device and manufacturing method thereof
US8525318B1 (en) 2010-11-10 2013-09-03 Amkor Technology, Inc. Semiconductor device and fabricating method thereof
US8415775B2 (en) 2010-11-23 2013-04-09 Honeywell International Inc. Magnetic shielding for multi-chip module packaging
US8084300B1 (en) 2010-11-24 2011-12-27 Unisem (Mauritius) Holdings Limited RF shielding for a singulated laminate semiconductor device package
US8557629B1 (en) 2010-12-03 2013-10-15 Amkor Technology, Inc. Semiconductor device having overlapped via apertures
US8535961B1 (en) 2010-12-09 2013-09-17 Amkor Technology, Inc. Light emitting diode (LED) package and method
CN102543961B (en) * 2010-12-09 2014-08-13 矽品精密工业股份有限公司 Package for preventing electrostatic damage and electromagnetic wave interference and preparation method for package
US9406658B2 (en) 2010-12-17 2016-08-02 Advanced Semiconductor Engineering, Inc. Embedded component device and manufacturing methods thereof
US9721872B1 (en) 2011-02-18 2017-08-01 Amkor Technology, Inc. Methods and structures for increasing the allowable die size in TMV packages
US8466539B2 (en) 2011-02-23 2013-06-18 Freescale Semiconductor Inc. MRAM device and method of assembling same
US8835226B2 (en) 2011-02-25 2014-09-16 Rf Micro Devices, Inc. Connection using conductive vias
US9627230B2 (en) 2011-02-28 2017-04-18 Qorvo Us, Inc. Methods of forming a microshield on standard QFN package
US9013011B1 (en) 2011-03-11 2015-04-21 Amkor Technology, Inc. Stacked and staggered die MEMS package and method
US8969136B2 (en) 2011-03-25 2015-03-03 Stats Chippac Ltd. Integrated circuit packaging system for electromagnetic interference shielding and method of manufacture thereof
TW201240058A (en) * 2011-03-28 2012-10-01 Universal Scient Ind Shanghai Electromagnetic interference shielding structure for integrated circuit substrate and method for fabricating the same
KR101140113B1 (en) 2011-04-26 2012-04-30 앰코 테크놀로지 코리아 주식회사 Semiconductor device
US8966747B2 (en) 2011-05-11 2015-03-03 Vlt, Inc. Method of forming an electrical contact
US9402319B2 (en) 2011-05-11 2016-07-26 Vlt, Inc. Panel-molded electronic assemblies
US9071335B2 (en) 2011-07-08 2015-06-30 Skyworks Solutions, Inc. Radio-frequency modules having tuned shielding-wirebonds
US9142502B2 (en) 2011-08-31 2015-09-22 Zhiwei Gong Semiconductor device packaging having pre-encapsulation through via formation using drop-in signal conduits
US8916421B2 (en) 2011-08-31 2014-12-23 Freescale Semiconductor, Inc. Semiconductor device packaging having pre-encapsulation through via formation using lead frames with attached signal conduits
US8653674B1 (en) 2011-09-15 2014-02-18 Amkor Technology, Inc. Electronic component package fabrication method and structure
US8633598B1 (en) 2011-09-20 2014-01-21 Amkor Technology, Inc. Underfill contacting stacking balls package fabrication method and structure
US9029962B1 (en) 2011-10-12 2015-05-12 Amkor Technology, Inc. Molded cavity substrate MEMS package fabrication method and structure
US8597983B2 (en) 2011-11-18 2013-12-03 Freescale Semiconductor, Inc. Semiconductor device packaging having substrate with pre-encapsulation through via formation
US8541883B2 (en) 2011-11-29 2013-09-24 Advanced Semiconductor Engineering, Inc. Semiconductor device having shielded conductive vias
US9153543B1 (en) * 2012-01-23 2015-10-06 Amkor Technology, Inc. Shielding technique for semiconductor package including metal lid and metalized contact area
US9362209B1 (en) 2012-01-23 2016-06-07 Amkor Technology, Inc. Shielding technique for semiconductor package including metal lid
US8937376B2 (en) 2012-04-16 2015-01-20 Advanced Semiconductor Engineering, Inc. Semiconductor packages with heat dissipation structures and related methods
US8786060B2 (en) 2012-05-04 2014-07-22 Advanced Semiconductor Engineering, Inc. Semiconductor package integrated with conformal shield and antenna
US8704341B2 (en) 2012-05-15 2014-04-22 Advanced Semiconductor Engineering, Inc. Semiconductor packages with thermal dissipation structures and EMI shielding
US8633575B1 (en) * 2012-05-24 2014-01-21 Amkor Technology, Inc. IC package with integrated electrostatic discharge protection
US8948712B2 (en) 2012-05-31 2015-02-03 Skyworks Solutions, Inc. Via density and placement in radio frequency shielding applications
US8653634B2 (en) 2012-06-11 2014-02-18 Advanced Semiconductor Engineering, Inc. EMI-shielded semiconductor devices and methods of making
US8841758B2 (en) 2012-06-29 2014-09-23 Freescale Semiconductor, Inc. Semiconductor device package and method of manufacture
WO2014011808A1 (en) 2012-07-13 2014-01-16 Skyworks Solutions, Inc. Racetrack design in radio frequency shielding applications
US9153542B2 (en) 2012-08-01 2015-10-06 Advanced Semiconductor Engineering, Inc. Semiconductor package having an antenna and manufacturing method thereof
US9070669B2 (en) * 2012-11-09 2015-06-30 Freescale Semiconductor, Inc. Wettable lead ends on a flat-pack no-lead microelectronic package
US9799592B2 (en) 2013-11-19 2017-10-24 Amkor Technology, Inc. Semicondutor device with through-silicon via-less deep wells
KR101366461B1 (en) 2012-11-20 2014-02-26 앰코 테크놀로지 코리아 주식회사 Semiconductor device and manufacturing method thereof
US9401338B2 (en) 2012-11-29 2016-07-26 Freescale Semiconductor, Inc. Electronic devices with embedded die interconnect structures, and methods of manufacture thereof
US8952504B2 (en) * 2013-02-08 2015-02-10 Qualcomm Incorporated Small form factor magnetic shield for magnetorestrictive random access memory (MRAM)
US9653405B2 (en) 2013-02-20 2017-05-16 Infineon Technologies Ag Chip arrangement and a method of manufacturing a chip arrangement
US9978688B2 (en) 2013-02-28 2018-05-22 Advanced Semiconductor Engineering, Inc. Semiconductor package having a waveguide antenna and manufacturing method thereof
US9837701B2 (en) 2013-03-04 2017-12-05 Advanced Semiconductor Engineering, Inc. Semiconductor package including antenna substrate and manufacturing method thereof
US9129954B2 (en) 2013-03-07 2015-09-08 Advanced Semiconductor Engineering, Inc. Semiconductor package including antenna layer and manufacturing method thereof
US9172131B2 (en) 2013-03-15 2015-10-27 Advanced Semiconductor Engineering, Inc. Semiconductor structure having aperture antenna
US9076783B2 (en) 2013-03-22 2015-07-07 Freescale Semiconductor, Inc. Methods and systems for selectively forming metal layers on lead frames after die attachment
KR101488590B1 (en) 2013-03-29 2015-01-30 앰코 테크놀로지 코리아 주식회사 Semiconductor device and manufacturing method thereof
US9807890B2 (en) 2013-05-31 2017-10-31 Qorvo Us, Inc. Electronic modules having grounded electromagnetic shields
CN103400825B (en) 2013-07-31 2016-05-18 日月光半导体制造股份有限公司 Semiconductor package part and manufacture method thereof
US9070657B2 (en) 2013-10-08 2015-06-30 Freescale Semiconductor, Inc. Heat conductive substrate for integrated circuit package
KR102172786B1 (en) * 2013-11-01 2020-11-02 에스케이하이닉스 주식회사 Semiconductor package and method for fabricating the same
KR101607981B1 (en) 2013-11-04 2016-03-31 앰코 테크놀로지 코리아 주식회사 Interposer and method for manufacturing the same, and semiconductor package using the same
US9362234B2 (en) 2014-01-07 2016-06-07 Freescale Semiconductor, Inc. Shielded device packages having antennas and related fabrication methods
KR20160000953A (en) 2014-06-25 2016-01-06 삼성전자주식회사 Substrate and a method of manufacturing semiconductor packages
US10729001B2 (en) 2014-08-31 2020-07-28 Skyworks Solutions, Inc. Devices and methods related to metallization of ceramic substrates for shielding applications
JP6239147B2 (en) * 2014-12-09 2017-11-29 三菱電機株式会社 Semiconductor package
US9673150B2 (en) * 2014-12-16 2017-06-06 Nxp Usa, Inc. EMI/RFI shielding for semiconductor device packages
US9818712B2 (en) * 2015-01-14 2017-11-14 Nxp Usa, Inc. Package with low stress region for an electronic component
US9936580B1 (en) 2015-01-14 2018-04-03 Vlt, Inc. Method of forming an electrical connection to an electronic module
CN105990317A (en) * 2015-02-25 2016-10-05 晟碟信息科技(上海)有限公司 Device with electromagnetic interference shield layer and semiconductor and manufacture method thereof
KR102377472B1 (en) 2015-03-10 2022-03-23 삼성전자주식회사 Semiconductor packages and methods for fabricating the same
KR102354370B1 (en) 2015-04-29 2022-01-21 삼성전자주식회사 Magneto-resistive chip package including a shielding structure
US10264664B1 (en) 2015-06-04 2019-04-16 Vlt, Inc. Method of electrically interconnecting circuit assemblies
JP6149072B2 (en) * 2015-07-07 2017-06-14 アオイ電子株式会社 Semiconductor device and manufacturing method thereof
US10134682B2 (en) * 2015-10-22 2018-11-20 Avago Technologies International Sales Pte. Limited Circuit package with segmented external shield to provide internal shielding between electronic components
US20170118877A1 (en) * 2015-10-22 2017-04-27 Avago Technologies General Ip (Singapore) Pte. Ltd. Circuit package with bond wires to provide internal shielding between electronic components
US10163808B2 (en) * 2015-10-22 2018-12-25 Avago Technologies International Sales Pte. Limited Module with embedded side shield structures and method of fabricating the same
US10141268B2 (en) * 2015-10-30 2018-11-27 Avago Technologies International Sales Pte. Limited Circuit package with internal and external shielding
CN205542769U (en) * 2015-11-30 2016-08-31 奥特斯(中国)有限公司 Electronic device and electronic apparatus
CN105489593B (en) * 2015-12-24 2018-08-03 合肥矽迈微电子科技有限公司 It is electromagnetically shielded package assembling and its manufacturing method
US9824979B2 (en) * 2015-12-29 2017-11-21 Stmicroelectronics, Inc. Electronic package having electromagnetic interference shielding and associated method
KR20170079381A (en) 2015-12-30 2017-07-10 에스케이하이닉스 주식회사 Semiconductor package and method for manufacturing the same
KR101815754B1 (en) 2016-03-10 2018-01-08 앰코 테크놀로지 코리아 주식회사 Semiconductor device
US10903734B1 (en) 2016-04-05 2021-01-26 Vicor Corporation Delivering power to semiconductor loads
US10785871B1 (en) 2018-12-12 2020-09-22 Vlt, Inc. Panel molded electronic assemblies with integral terminals
US11336167B1 (en) 2016-04-05 2022-05-17 Vicor Corporation Delivering power to semiconductor loads
US10158357B1 (en) 2016-04-05 2018-12-18 Vlt, Inc. Method and apparatus for delivering power to semiconductors
JP6683542B2 (en) * 2016-06-11 2020-04-22 新日本無線株式会社 Method of manufacturing semiconductor device having electromagnetic shield
JP6597499B2 (en) 2016-06-29 2019-10-30 三菱電機株式会社 Semiconductor device and manufacturing method thereof
EP3494592A4 (en) * 2016-08-03 2020-11-11 Soliduv, Inc. Strain-tolerant die attach with improved thermal conductivity, and method of fabrication
US9960328B2 (en) 2016-09-06 2018-05-01 Amkor Technology, Inc. Semiconductor device and manufacturing method thereof
JP6832666B2 (en) * 2016-09-30 2021-02-24 株式会社ディスコ Manufacturing method of semiconductor package
JP6800745B2 (en) * 2016-12-28 2020-12-16 株式会社ディスコ Semiconductor package manufacturing method
WO2018164159A1 (en) * 2017-03-08 2018-09-13 株式会社村田製作所 Module
US10177095B2 (en) 2017-03-24 2019-01-08 Amkor Technology, Inc. Semiconductor device and method of manufacturing thereof
US10497650B2 (en) 2017-04-13 2019-12-03 Amkor Technology, Inc. Semiconductor device and manufacturing method thereof
US9818656B1 (en) 2017-05-23 2017-11-14 Nxp Usa, Inc. Devices and methods for testing integrated circuit devices
US20180374798A1 (en) 2017-06-24 2018-12-27 Amkor Technology, Inc. Semiconductor device having emi shielding structure and related methods
US10312198B2 (en) * 2017-10-20 2019-06-04 Advanced Semiconductor Engineering, Inc. Semiconductor device package
US20190206827A1 (en) * 2017-12-29 2019-07-04 Intel Corporation Semiconductor package with externally accessible wirebonds
US11287312B2 (en) * 2018-05-09 2022-03-29 Advanced Semiconductor Engineering, Inc. Optical system and method of manufacturing the same
US11127689B2 (en) 2018-06-01 2021-09-21 Qorvo Us, Inc. Segmented shielding using wirebonds
US11219144B2 (en) 2018-06-28 2022-01-04 Qorvo Us, Inc. Electromagnetic shields for sub-modules
US11114363B2 (en) 2018-12-20 2021-09-07 Qorvo Us, Inc. Electronic package arrangements and related methods
US10892229B2 (en) 2019-04-05 2021-01-12 Nxp Usa, Inc. Media shield with EMI capability for pressure sensor
US11515282B2 (en) 2019-05-21 2022-11-29 Qorvo Us, Inc. Electromagnetic shields with bonding wires for sub-modules
US11342276B2 (en) 2019-05-24 2022-05-24 Amkor Technology Singapore Holding Pte. Ltd. Semiconductor device and method of manufacturing semiconductor device
JP7236326B2 (en) * 2019-05-30 2023-03-09 東洋紡株式会社 Electronic component sealing body and method for manufacturing electronic component sealing body
US11127645B2 (en) 2019-06-19 2021-09-21 Nxp Usa, Inc. Grounding lids in integrated circuit devices
US11901309B2 (en) * 2019-11-12 2024-02-13 Semiconductor Components Industries, Llc Semiconductor device package assemblies with direct leadframe attachment
TWI718801B (en) * 2019-12-06 2021-02-11 矽品精密工業股份有限公司 Electronic package manufacturing method
KR102208360B1 (en) * 2020-04-21 2021-01-28 엔트리움 주식회사 Semiconductor package and method for manufacturing the same
US20220139845A1 (en) * 2020-10-30 2022-05-05 Stmicroelectronics, Inc. Semiconductor package with electromagnetic shield

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5317107A (en) * 1992-09-24 1994-05-31 Motorola, Inc. Shielded stripline configuration semiconductor device and method for making the same

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4320438A (en) 1980-05-15 1982-03-16 Cts Corporation Multi-layer ceramic package
JPS63140698U (en) * 1987-03-05 1988-09-16
US5166772A (en) 1991-02-22 1992-11-24 Motorola, Inc. Transfer molded semiconductor device package with integral shield
DE69324630T2 (en) 1992-06-13 1999-10-21 Sanyo Electric Co Doping process, semiconductor device and process for its production
SG52770A1 (en) 1992-07-10 1998-09-28 Hoechst Celanese Corp Metal ion reduction in top anti-reflective coatings for photoresists
US5635754A (en) * 1994-04-01 1997-06-03 Space Electronics, Inc. Radiation shielding of integrated circuits and multi-chip modules in ceramic and metal packages
US5545912A (en) * 1994-10-27 1996-08-13 Motorola, Inc. Electronic device enclosure including a conductive cap and substrate
US5650659A (en) * 1995-08-04 1997-07-22 National Semiconductor Corporation Semiconductor component package assembly including an integral RF/EMI shield
US5679975A (en) * 1995-12-18 1997-10-21 Integrated Device Technology, Inc. Conductive encapsulating shield for an integrated circuit
US6011698A (en) 1996-11-12 2000-01-04 Delco Electronics Corp. Circuit protection from radio frequency energy
US6476486B1 (en) * 1997-10-30 2002-11-05 Agilent Technologies, Inc. Ball grid array package with supplemental electronic component
JP3436159B2 (en) * 1998-11-11 2003-08-11 松下電器産業株式会社 Method for manufacturing resin-encapsulated semiconductor device
US6507101B1 (en) 1999-03-26 2003-01-14 Hewlett-Packard Company Lossy RF shield for integrated circuits
US6414849B1 (en) 1999-10-29 2002-07-02 Stmicroelectronics, Inc. Low stress and low profile cavity down flip chip and wire bond BGA package
EP1146591A2 (en) * 2000-04-10 2001-10-17 Hitachi, Ltd. Electromagnetic wave absorber, method of manufacturing the same and appliance using the same
US6515870B1 (en) 2000-11-27 2003-02-04 Intel Corporation Package integrated faraday cage to reduce electromagnetic emissions from an integrated circuit
CN1402345A (en) * 2001-08-24 2003-03-12 神达电脑股份有限公司 Electromagnetic interference inverter circuit embedded in integrated circuit
JP3632960B2 (en) * 2001-11-27 2005-03-30 京セラ株式会社 Semiconductor device
JP2003249607A (en) * 2002-02-26 2003-09-05 Seiko Epson Corp Semiconductor device and manufacturing method therefor, circuit board and electronic device
JP4051326B2 (en) * 2003-08-26 2008-02-20 京セラ株式会社 Manufacturing method of electronic device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5317107A (en) * 1992-09-24 1994-05-31 Motorola, Inc. Shielded stripline configuration semiconductor device and method for making the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9520835B2 (en) 2012-06-14 2016-12-13 Skyworks Solutions, Inc. Power amplifier modules including bipolar transistor with grading and related systems, devices, and methods

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