WO2005048262A3 - Mram architecture with a flux closed data storage layer - Google Patents

Mram architecture with a flux closed data storage layer Download PDF

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Publication number
WO2005048262A3
WO2005048262A3 PCT/US2004/005874 US2004005874W WO2005048262A3 WO 2005048262 A3 WO2005048262 A3 WO 2005048262A3 US 2004005874 W US2004005874 W US 2004005874W WO 2005048262 A3 WO2005048262 A3 WO 2005048262A3
Authority
WO
WIPO (PCT)
Prior art keywords
data storage
storage layer
memory cells
magnetic
magnetic memory
Prior art date
Application number
PCT/US2004/005874
Other languages
French (fr)
Other versions
WO2005048262A2 (en
Inventor
David Tsang
Robert Paul Morris
Original Assignee
Applied Spintronics Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Spintronics Tech Inc filed Critical Applied Spintronics Tech Inc
Publication of WO2005048262A2 publication Critical patent/WO2005048262A2/en
Publication of WO2005048262A3 publication Critical patent/WO2005048262A3/en

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect

Abstract

A method and system for providing and using a magnetic memory are disclosed. The method and system` include providing a plurality of magnetic memory cells (11) and providing at least one magnetic write line (82) coupled with the plurality of magnetic memory cells (11). Each of the magnetic memory cells (11) includes a magnetic element (110) having a data storage layer (1103). The data storage layer stores data magnetically. The magnetic write lines are magnetostatically coupled with at least the data storage layer (1103) of the magnetic element (11) of the corresponding magnetic memory cells (11). Consequently, flux closure is substantially achieved for the data storage layer of each of the plurality of magnetic memory cells (11).
PCT/US2004/005874 2003-10-16 2004-02-27 Mram architecture with a flux closed data storage layer WO2005048262A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/688,664 2003-10-16
US10/688,664 US6909633B2 (en) 2002-12-09 2003-10-16 MRAM architecture with a flux closed data storage layer

Publications (2)

Publication Number Publication Date
WO2005048262A2 WO2005048262A2 (en) 2005-05-26
WO2005048262A3 true WO2005048262A3 (en) 2005-08-04

Family

ID=34590648

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/005874 WO2005048262A2 (en) 2003-10-16 2004-02-27 Mram architecture with a flux closed data storage layer

Country Status (2)

Country Link
US (1) US6909633B2 (en)
WO (1) WO2005048262A2 (en)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7020009B2 (en) * 2003-05-14 2006-03-28 Macronix International Co., Ltd. Bistable magnetic device using soft magnetic intermediary material
KR100560661B1 (en) * 2003-06-19 2006-03-16 삼성전자주식회사 Reading Scheme Of Magnetic Memory
FR2860910B1 (en) * 2003-10-10 2006-02-10 Commissariat Energie Atomique MAGNETIC TUNNEL JUNCTION DEVICE AND METHOD OF WRITING / READING SUCH A DEVICE
US7092284B2 (en) * 2004-08-20 2006-08-15 Infineon Technologies Ag MRAM with magnetic via for storage of information and field sensor
US7106531B2 (en) * 2005-01-13 2006-09-12 Hitachi Global Storage Technologies Netherlands, B.V. Method of forming a servo pattern on a rigid magnetic recording disk
KR100727486B1 (en) * 2005-08-16 2007-06-13 삼성전자주식회사 Magnetic memory devices and methods of forming the same
JP2007184419A (en) * 2006-01-06 2007-07-19 Sharp Corp Nonvolatile memory device
US7528457B2 (en) * 2006-04-14 2009-05-05 Magic Technologies, Inc. Method to form a nonmagnetic cap for the NiFe(free) MTJ stack to enhance dR/R
JP2009146478A (en) * 2007-12-12 2009-07-02 Sony Corp Storage device and information re-recording method
US20090218559A1 (en) * 2008-02-29 2009-09-03 Ulrich Klostermann Integrated Circuit, Memory Cell Array, Memory Module, and Method of Manufacturing an Integrated Circuit
US8659852B2 (en) 2008-04-21 2014-02-25 Seagate Technology Llc Write-once magentic junction memory array
US7855911B2 (en) * 2008-05-23 2010-12-21 Seagate Technology Llc Reconfigurable magnetic logic device using spin torque
US7852663B2 (en) * 2008-05-23 2010-12-14 Seagate Technology Llc Nonvolatile programmable logic gates and adders
US7881098B2 (en) 2008-08-26 2011-02-01 Seagate Technology Llc Memory with separate read and write paths
US7985994B2 (en) 2008-09-29 2011-07-26 Seagate Technology Llc Flux-closed STRAM with electronically reflective insulative spacer
US8169810B2 (en) 2008-10-08 2012-05-01 Seagate Technology Llc Magnetic memory with asymmetric energy barrier
US8039913B2 (en) * 2008-10-09 2011-10-18 Seagate Technology Llc Magnetic stack with laminated layer
US8089132B2 (en) 2008-10-09 2012-01-03 Seagate Technology Llc Magnetic memory with phonon glass electron crystal material
US20100102405A1 (en) * 2008-10-27 2010-04-29 Seagate Technology Llc St-ram employing a spin filter
US8045366B2 (en) 2008-11-05 2011-10-25 Seagate Technology Llc STRAM with composite free magnetic element
US8043732B2 (en) 2008-11-11 2011-10-25 Seagate Technology Llc Memory cell with radial barrier
US7826181B2 (en) * 2008-11-12 2010-11-02 Seagate Technology Llc Magnetic memory with porous non-conductive current confinement layer
US8289756B2 (en) 2008-11-25 2012-10-16 Seagate Technology Llc Non volatile memory including stabilizing structures
US7826259B2 (en) * 2009-01-29 2010-11-02 Seagate Technology Llc Staggered STRAM cell
US7999338B2 (en) 2009-07-13 2011-08-16 Seagate Technology Llc Magnetic stack having reference layers with orthogonal magnetization orientation directions
US8981506B1 (en) * 2010-10-08 2015-03-17 Avalanche Technology, Inc. Magnetic random access memory with switchable switching assist layer
KR20120056019A (en) * 2010-11-24 2012-06-01 삼성전자주식회사 Oscillator and methods of manufacturing and operating the same
SG185922A1 (en) * 2011-06-02 2012-12-28 Agency Science Tech & Res Magnetoresistive device
US9123884B2 (en) * 2011-09-22 2015-09-01 Agency For Science, Technology And Research Magnetoresistive device and a writing method for a magnetoresistive device
KR101683440B1 (en) * 2015-05-13 2016-12-07 고려대학교 산학협력단 Magnetic memory device
KR102463023B1 (en) * 2016-02-25 2022-11-03 삼성전자주식회사 Variable resistance memory devices and methods of manufacturing the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6269018B1 (en) * 2000-04-13 2001-07-31 International Business Machines Corporation Magnetic random access memory using current through MTJ write mechanism
US6351409B1 (en) * 2001-01-04 2002-02-26 Motorola, Inc. MRAM write apparatus and method
US6740947B1 (en) * 2002-11-13 2004-05-25 Hewlett-Packard Development Company, L.P. MRAM with asymmetric cladded conductor

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5659499A (en) 1995-11-24 1997-08-19 Motorola Magnetic memory and method therefor
US5650958A (en) 1996-03-18 1997-07-22 International Business Machines Corporation Magnetic tunnel junctions with controlled magnetic response
US5940319A (en) 1998-08-31 1999-08-17 Motorola, Inc. Magnetic random access memory and fabricating method thereof
US6153443A (en) 1998-12-21 2000-11-28 Motorola, Inc. Method of fabricating a magnetic random access memory
US6166948A (en) 1999-09-03 2000-12-26 International Business Machines Corporation Magnetic memory array with magnetic tunnel junction memory cells having flux-closed free layers
US6211090B1 (en) 2000-03-21 2001-04-03 Motorola, Inc. Method of fabricating flux concentrating layer for use with magnetoresistive random access memories
US6475812B2 (en) 2001-03-09 2002-11-05 Hewlett Packard Company Method for fabricating cladding layer in top conductor
US6724651B2 (en) * 2001-04-06 2004-04-20 Canon Kabushiki Kaisha Nonvolatile solid-state memory and method of driving the same
JP4033690B2 (en) * 2002-03-04 2008-01-16 株式会社ルネサステクノロジ Semiconductor device
JP3906145B2 (en) * 2002-11-22 2007-04-18 株式会社東芝 Magnetic random access memory
US6909630B2 (en) * 2002-12-09 2005-06-21 Applied Spintronics Technology, Inc. MRAM memories utilizing magnetic write lines
US6864551B2 (en) * 2003-02-05 2005-03-08 Applied Spintronics Technology, Inc. High density and high programming efficiency MRAM design
US6812538B2 (en) * 2003-02-05 2004-11-02 Applied Spintronics Technology, Inc. MRAM cells having magnetic write lines with a stable magnetic state at the end regions
US6940749B2 (en) * 2003-02-24 2005-09-06 Applied Spintronics Technology, Inc. MRAM array with segmented word and bit lines
JP3906172B2 (en) * 2003-03-11 2007-04-18 株式会社東芝 Magnetic random access memory and manufacturing method thereof
US6963500B2 (en) * 2003-03-14 2005-11-08 Applied Spintronics Technology, Inc. Magnetic tunneling junction cell array with shared reference layer for MRAM applications
US6933550B2 (en) * 2003-03-31 2005-08-23 Applied Spintronics Technology, Inc. Method and system for providing a magnetic memory having a wrapped write line
US7067866B2 (en) * 2003-03-31 2006-06-27 Applied Spintronics Technology, Inc. MRAM architecture and a method and system for fabricating MRAM memories utilizing the architecture

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6269018B1 (en) * 2000-04-13 2001-07-31 International Business Machines Corporation Magnetic random access memory using current through MTJ write mechanism
US6351409B1 (en) * 2001-01-04 2002-02-26 Motorola, Inc. MRAM write apparatus and method
US6740947B1 (en) * 2002-11-13 2004-05-25 Hewlett-Packard Development Company, L.P. MRAM with asymmetric cladded conductor

Also Published As

Publication number Publication date
US20040130929A1 (en) 2004-07-08
WO2005048262A2 (en) 2005-05-26
US6909633B2 (en) 2005-06-21

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