A Communications Network Test System
BACKGROUND OF THE INVENTION
THIS invention relates to a communications network test system, particularly to a remotely accessible Asynchronous Transfer Mode (ATM) network performance verification and test system.
There is a need to provide a large number of network maintenance personnel with ATM testing equipment. Ideally, the testing equipment is placed at a central location and remote access is provided to the maintenance personnel. Preferably, multiple users in the form of multiple maintenance personnel need to be able to set up and/or view multiple tests simultaneously and independently without influencing one anothers tests.
Preferably, each of the maintenance personnel should also be able to view each other's test results without disrupting or affecting each other's tests.
The present invention seeks to address this.
SUMMARY OF THE INVENTION
According to the present invention there is provided a communication network test system comprising: at least one user interface; a central server connectable to the at least one user interface for receiving instructions from the at least one user interface, the instructions being instructions to perform one or more tests on a communications network; and network testing apparatus connectable between the central server and the communications network to be tested, wherein the network test apparatus is responsive to instructions received from the central server to perform at least one test on the communications network, which instructions were received by the central server from the at least one user interface.
Preferably, the system includes a plurality of user interfaces connectable to the central server.
These interfaces may be in the form of computers with graphical user interface software operating thereon.
Preferably, the communication network is an Asynchronous Transfer Mode (ATM) network.
Furthermore, the network testing apparatus is able to calculate performance statistics when the at least one test is performed, which performance statistics are transmitted back to the at least one user interface.
The system may further include a plurality of central servers and a plurality of user interfaces.
Preferably, each of the user interfaces is able to connect to a plurality of central servers.
The network testing apparatus may be a Synchronous Digital Hierarchy interface card.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 is a schematic overview of the system of the present invention;
Figure 2 is a block diagram of part of the system illustrated in Figure 1 ;
Figure 3 is a block diagram of a server used in the system of Figure 1 ; and
Figure 4 is a block diagram of a network interface card.
DESCRIPTION OF AN EMBODIMENT
The invention provides distributed support for maintenance personnel to access and set-up tests on an Asynchronous Transfer Mode (ATM) Network 10. The architecture of the invention consists of mainly three components:
1. At least one user interface 12 in the form of a Graphical User Interface (GUI) with various access levels running on PCs.
2. A centralized server or centralized servers 14 connected to the at least one user interface 12 through a communication network 16. 3. Network testing apparatus 18 in the form of a Synchronous Digital Hierarchy (SDH) interface card/s installed in the centralized servers.
The invention provides a solution for setting up ATM-Layer tests on an ATM-Network. Network operators, support and high level support personnel are able to set-up various ATM tests using this system. The following industry standard equipment and techniques are incorporated to assess ATM Layer cell transfer performance: ITU-T O.191 , and various AAL (ATM Adaptation Layers).
The Graphical User Interface (GUI) is installed on the desktop computers, workstations or Laptop computers of the ATM support personnel. A connection is set-up to the selected regional server 14 through the connected communications network 16. When a user logs onto a server 14, he/she obtains access to network test apparatus in the form of several ATM Analysers and Generators that are incorporated on the SDH card 18. The card is a PCI bus interface hardware/card and will be described in more detail below. The Generator on the SDH card transmits ATM cells onto the ATM-Network after a test has been set-up by the user. Provided that the user has configured an ATM link to be tested, the cells transmitted will be received and analysed by the Analyser on the same card.
Referring to Figure 2, The graphical user interface (GUI) 12 authenticates to the servers 14 using a CORBA interface. The user uses the GUI to do various test configurations and test set-ups and to view test results. The results/statistics of these tests are then displayed and/or saved for further analysis by the user of the system.
The server 14 software is responsible for manipulating the statistics received from the SDH card 18, and present the information in a meaningful way to the user of the system. This will be described in more detail below.
The GUI is a platform independent application that allows users of the invention to:
1. connect and authenticate to multiple servers 2. manage user profiles and workspaces on the server 3. set-up and configure SDH card/s on the server 4. configure, set-up, execute and terminate tests on the server 5. view multiple test statistics simultaneously obtained from the server 6. save tests results to a file on the server 7. download tests results file from the server and save it to disk
Referring to Figure 3, this block diagram depicts the functional block diagram of the Server software and interfaces. The servers 14 have two interfaces, firstly a JUNGO driver interface 20 which interfaces with the PCI bus of the Server 14, and a CORBA Name Server interface 22 for interfacing to the Graphical User Interface (GUI) software.
The CORBA interface 22 provides a mechanism for interfacing the server software objects to the GUI software objects. The Multiple Access Management functional block 24 provides the management of multiple, simultaneous accesses to Server resources. It ensures that all the accesses to the Server resources are serviced timeously and efficiently.
The User Management functionality 26 provided by the server software enables restricted access to server resources by implementing a secure authentication process. User Management also implies the creation, deletion or modification of user profiles and workspace.
The Card Setup and Configuration functional block 28 is responsible for the up-loading of the actual firmware that will execute on the SDH Card. Different firmware implementations can be up-loaded by users depending on their test requirements.
The Test Setup and Configuration functional block 30 is responsible for the selection and configuration of tests that need to be performed by the SDH Card. Several independent tests can be configured to execute simultaneously within the same card, these tests can have different test settings and configurations.
Since multiple users can setup simultaneous tests, this implies that several views of the same or different test statistics need to be made available to any number of users at the same time. Multiple users can set up test simultaneously on the same server and simultaneously on different servers. The Statistics view Management functional block 32 provides this required functionality. Statistics can be made available to any number of users simultaneously as requested.
The Collection and Manipulation of statistics functional block 34 is responsible for obtaining the actual statistical results from the SDH Card when required. It then manipulates the information received from the SDH Card, and presents the information to the Statistics view Management functional block when requested.
The JAVA Native Interface provides a mechanism for interfacing the server software objects, which are Java objects, to native languages (like C or C++) objects of the JUNGO Interface.
The JUNGO Interface 20 also provides the mechanism for accessing the SDH Card configuration and output registers through the PCI bus of the server PC.
Refer to Figure 4, the block diagram is a functional block diagram of a SDH Card 18. The card 18 has two interfaces, namely a PCI interface 38 that interfaces with the server PC and an SDH interface 40 for interfacing to the ATM network.
Access to the PCI bus is controlled by a PCI bus controller that provides access to the configuration - and output registers 50 of the SDH Card 18. The configuration registers are mainly used to setup, select and configure ATM Cell generators 42, Pattern Generators 44, ATM Cell analyzers 46 and Pattern Analyzers 48. These registers 50 are also used to configure, setup, select and control bit-error injection rates, bit rates, AAL or O.191 test-type selection and Permanent Virtual Circuit (PVC) set-up.
The Pattern generators 44 are responsible for generating pre-defined Protocol Data Units (PDUs) that will be transmitted onto the ATM network via the ATM Cell Generators. Examples of such PDU patterns are:
1. 2 x User octets (The user defines two octets that will be repeated throughout the PDU) 2. Incremental data (The data increments from 0 to 255 throughout the PDU and repeats) 3. 2Λ15, 2Λ20, 2Λ23 or other random data patterns (standard random data generation algorithms) 4. User defined PDU (The user defines one entire ATM cell's payload that is repeated) 5. Any test pattern can be implemented.
Once a PDU type has been selected and generated, the ATM cell generators 42 construct complete ATM cells with header and trailer information based on the ATM adaptation layer (AAL) or Test (ITU-T O.191) selected by the user. The header information is obtained from the configuration registers 50. These registers provide the PVC information. The user can simulate error conditions by injecting bit-errors onto the ATM cell data payload. Completely generated ATM cells are then forwarded to the SDH interface 40 for transmission onto the ATM network. As the ATM cells are forwarded to the SDH interface 40 for transmission, both the number of cell and bit errors are counted for statistical purposes.
When the SDH interface 40 receives ATM cells, it determines if the cells received should be analyzed based on the PVC setup in the configuration registers. Valid ATM cells are then forwarded to the appropriate ATM cell analyzer for analysis. Based on the type of test conducted, AAL or O.191 type testing, several statistical results will be calculated and displayed. The Patten analyzers 48 are responsible for compiling payload statistics based on the ATM Cell payload that was received, these include: Cells received, bit errors detected, bit rate, bandwidth utilization, lost cells, mis-inserted cells, cell transfer delay, cell delay variation etc.
All the statistics that are calculated, be it ATM Cell Generator or ATM Cell Analyzer statistics, are stored in the Statistic generation registers 52. These registers can be accessed via the PCI bus interface controller and saved on the server PC for further analysis and use.