WO2005039261A3 - Solder structures for out of plane connections and related methods - Google Patents

Solder structures for out of plane connections and related methods Download PDF

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Publication number
WO2005039261A3
WO2005039261A3 PCT/US2004/033946 US2004033946W WO2005039261A3 WO 2005039261 A3 WO2005039261 A3 WO 2005039261A3 US 2004033946 W US2004033946 W US 2004033946W WO 2005039261 A3 WO2005039261 A3 WO 2005039261A3
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WO
WIPO (PCT)
Prior art keywords
die
solder
edge
wettable pad
related methods
Prior art date
Application number
PCT/US2004/033946
Other languages
French (fr)
Other versions
WO2005039261A2 (en
Inventor
Glenn A Rinne
Original Assignee
Unitive Int Ltd
Glenn A Rinne
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unitive Int Ltd, Glenn A Rinne filed Critical Unitive Int Ltd
Publication of WO2005039261A2 publication Critical patent/WO2005039261A2/en
Publication of WO2005039261A3 publication Critical patent/WO2005039261A3/en

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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
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    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01049—Indium [In]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01058—Cerium [Ce]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19042—Component type being an inductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/0465—Shape of solder, e.g. differing from spherical shape, different shapes due to different solder pads
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

Methods of forming a solder structure may include providing a wafer including a plurality of die therein, and a solder wettable pad may be formed on one of the die adjacent an edge of the die. The solder wettable pad may have a length parallel to the edge of the die and a width perpendicular to the edge of the die wherein the length parallel to the edge of the die is greater than the width perpendicular to the edge of the die. A solder bump may be plated on the solder wettable pad, and the die may be separated from the wafer along the edge of the die after plating the solder bump on the solder wettable pad. Moreover, the solder bump may be reflowed on the solder wettable pad so that the solder structure extends laterally from the solder wettable pad beyond the edge of the die after separating the die from the wafer. Related structures are also discussed.
PCT/US2004/033946 2003-10-14 2004-10-14 Solder structures for out of plane connections and related methods WO2005039261A2 (en)

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Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8330262B2 (en) 2010-02-02 2012-12-11 International Business Machines Corporation Processes for enhanced 3D integration and structures generated using the same
US20120106711A1 (en) * 2010-10-29 2012-05-03 General Electric Company X-ray tube with bonded target and bearing sleeve
TWI527174B (en) * 2010-11-19 2016-03-21 日月光半導體製造股份有限公司 Package having semiconductor device
CN102479765B (en) * 2010-11-24 2016-08-24 日月光半导体制造股份有限公司 There is the encapsulating structure of semiconductor subassembly
US9355978B2 (en) 2013-03-11 2016-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging devices and methods of manufacture thereof
US9461008B2 (en) 2012-08-16 2016-10-04 Qualcomm Incorporated Solder on trace technology for interconnect attachment
US8802556B2 (en) * 2012-11-14 2014-08-12 Qualcomm Incorporated Barrier layer on bump and non-wettable coating on trace
US9196529B2 (en) * 2013-09-27 2015-11-24 Taiwan Semiconductor Manufacturing Company, Ltd. Contact pad for semiconductor devices
US9466590B1 (en) * 2015-11-13 2016-10-11 International Business Machines Corporation Optimized solder pads for microelectronic components
US10103116B2 (en) * 2016-02-01 2018-10-16 Qualcomm Incorporated Open-passivation ball grid array pads
US10192841B2 (en) * 2017-01-03 2019-01-29 Nanya Technology Corporation Semiconductor package and method for preparing the same
CN107734226A (en) * 2017-10-24 2018-02-23 捷开通讯(深圳)有限公司 Filming apparatus and electronic equipment for electronic equipment
US10847478B2 (en) 2018-02-27 2020-11-24 Amkor Technology Singapore Holding Pte. Ltd. Method of forming an electronic device structure having an electronic component with an on-edge orientation and related structures

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0918355A2 (en) * 1997-11-24 1999-05-26 Delco Electronics Corporation Solder bump input/output pad for a surface mount circuit device
US5963793A (en) * 1996-05-29 1999-10-05 Mcnc Microelectronic packaging using arched solder columns
EP1041617A1 (en) * 1998-01-20 2000-10-04 Citizen Watch Co., Ltd. Semiconductor device and method of production thereof and semiconductor mounting structure and method
US6201305B1 (en) * 2000-06-09 2001-03-13 Amkor Technology, Inc. Making solder ball mounting pads on substrates
US20020020551A1 (en) * 1995-04-04 2002-02-21 Mcnc Controlled-shaped solder reservoirs for increasing the volume of solder bumps
US6404064B1 (en) * 2000-07-17 2002-06-11 Siliconware Precision Industries Co., Ltd. Flip-chip bonding structure on substrate for flip-chip package application
US20030102560A1 (en) * 2000-12-29 2003-06-05 Samsung Electronics Co., Ltd. Wafer level package and method for manufacturing the same

Family Cites Families (109)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3259814A (en) 1955-05-20 1966-07-05 Rca Corp Power semiconductor assembly including heat dispersing means
DE1182353C2 (en) 1961-03-29 1973-01-11 Siemens Ag Method for manufacturing a semiconductor component, such as a semiconductor current gate or a surface transistor, with a high-resistance n-zone between two p-zones in the semiconductor body
US3105869A (en) 1962-03-23 1963-10-01 Hughes Aircraft Co Electrical connection of microminiature circuit wafers
US3244947A (en) 1962-06-15 1966-04-05 Slater Electric Inc Semi-conductor diode and manufacture thereof
US3274458A (en) 1964-04-02 1966-09-20 Int Rectifier Corp Extremely high voltage silicon device
US3458925A (en) 1966-01-20 1969-08-05 Ibm Method of forming solder mounds on substrates
DE1614928A1 (en) 1966-07-19 1970-12-23 Solitron Devices Method for contacting semiconductor components
GB1134998A (en) 1967-04-04 1968-11-27 Marconi Co Ltd Improvements in or relating to insulated gate field effect transistors
US3461357A (en) 1967-09-15 1969-08-12 Ibm Multilevel terminal metallurgy for semiconductor devices
NL159822B (en) 1969-01-02 1979-03-15 Philips Nv SEMICONDUCTOR DEVICE.
GB1288564A (en) 1969-01-24 1972-09-13
US3871015A (en) 1969-08-14 1975-03-11 Ibm Flip chip module with non-uniform connector joints
US3871014A (en) 1969-08-14 1975-03-11 Ibm Flip chip module with non-uniform solder wettable areas on the substrate
US3663184A (en) 1970-01-23 1972-05-16 Fairchild Camera Instr Co Solder bump metallization system using a titanium-nickel barrier layer
DE2044494B2 (en) 1970-09-08 1972-01-13 Siemens AG, 1000 Berlin u 8000 München CONNECTING AREAS FOR SOLDERING SEMI-CONDUCTOR COMPONENTS IN FLIP CHIP TECHNOLOGY
US3760238A (en) 1972-02-28 1973-09-18 Microsystems Int Ltd Fabrication of beam leads
JPS49135749U (en) 1973-03-24 1974-11-21
US4113578A (en) 1973-05-31 1978-09-12 Honeywell Inc. Microcircuit device metallization
US3897871A (en) 1973-07-26 1975-08-05 Lilly Co Eli Print album storage case insert
US3959577A (en) 1974-06-10 1976-05-25 Westinghouse Electric Corporation Hermetic seals for insulating-casing structures
US4113587A (en) 1974-08-05 1978-09-12 Agency Of Industrial Science And Technology Method for electrochemical machining
US3986255A (en) * 1974-11-29 1976-10-19 Itek Corporation Process for electrically interconnecting chips with substrates employing gold alloy bumps and magnetic materials therein
US4074342A (en) 1974-12-20 1978-02-14 International Business Machines Corporation Electrical package for lsi devices and assembly process therefor
US3993123A (en) 1975-10-28 1976-11-23 International Business Machines Corporation Gas encapsulated cooling module
US4257905A (en) 1977-09-06 1981-03-24 The United States Of America As Represented By The United States Department Of Energy Gaseous insulators for high voltage electrical equipment
JPS5459080A (en) 1977-10-19 1979-05-12 Nec Corp Semiconductor device
US4168480A (en) 1978-02-13 1979-09-18 Torr Laboratories, Inc. Relay assembly
US4266282A (en) 1979-03-12 1981-05-05 International Business Machines Corporation Vertical semiconductor integrated circuit chip packaging
JPS5678356U (en) 1979-11-12 1981-06-25
US4273859A (en) 1979-12-31 1981-06-16 Honeywell Information Systems Inc. Method of forming solder bump terminals on semiconductor elements
US4473263A (en) 1981-01-21 1984-09-25 Sunstein Drew E Circuit board mounting device and associated components
US4382517A (en) 1981-02-20 1983-05-10 Metropolitan Wire Corporation Panels for holding printed circuit boards
US4449580A (en) 1981-06-30 1984-05-22 International Business Machines Corporation Vertical wall elevated pressure heat dissipation system
JPS58146827A (en) 1982-02-25 1983-09-01 Fuji Electric Co Ltd Semiconductor type pressure sensor
CH664040A5 (en) 1982-07-19 1988-01-29 Bbc Brown Boveri & Cie PRESSURE GAS-INSULATED CURRENT TRANSFORMER.
JPS602011A (en) 1983-06-14 1985-01-08 三菱電機株式会社 Gas insulated electric device
US4532576A (en) 1983-08-29 1985-07-30 Gte Automatic Electric Incorporated Printed wiring board file and method of utilizing the same
US4545610A (en) 1983-11-25 1985-10-08 International Business Machines Corporation Method for forming elongated solder connections between a semiconductor device and a supporting substrate
US4661375A (en) 1985-04-22 1987-04-28 At&T Technologies, Inc. Method for increasing the height of solder bumps
US4657146A (en) 1985-11-06 1987-04-14 Richard Walters Adjustable printed circuit board rack for supporting printed circuit boards in a horizontal or a vertical position
US4878611A (en) 1986-05-30 1989-11-07 American Telephone And Telegraph Company, At&T Bell Laboratories Process for controlling solder joint geometry when surface mounting a leadless integrated circuit package on a substrate
GB2194387A (en) 1986-08-20 1988-03-02 Plessey Co Plc Bonding integrated circuit devices
JPS6461934A (en) 1987-09-02 1989-03-08 Nippon Denso Co Semiconductor device and manufacture thereof
US4855809A (en) 1987-11-24 1989-08-08 Texas Instruments Incorporated Orthogonal chip mount system module and method
US4897508A (en) 1988-02-10 1990-01-30 Olin Corporation Metal electronic package
JPH01214141A (en) 1988-02-23 1989-08-28 Nec Corp Flip-chip type semiconductor device
US5227664A (en) 1988-02-26 1993-07-13 Hitachi, Ltd. Semiconductor device having particular mounting arrangement
JP2660077B2 (en) 1988-03-16 1997-10-08 ジーイーシー ― マルコニ リミテッド Vernier structure for flip-chip bonded equipment
US4840302A (en) 1988-04-15 1989-06-20 International Business Machines Corporation Chromium-titanium alloy
US4927505A (en) 1988-07-05 1990-05-22 Motorola Inc. Metallization scheme providing adhesion and barrier properties
US4950623A (en) 1988-08-02 1990-08-21 Microelectronics Center Of North Carolina Method of building solder bumps
CA2002213C (en) 1988-11-10 1999-03-30 Iwona Turlik High performance integrated circuit chip package and method of making same
US5024372A (en) 1989-01-03 1991-06-18 Motorola, Inc. Method of making high density solder bumps and a substrate socket for high density solder bumps
US4962058A (en) 1989-04-14 1990-10-09 International Business Machines Corporation Process for fabricating multi-level integrated circuit wiring structure from a single metal deposit
US5048747A (en) 1989-06-27 1991-09-17 At&T Bell Laboratories Solder assembly of components
US5135155A (en) 1989-08-25 1992-08-04 International Business Machines Corporation Thermocompression bonding in integrated circuit packaging
US5019943A (en) 1990-02-14 1991-05-28 Unisys Corporation High density chip stack having a zigzag-shaped face which accommodates connections between chips
FR2663784B1 (en) 1990-06-26 1997-01-31 Commissariat Energie Atomique PROCESS FOR PRODUCING A STAGE OF AN INTEGRATED CIRCUIT.
US5113314A (en) 1991-01-24 1992-05-12 Hewlett-Packard Company High-speed, high-density chip mounting
US5250843A (en) 1991-03-27 1993-10-05 Integrated System Assemblies Corp. Multichip integrated circuit modules
FR2678773B1 (en) 1991-07-05 1997-03-14 Thomson Csf WIRING PROCESS BETWEEN HOUSING OUTLETS AND HYBRID ELEMENTS.
US5160409A (en) 1991-08-05 1992-11-03 Motorola, Inc. Solder plate reflow method for forming a solder bump on a circuit trace intersection
US5194137A (en) 1991-08-05 1993-03-16 Motorola Inc. Solder plate reflow method for forming solder-bumped terminals
CA2050174A1 (en) 1991-08-28 1993-03-01 Dwight Chizen Storage rack for cassettes and compact discs
US5239447A (en) 1991-09-13 1993-08-24 International Business Machines Corporation Stepped electronic device package
US5162257A (en) 1991-09-13 1992-11-10 Mcnc Solder bump fabrication method
US5923539A (en) 1992-01-16 1999-07-13 Hitachi, Ltd. Multilayer circuit substrate with circuit repairing function, and electronic circuit device
JP2575566B2 (en) 1992-01-24 1997-01-29 株式会社東芝 Semiconductor device
DE4205029C1 (en) 1992-02-19 1993-02-11 Siemens Ag, 8000 Muenchen, De Micro-mechanical electrostatic relay - has tongue-shaped armature etched from surface of silicon@ substrate
US5371431A (en) 1992-03-04 1994-12-06 Mcnc Vertical microelectronic field emission devices including elongate vertical pillars having resistive bottom portions
FR2688628A1 (en) 1992-03-13 1993-09-17 Commissariat Energie Atomique Three-dimensional assembly of electronic components using microwires and blobs of solder, and method of producing this assembly
US5289925A (en) 1992-03-16 1994-03-01 Martin Newmark Organizational display for compact disc jewel boxes
US5281684A (en) 1992-04-30 1994-01-25 Motorola, Inc. Solder bumping of integrated circuit die
US5646439A (en) 1992-05-13 1997-07-08 Matsushita Electric Industrial Co., Ltd. Electronic chip component with passivation film and organic protective film
JP3544974B2 (en) 1992-05-15 2004-07-21 イルビン センサーズ コーポレーション Integrated laminate
JPH0637143A (en) 1992-07-15 1994-02-10 Toshiba Corp Semiconductor device and manufacture thereof
US5234149A (en) * 1992-08-28 1993-08-10 At&T Bell Laboratories Debondable metallic bonding method
US5406701A (en) 1992-10-02 1995-04-18 Irvine Sensors Corporation Fabrication of dense parallel solder bump connections
US5739053A (en) 1992-10-27 1998-04-14 Matsushita Electric Industrial Co., Ltd. Process for bonding a semiconductor to a circuit substrate including a solder bump transferring step
US5327327A (en) 1992-10-30 1994-07-05 Texas Instruments Incorporated Three dimensional assembly of integrated circuit chips
US5347428A (en) 1992-12-03 1994-09-13 Irvine Sensors Corporation Module comprising IC memory stack dedicated to and structurally combined with an IC microprocessor chip
US5448014A (en) 1993-01-27 1995-09-05 Trw Inc. Mass simultaneous sealing and electrical connection of electronic devices
US5479042A (en) 1993-02-01 1995-12-26 Brooktree Corporation Micromachined relay and method of forming the relay
KR940023325A (en) 1993-03-11 1994-10-22 토모마쯔 켕고 Circuit boards used by precoating the solder layer and circuit boards precoated with the solder layer
EP0695494B1 (en) 1993-04-23 2001-02-14 Irvine Sensors Corporation Electronic module comprising a stack of ic chips
FR2705832B1 (en) 1993-05-28 1995-06-30 Commissariat Energie Atomique Method for producing a sealing bead and mechanical strength between a substrate and a chip hybridized by balls on the substrate.
US5802699A (en) 1994-06-07 1998-09-08 Tessera, Inc. Methods of assembling microelectronic assembly with socket for engaging bump leads
US5492235A (en) 1995-12-18 1996-02-20 Intel Corporation Process for single mask C4 solder bump fabrication
US5557502A (en) 1995-03-02 1996-09-17 Intel Corporation Structure of a thermally and electrically enhanced plastic ball grid array package
US5547740A (en) 1995-03-23 1996-08-20 Delco Electronics Corporation Solderable contacts for flip chip integrated circuit devices
US5760526A (en) 1995-04-03 1998-06-02 Motorola, Inc. Plastic encapsulated SAW device
DE69628161T2 (en) 1995-04-05 2004-03-25 Unitive International Ltd. A SOLDERING STRUCTURE FOR A MICROELECTRONIC SUBSTRATE
US5680296A (en) 1995-11-07 1997-10-21 Sun Microsystems, Inc. Card guide with groove having a base portion and ramped portion which restrains an electronic card
US5773359A (en) 1995-12-26 1998-06-30 Motorola, Inc. Interconnect system and method of fabrication
US5851911A (en) 1996-03-07 1998-12-22 Micron Technology, Inc. Mask repattern process
US5736456A (en) 1996-03-07 1998-04-07 Micron Technology, Inc. Method of forming conductive bumps on die for flip chip applications
US5751556A (en) 1996-03-29 1998-05-12 Intel Corporation Method and apparatus for reducing warpage of an assembly substrate
US5742483A (en) * 1996-04-10 1998-04-21 International Business Machines Corporation Method for producing circuit board assemblies using surface mount components with finely spaced leads
US5898574A (en) 1997-09-02 1999-04-27 Tan; Wiling Self aligning electrical component
US5990472A (en) 1997-09-29 1999-11-23 Mcnc Microelectronic radiation detectors for detecting and emitting radiation signals
JP3718039B2 (en) 1997-12-17 2005-11-16 株式会社日立製作所 Semiconductor device and electronic device using the same
US6235551B1 (en) * 1997-12-31 2001-05-22 Micron Technology, Inc. Semiconductor device including edge bond pads and methods
US6134120A (en) 1998-09-04 2000-10-17 American Standard Inc. Low profile circuit board mounting arrangement
US6539624B1 (en) * 1999-03-27 2003-04-01 Industrial Technology Research Institute Method for forming wafer level package
US6310390B1 (en) * 1999-04-08 2001-10-30 Micron Technology, Inc. BGA package and method of fabrication
US6274458B1 (en) * 1999-07-07 2001-08-14 Agere Systems Optoelectronics Guardian Corp. Method of gas cleaving a semiconductor product
US6700748B1 (en) * 2000-04-28 2004-03-02 International Business Machines Corporation Methods for creating ground paths for ILS
US6717245B1 (en) * 2000-06-02 2004-04-06 Micron Technology, Inc. Chip scale packages performed by wafer level processing
US6418033B1 (en) 2000-11-16 2002-07-09 Unitive Electronics, Inc. Microelectronic packages in which second microelectronic substrates are oriented relative to first microelectronic substrates at acute angles

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020020551A1 (en) * 1995-04-04 2002-02-21 Mcnc Controlled-shaped solder reservoirs for increasing the volume of solder bumps
US5963793A (en) * 1996-05-29 1999-10-05 Mcnc Microelectronic packaging using arched solder columns
EP0918355A2 (en) * 1997-11-24 1999-05-26 Delco Electronics Corporation Solder bump input/output pad for a surface mount circuit device
EP1041617A1 (en) * 1998-01-20 2000-10-04 Citizen Watch Co., Ltd. Semiconductor device and method of production thereof and semiconductor mounting structure and method
US6201305B1 (en) * 2000-06-09 2001-03-13 Amkor Technology, Inc. Making solder ball mounting pads on substrates
US6404064B1 (en) * 2000-07-17 2002-06-11 Siliconware Precision Industries Co., Ltd. Flip-chip bonding structure on substrate for flip-chip package application
US20030102560A1 (en) * 2000-12-29 2003-06-05 Samsung Electronics Co., Ltd. Wafer level package and method for manufacturing the same

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US7049216B2 (en) 2006-05-23
US20060138675A1 (en) 2006-06-29
US20050136641A1 (en) 2005-06-23
WO2005039261A2 (en) 2005-04-28
US7659621B2 (en) 2010-02-09

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