WO2005029587A1 - 窒化物系半導体素子 - Google Patents
窒化物系半導体素子 Download PDFInfo
- Publication number
- WO2005029587A1 WO2005029587A1 PCT/JP2004/013819 JP2004013819W WO2005029587A1 WO 2005029587 A1 WO2005029587 A1 WO 2005029587A1 JP 2004013819 W JP2004013819 W JP 2004013819W WO 2005029587 A1 WO2005029587 A1 WO 2005029587A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- type
- region
- nitride semiconductor
- layer
- electrode
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 246
- 150000004767 nitrides Chemical class 0.000 title claims abstract description 154
- 239000000758 substrate Substances 0.000 claims abstract description 109
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 100
- 239000010703 silicon Substances 0.000 claims abstract description 100
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 99
- 239000012535 impurity Substances 0.000 claims abstract description 27
- 230000000694 effects Effects 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 17
- 239000000126 substance Substances 0.000 claims description 17
- 229910052751 metal Inorganic materials 0.000 claims description 16
- 239000002184 metal Substances 0.000 claims description 16
- 229910052782 aluminium Inorganic materials 0.000 claims description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 11
- 230000005669 field effect Effects 0.000 claims description 9
- 229910052738 indium Inorganic materials 0.000 claims description 8
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 7
- 229910052796 boron Inorganic materials 0.000 claims description 7
- 210000000746 body region Anatomy 0.000 claims description 6
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 6
- 239000010410 layer Substances 0.000 description 182
- 230000004888 barrier function Effects 0.000 description 25
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 16
- 229910002601 GaN Inorganic materials 0.000 description 15
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 10
- 238000005036 potential barrier Methods 0.000 description 10
- 230000000903 blocking effect Effects 0.000 description 9
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 9
- 229910052733 gallium Inorganic materials 0.000 description 9
- 238000000034 method Methods 0.000 description 9
- 239000007789 gas Substances 0.000 description 8
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 7
- 239000000969 carrier Substances 0.000 description 6
- 230000020169 heat generation Effects 0.000 description 6
- 230000002093 peripheral effect Effects 0.000 description 6
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 6
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 5
- 229910000077 silane Inorganic materials 0.000 description 5
- 229910021529 ammonia Inorganic materials 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 229910052594 sapphire Inorganic materials 0.000 description 4
- 239000010980 sapphire Substances 0.000 description 4
- 239000000956 alloy Substances 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 3
- AUCDRFABNLOFRE-UHFFFAOYSA-N alumane;indium Chemical compound [AlH3].[In] AUCDRFABNLOFRE-UHFFFAOYSA-N 0.000 description 3
- NWAIGJYBQQYSPW-UHFFFAOYSA-N azanylidyneindigane Chemical compound [In]#N NWAIGJYBQQYSPW-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000005253 cladding Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 239000011777 magnesium Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910003437 indium oxide Inorganic materials 0.000 description 2
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 2
- 229910052749 magnesium Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
- 238000000927 vapour-phase epitaxy Methods 0.000 description 2
- 229910002704 AlGaN Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 150000002344 gold compounds Chemical group 0.000 description 1
- 125000005842 heteroatom Chemical group 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/26—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
- H01L29/267—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
- H01L21/02507—Alternating layers, e.g. superlattice
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02576—N-type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02579—P-type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
Definitions
- the present invention relates to a nitride-based semiconductor device such as a light-emitting diode (LED) and a transistor.
- a nitride-based semiconductor device such as a light-emitting diode (LED) and a transistor.
- a substrate for forming a nitride-based semiconductor device is made of sapphire, silicon carbide or silicon.
- the silicon substrate has features that it is easier to cut than a sapphire substrate and a silicon carnitite substrate, and that low cost fabrication is possible. Further, the silicon substrate can have conductivity that cannot be obtained with a sapphire substrate. Therefore, the silicon substrate can be used as a current path. However, a relatively large voltage drop occurs due to a potential barrier between the silicon substrate and the nitride semiconductor, and the driving voltage of the light emitting diode becomes relatively high.
- Patent Document 1 discloses a technique for solving the above-mentioned disadvantages of a silicon substrate.
- an A1N (aluminum nitride) layer as a buffer layer an n-type InGaN (gallium indium nitride) layer having the same conductivity type as a silicon substrate, and an n-type GaN ( A gallium nitride (GaN) layer, an active layer made of InGaN, and a p-type GaN layer are sequentially grown epitaxially.
- A1N aluminum nitride
- InGaN gallium indium nitride
- This alloy layer has the function of lowering the potential barrier of the heterojunction between silicon and A1N.
- the potential barrier between the n-type silicon substrate and the nitride semiconductor is relatively large, and the voltage drop of the light-emitting diode, that is, the drive voltage uses the sapphire substrate. It is about 1.2 times higher than light emitting diodes.
- the above-mentioned problem is another problem in which current flows in the thickness direction of the silicon substrate other than the light emitting diode. This also occurs in semiconductor elements such as transistors.
- Another problem of the light emitting diode is that it is difficult to easily form an electrode that satisfies both light extraction and electrical connection. That is, in general, a mixture of indium oxide (In 2 O 3) and tin oxide (ZnO 2) is formed on the surface of a semiconductor region having a light emitting function.
- a light-impermeable bonding pad electrode for connecting a wire or the like is provided at approximately the center of the surface of the light-transmitting electrode. Since the light transmitting electrode is a thin, conductive film having a thickness of, for example, about 10 nm, the metal material of the bonding pad electrode diffuses into the light transmitting electrode or both the light transmitting electrode and the semiconductor region, and the A Schottky barrier is formed between the electrode and the bonding pad electrode.
- the Schottky barrier has a function of blocking a forward current of the light emitting diode, a current flowing in a portion of the semiconductor region below the bonding pad electrode is suppressed by the Schottky barrier, and conversely, a current in the outer peripheral portion of the semiconductor region is reduced. The current increases. Therefore, the Schottky barrier below the bonding pad electrode has the same function as the well-known current blocking layer, and contributes to the improvement of luminous efficiency.
- the current blocking layer is a layer that limits a current flowing in a region of the active layer facing the bonding pad electrode. As is well known, the current flowing in the region facing the bonding pad electrode in the active layer does not contribute to the luminous efficiency, and is a reactive current.
- the forward drive voltage of a light emitting diode using an n-type silicon substrate is relatively high!
- the forward driving voltage of the light emitting diode is relatively high, the power loss in the silicon substrate and the semiconductor region increases, the heat generation increases, and the temperature in the Schottky barrier region increases.
- the characteristics of the above-mentioned Schottky barrier deteriorate, the leakage current passing through the Schottky barrier increases, and conversely, the current in the outer peripheral portion decreases.
- the current blocking function due to the Schottky barrier decreases, and the luminous efficiency also decreases.
- a light emitting diode provided with a well-known current blocking layer made of an insulating material between the bonding pad electrode and the semiconductor region includes a current blocking layer.
- a current blocking layer made of an insulating material between the bonding pad electrode and the semiconductor region.
- Patent Document 1 Japanese Patent Application Laid-Open No. 2002-208729
- a problem to be solved by the present invention is that a nitride semiconductor device using a silicon substrate has a large voltage drop and a high driving voltage.
- the present invention for solving the above-mentioned problems includes a p-type silicon substrate having conductivity, and an n-type nitride semiconductor region formed on one main surface of the p-type silicon substrate.
- a main semiconductor region for forming a main part of a semiconductor element disposed on the n-type nitride semiconductor region; a first electrode connected to the main semiconductor region; and a p-type silicon substrate.
- a second electrode connected to the other main surface of the nitride-based semiconductor device.
- the main part of the semiconductor element means an active part or an active part of the semiconductor element. Further, the semiconductor element may have another electrode in addition to the first and second electrodes.
- the main semiconductor region includes at least an active layer and a P-type nitride semiconductor layer.
- the main semiconductor region includes at least a p-type base region and an n-type emitter region.
- the main semiconductor region includes at least a P-type body region and an n-type source region.
- the n-type nitride semiconductor region may be in contact with the P-type silicon substrate in a state where a current path from the n-type nitride semiconductor region to the p-type silicon substrate can be formed. desirable.
- the n-type nitride semiconductor region includes:
- n-type impurity is added to the material represented by
- the semiconductor element further includes an intervening layer disposed between the n-type nitride semiconductor region and the p-type silicon substrate, and the intervening layer has a thickness capable of obtaining a quantum mechanical tunnel effect. And / or formed of a material having a resistivity higher than that of the n-type nitride semiconductor region.
- the material of the intervening layer is, for example, a chemical formula AlInGaN, where x and y are 0 to x
- the semiconductor element further includes a buffer region having a multilayer structure disposed between the n-type nitride semiconductor region and the main semiconductor region, and the buffer region having the multilayer structure includes Al (aluminum). And a plurality of second layers also comprising a nitride semiconductor force containing A1 in a first ratio and a second semiconductor layer not containing A1 or containing a second ratio smaller than the first ratio. It is preferable that the first layer and the second layer are alternately stacked.
- the n-type nitride semiconductor region includes a plurality of first layers including a nitride semiconductor layer containing A1 (aluminum) in a first ratio, and a second layer not including A1 or smaller than the first ratio.
- the first layer of the multilayer buffer region has a chemical formula of Al M Ga N, where
- M is In (indium), B (boron), and at least one element whose power is also selected.
- X and y satisfy 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, x + y ⁇ 1 It is desirable to be made of a material represented by the following numerical formula and having a thickness capable of obtaining a quantum mechanical tunnel effect.
- the second layer of the multi-layer buffer region has the formula Al M Ga N, where a b 1 -a—b
- M is at least one element selected from In (indium) and B (boron), and a and b are 0 ⁇ a ⁇ l, 0 ⁇ b ⁇ l, a + b ⁇ l, a x It is desirable that the material strength represented by the numerical value satisfying the above is also satisfied.
- the light emitting diode is used as the first electrode. It is preferable that an anode electrode electrically connected to the p-type nitride semiconductor layer is provided, and a force source electrode is provided as the second electrode.
- the first electrode of the light emitting diode is formed on a light-transmitting conductive film electrically connected to the p-type nitride semiconductor layer and on a part of the surface of the conductive film. And a metal layer for connection.
- An n-type nitride semiconductor layer may be arranged between the p-type nitride semiconductor layer and the conductive film in the main semiconductor region of the light emitting diode.
- an emitter electrode electrically connected to the n-type emitter region is provided as the first electrode, and a collector electrode is provided as the second electrode. It is desirable to provide a base electrode electrically connected to the p-type base region.
- a source electrode electrically connected to the n-type source region is provided as the first electrode, and a drain electrode is provided as the second electrode.
- a gate electrode is preferably provided.
- a p-type silicon substrate of the opposite conductivity type to the conventional one is used as the silicon substrate that comes into contact with the n-type nitride semiconductor region directly or through an intervening layer. Therefore, an interface state exists at the heterojunction interface between the n-type nitride semiconductor region and the p-type silicon substrate.
- an intervening layer having a quantum mechanical tunnel effect is provided, an interface state exists between the n-type nitride semiconductor region and the p-type silicon substrate via the intervening layer.
- the interface level is an energy level that contributes to electric conduction between the n-type nitride semiconductor region and the P-type silicon substrate. Due to the presence of the interface level, carriers (electrons) in the p-type silicon substrate are well injected into the n-type nitride semiconductor region via the interface level. As a result, the potential barrier of the heterojunction between the p-type silicon substrate and the n-type nitride semiconductor region, or the n-type nitride semiconductor region and the p-type silicon substrate through an intervening layer having a quantum mechanical tunnel effect. The potential barrier at the interface with the semiconductor device is reduced, and the driving voltage of the semiconductor element can be greatly reduced. Drive voltage is When it is reduced, the power loss of the semiconductor element is reduced.
- the drive voltage can be reduced by a simple method of changing the conventional n-type silicon substrate to a p-type silicon substrate. Therefore, it is possible to reduce the driving voltage without increasing the cost.
- the first electrode is a light-transmitting conductive film electrically connected to the p-type nitride semiconductor layer and a part of a surface of the conductive film.
- a Schottky barrier is generated between the connection metal layer and the semiconductor region as described above, and the Schottky barrier is a forward current of the light emitting diode. Demonstrate the function of blocking.
- the Schottky barrier if the power loss and heat generation of the light emitting diode are large, the function of blocking the forward current of the light emitting diode by the Schottky barrier is reduced.
- the power loss and heat generation of the light emitting diode according to the specific example of the present invention are small, the function of blocking the forward current of the light emitting diode due to the Schottky barrier can be suppressed, and the light emitting efficiency can be improved. I do.
- FIG. 1 is a sectional view schematically showing a light emitting diode according to Example 1 of the present invention.
- FIG. 2 is a characteristic diagram showing the relationship between forward voltage and current of the light emitting diode of FIG. 1 and a conventional light emitting diode.
- FIG. 3 is an energy band diagram showing the effect of reducing the driving voltage of the light emitting diode of FIG. 1 in comparison with a conventional light emitting diode.
- FIG. 4 is a sectional view schematically showing a light emitting diode according to Embodiment 2 of the present invention.
- FIG. 5 is a sectional view schematically showing a light emitting diode according to a third embodiment of the present invention.
- FIG. 6 is a sectional view schematically showing a light emitting diode according to Example 4 of the present invention.
- FIG. 7 is a sectional view schematically showing a light emitting diode according to Embodiment 5 of the present invention.
- FIG. 8 is a sectional view schematically showing a transistor according to Example 6 of the present invention.
- FIG. 9 is a sectional view schematically showing a field-effect transistor according to Example 7 of the present invention.
- a light emitting diode as a semiconductor device according to the first embodiment of the present invention shown in FIG. 1 includes a p-type silicon substrate 1, a buffer region 3 as an n-type nitride semiconductor region, and a main part of a light-emitting diode. That is, it has a main semiconductor region 4 for constituting an active portion, and first and second electrodes 5 and 6.
- the main semiconductor region 4 includes an n-type nitride semiconductor layer 13, an active layer 14, and a p-type nitride semiconductor layer 15, which are sequentially epitaxially grown on the knocker region 3.
- the p-type silicon substrate 1 is a characteristic feature of the present invention, and has a conductivity type opposite to that of the n-type buffer region 3 despite being disposed thereon.
- This silicon substrate 1 is doped with a group 3 element such as B (boron) which functions as a p-type impurity, that is, an acceptor impurity, at a concentration of, for example, about 5 ⁇ 10 18 cm 3 —5 ⁇ 10 19 cm 3 . . Therefore, the silicon substrate 1 is a conductive substrate having a low resistivity of about 0.0001 ⁇ 'cm-0.01 ⁇ 'cm, and functions as a current path between the first and second electrodes 5 and 6. . Further, the silicon substrate 1 has a thickness, for example, 350 nm, which can function as a mechanical support substrate for the buffer region 3 and the main semiconductor region 4 and the like thereon.
- the buffer region 3 as an n-type nitride semiconductor region disposed on the p-type silicon substrate 1 has an n-type nitride semiconductor force of one or more elements belonging to Group 3 and nitrogen belonging to Group V. Become.
- the n-type nitride semiconductor for the buffer region 3 is
- the buffer region 3 is preferably made of a material selected from AlInGaN (gallium indium aluminum nitride), GaN (gallium nitride), AlInN (indium nitride, aluminum), and AlGaN (gallium aluminum nitride). More preferably, the gallium gallium nitride aluminum (AlInGaN) force is also provided.
- AlInGaN gallium indium aluminum nitride
- GaN gallium nitride aluminum
- AlInGaN gallium gallium nitride aluminum
- a is more preferably 0.1-0.7 and b ⁇ 0.0001-0.5.
- the composition of the buffer region 3 in Example 1 is Al In Ga N.
- the knocker region 3 has a knocker function for mainly transferring the plane orientation of the silicon substrate 1 to the main semiconductor region 4 that also has a nitride semiconductor region formed thereon.
- the buffer region 3 has a thickness of 10 nm or more.
- the thickness of the buffer region 3 be 500 nm or less.
- the thickness of the buffer region 3 of the first embodiment is 30 nm.
- the energy difference between the lowest level of the conduction band of the nitride semiconductor and the highest level of the valence band of silicon is relatively small. Therefore, a well-known type 2 or type 3 heterojunction is formed at the interface 2 between the buffer region 3 made of the n-type nitride semiconductor and the p-type silicon substrate 1.
- the type 2 heterojunction means that the highest level of one valence band of two semiconductors forming a heterojunction in the energy band diagram is the same as the highest level of the valence band of the other semiconductor.
- a junction that is located between the lowest level of the band and the lowest level of one conduction band is located above the lowest level of the other conduction band.
- a type 3 heterojunction is a junction in which the highest level of one valence band of two semiconductors forming a heterojunction is higher than the lowest level of the conduction band of the other semiconductor. If the heterojunction between the buffer region 3 also having the power of the n-type nitride-based compound semiconductor according to the present embodiment and the p-type silicon substrate 1 is the above-mentioned type 2, the energy band structure of this heterojunction is shown in FIG. ).
- FIG. 3 (B) shows the energy band structure of n-type buffer region 3 and p-type silicon substrate 1 in a thermal equilibrium state.
- Ev indicates the highest level of the valence band
- Ec indicates the lowest level of the conduction band
- Ef indicates the Fermi level.
- Et shown in the forbidden band in FIG. 3B is a substrate between p-type silicon substrate 1 and n-type buffer region 3. This shows the interface state of the mouth junction.
- a heterojunction of the above type 2 is formed as shown in FIG. 3 (B)
- Carriers (electrons) are well injected into the conduction band of the noffer region 3 formed by the n-type semiconductor region via the interface state Et.
- the potential barrier at the heterojunction between the p-type silicon substrate 1 and the n-type buffer region 3 is reduced, and the driving voltage can be significantly reduced.
- the main semiconductor region 4 for the light emitting diode having the well-known double heterojunction structure has an n-type nitride semiconductor layer 13, an active layer 14, and a p-type nitride layer sequentially arranged on the buffer region 3.
- the main semiconductor region 4 can also be called a light emitting functional region or a light emitting active region.
- the buffer region 3 made of the n-type nitride semiconductor has the same function as the n-type nitride semiconductor layer 13 of the main semiconductor region 4, thereby eliminating the n-type nitride semiconductor layer 13 from the main semiconductor region 4. be able to.
- the n-type nitride semiconductor layer 13 and the p-type nitride semiconductor layer 15 can be directly contacted by omitting the active layer 14.
- the n-type nitride semiconductor layer 13 of the main semiconductor region 4 has a material strength represented by the following chemical formula, ignoring n-type impurities.
- ⁇ and y are numerical values that satisfy 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1.
- the n-type nitride semiconductor layer 13 can be called an n-cladding layer of the light emitting diode, and has a larger band gap than the active layer 14.
- the active layer 14 is preferably made of a nitride semiconductor represented by the following chemical formula. Al In
- x and y are numerical values satisfying 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1.
- the active layer 14 is formed of gallium indium nitride (InGaN).
- the active layer 14 has a force schematically shown by one layer.
- the active layer has a well-known multiple quantum well structure.
- the active layer 14 can be composed of one layer.
- the active layer 14 is not doped with the impurity for determining the conductivity type, but may be doped with a p-type or n-type impurity.
- the p-type nitride semiconductor layer 15 disposed on the active layer 14 has a material strength represented by the following chemical formula, ignoring p-type impurities.
- ⁇ and y are numerical values that satisfy 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1.
- the p-type nitride semiconductor layer 15 is formed of p-type GaN having a thickness of 500 nm.
- This p-type nitride semiconductor layer 15 can be called a p-cladding layer, and has a larger band gap than the active layer 14.
- the n-type nitride semiconductor layer 13, the active layer 14 and the p-type nitride semiconductor layer 15 constituting the main semiconductor region 4 are formed on the silicon substrate 1 via the buffer region 3. Crystallinity is relatively good.
- the first electrode 5 as an anode electrode is connected to the p-type nitride semiconductor layer 15, and the second electrode 6 as a force source electrode is connected to the lower surface of the p-type silicon substrate 1.
- a p-type nitride semiconductor layer for contact is additionally provided on the p-type nitride semiconductor layer 15, and the first electrode 5 is connected here. be able to.
- a p-type silicon substrate 1 having a main surface which is set to be a (111) plane with respect to the crystal orientation indicated by the Miller index is prepared.
- the silicon substrate 1 is subjected to a well-known hydrogen termination using an HF-based etchant.
- the substrate 1 is charged into a well-known OMVPE (Organometallic Vapor Phase Epitaxy), that is, a reaction chamber of a metalorganic vapor phase epitaxy apparatus, and the temperature is raised to, for example, 1170 ° C.
- OMVPE Organic Metal Organic Vapor Phase Epitaxy
- thermal cleaning was performed at 1170 ° C. for 10 minutes to remove the oxide film on the surface of the substrate 1.
- the buffer region 3 is epitaxially grown on the silicon substrate 1 by the OMVPE method.
- the buffer region 3 also has an n-type gallium indium aluminum nitride (AlInGaN) force, a well-known ratio of trimethylaluminum gas (hereinafter, referred to as TMA) and trimethylindium gas (hereinafter, referred to as TMI) in a reaction chamber at a predetermined ratio.
- TMA trimethylaluminum gas
- TMI trimethylindium gas
- TMG Trimethylgallium gas
- SiH silane gas
- Si (silicon) in silane gas (SiH) is not n-type
- an n-type nitride semiconductor layer 13, an active layer 14, and a p-type nitride semiconductor layer 15 are sequentially formed on the buffer region 3 by a well-known epitaxy method to obtain a main semiconductor region 4.
- the temperature of the substrate 1 is set to, for example, 1000 to 1110 ° C., and for example, TMG, silane (SiH), and ammonia are required.
- n-type nitride semiconductor layer 13 having a thickness of 2 m and also having an n-type GaN force is obtained.
- the n-type nitride semiconductor layer 13 has an n-type impurity concentration of, for example, 3 ⁇ 10 18 cm 3 , which is lower than the impurity concentration of the silicon substrate 1.
- the buffer region 3 below has good crystallinity, so that the n-type nitride semiconductor layer 13 of the main semiconductor region 4 has the crystallinity of the buffer region 3. It has good crystallinity inherited from it.
- an active layer 14 having a well-known multiple quantum well structure is formed on the n-type nitride semiconductor layer 13 functioning as an n-type clad layer.
- the active layer 14 having a multi-quantum well structure is shown as a single layer for simplicity of illustration, but it is actually composed of a plurality of barrier layers and a plurality of well layers.
- the well layers are alternately arranged, for example, four times.
- TMG, TMI, and ammonia are supplied to the reaction chamber at a predetermined ratio, and a barrier layer made of, for example, InGaN and having a thickness of 13 nm is formed.
- TMI titanium dioxide
- the well layer having a thickness of, for example, 3 nm by changing the ratio of
- the active layer 14 having a multiple quantum well structure can be obtained.
- the active layer 14 is formed under the n-type nitride semiconductor layer 13 Inherits the crystallinity of and has good crystallinity.
- the active layer 14 can be doped with, for example, a p-type impurity.
- TMG trimethylgallium gas
- ammonia gas ammonia gas
- Cp Mg biscyclopentagel magnesium gas
- a p-type nitride semiconductor layer 15 of about 500 nm made of p-type GaN is formed.
- Magnesium (Mg) is introduced at a concentration of, for example, 3 ⁇ 10 18 cnf 3 and functions as a p-type impurity.
- the first and second electrodes 5 are formed by a well-known vacuum deposition method to complete a light emitting diode.
- a characteristic line A in Fig. 2 indicates a current flowing through the light emitting diode according to the first embodiment when the first electrode 5 is applied with a positive forward voltage and the second electrode 6 is applied with a negative forward voltage. Is shown.
- the characteristic line B in FIG. 2 shows the current of the light emitting diode when a forward voltage is applied to the conventional light emitting diode having the n-type silicon substrate as in the case of Patent Document 1 described above.
- the drive voltage required to pass a current of 20 mA to the light emitting diode is 3.36 V for the characteristic line A and 3.98 V for the characteristic line B. Therefore, the drive voltage for passing a current of 20 mA can be reduced by 0.62 V by a very simple method of changing the conductivity type of the substrate 1 to the conventional n-type power p-type.
- FIG. 3 (A) shows the energy band state of the heterojunction according to the conventional technique for comparison
- FIG. 3 (B) shows the energy band state of the heterojunction according to the present invention.
- the heterojunction according to the prior art shown in Fig. 3 (A) is composed of an n-type Si substrate (n-Si) and an n-type nitride semiconductor (AlInGaN) directly epitaxially grown thereon. .
- n-Si n-type Si substrate
- AlInGaN n-type nitride semiconductor
- the barrier is relatively low and there are many interface states Et at interface 2 of this heterojunction.
- This interface level Et is the highest level of the valence band of the p-type silicon substrate 1 and the conduction band of the n-type buffer region 3. And has a function of increasing generation and recombination of electrons and holes at the interface 2 of the heterojunction.
- the interface 2 including the interface state Et and the vicinity thereof can be referred to as a region for promoting generation of electrons and holes and recombination.
- the carriers (electrons) in the p-type silicon substrate 1 shown on the right side of the interface 2 in FIG. 3B are shown on the left side of the interface 2 via this interface state Et.
- the carrier is efficiently transported from p-type silicon substrate 1 to n-type buffer region 3.
- the potential barrier at the heterojunction between the p-type silicon substrate 1 and the n-type buffer region 3 for carriers (electrons) in the p-type silicon substrate 1 becomes relatively small, and the light emitting diode is driven in the forward direction.
- the voltage can be greatly reduced.
- the present embodiment it is possible to easily achieve a drastic reduction in the driving voltage of the light emitting diode while maintaining good crystallinity of the main semiconductor region 4.
- the driving voltage is reduced, the power loss of the light emitting diode is reduced.
- the driving voltage of the light emitting diode can be reduced by a simple method of changing the conventional n-type silicon substrate to the p-type silicon substrate 1. Therefore, the driving voltage can be reduced without increasing the cost of the light emitting diode.
- FIG. 9 the substantially same parts as those in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted.
- the light-emitting diode of FIG. 4 has the same configuration as that of FIG. 1, except that the buffer region 3 of FIG. In the modified buffer region 3a of FIG. 4, a multi-layered buffer region 20 is disposed on the n-type buffer region 3 made of n-type gallium indium aluminum (AlInGaN) formed in the same manner as in FIG. It is constituted by that.
- the multilayered buffer region 20 in FIG. 4 includes a plurality of first layers 21 and a plurality of second layers 22 that are arranged alternately and alternately.
- the plurality of first layers 21 also comprise a nitride semiconductor containing A1 (aluminum) in a first proportion.
- the plurality of second layers 22 are made of a nitride semiconductor that does not contain A1 or contains a second proportion smaller than the first proportion.
- the first layer 21 is preferably made of a nitride semiconductor represented by the following chemical formula, ignoring n-type impurities.
- M is at least one element selected from In (indium), B (boron) and force
- X and y are 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, x + y ⁇ 1 Which satisfies
- the first layer 21 desirably has a thickness capable of obtaining a quantum mechanical tunnel effect, for example, 110 nm.
- the first layer 21 also has an n-type A1N force and contains Si (silicon) as an n-type impurity.
- the first layer 21 may be an undoped nitride semiconductor containing no n-type impurity.
- the second layer 22 is preferably made of a nitride semiconductor represented by the following chemical formula, ignoring n-type impurities.
- M is In (indium), B (boron) and at least one element whose force is also selected, and a and b are 0 ⁇ a ⁇ l, 0 ⁇ b ⁇ l, a + b ⁇ l, It is a numerical value that satisfies a ⁇ x.
- the second layer 22 contains silicon (Si) as an n-type impurity.
- the second layer 22 is formed of the same nitride semiconductor as that of the n-type buffer region 3 and is made of n-type GaN. It is desirable that the thickness of the second layer 22 is not less than 10 m, which is the same as the thickness of the first layer 21 and is large enough to prevent a quantum mechanical tunnel effect.
- the second layer 22 may have a thickness at which a quantum mechanical tunnel effect can be obtained, or may have the same thickness as the first layer 21.
- the buffer region 20 having the multilayer structure of the modified buffer region 3a After forming the lower n-type buffer region 3, for example, 50 mol Zmin of TMA (trimethylaluminum) and silane (SiH) 20 nmolZmin and ammonia at a rate of 0.14 molZmin.
- TMA trimethylaluminum
- SiH silane
- a first layer 21 of 5 nm n-type A1N is epitaxially grown. Thereafter, the supply of TMA is stopped, and the supply of silane and ammonia is continued, and TMG is flowed at a rate of 50 molZ min with the supply of the TMA to epitaxially grow the second layer 22 of n-type GaN having a thickness of 25 nm. .
- the steps of forming the first and second layers 21 and 22 are repeated 20 times to obtain a buffer region 20 having a multilayer structure. In FIG. 4, the first and second layers 21 and 22 are each 4 Only the layers are shown.
- the buffer region 3 can be omitted, and the multi-layered notch region 20 can be brought into direct contact with the p-type silicon substrate 1. That is, a buffer region 20 having a multilayer structure shown in FIG. 4 can be provided instead of the buffer region 3 shown in FIGS. 1 and 6 to 9.
- a buffer region 20 having a multilayer structure shown in FIG. 4 can be provided instead of the buffer region 3 shown in FIGS. 1 and 6 to 9.
- an intervening layer 11 made of a nitride semiconductor containing aluminum is arranged between the p-type silicon substrate 1 and the n-type buffer region 3 of FIG.
- the configuration is the same as that of FIG. 1 except that the mold buffer region 3 is also used as the n-type cladding layer.
- the combination of the intervening layer 11 and the n-type buffer region 3 is shown as a deformed buffer region 3b, and the combination of the active layer 14 and the p-type nitride semiconductor region 15a made of InGaN is designated as the main semiconductor region 4a. It is shown.
- the intervening layer 11 also has a nitride semiconductor power represented by the following chemical formula.
- the intervening layer 11 does not contain an n-type impurity.
- the intermediate layer 11 may include an n-type impurity.
- the intervening layer 11 is a film having a higher resistivity than the resistivity of the n-type buffer region 3. It is desirable that the intervening layer 11 has a thickness in the range of 110 nm, and more desirably, for example, a thickness of 110 nm to obtain a quantum mechanical tunnel effect. Most preferably, it has a thickness of about 2-3 nm. In the case where the intervening layer 11 has a thickness capable of obtaining a quantum mechanical tunnel effect, the conductivity between the n-type buffer region 3 and the p-type silicon substrate 1, which is also an n-type nitride semiconductor region, is formed. However, the intervening layer 11 can be substantially ignored.
- the carriers (electrons) in the p-type silicon substrate 1 change the interface state Et existing at the heterojunction interface between the n-type buffer region 3 and the p-type silicon substrate 1.
- the n-type buffer region 3 is well implanted.
- the potential barrier of the hetero junction between the p-type silicon substrate 1 and the n-type buffer region 3 is reduced, and the driving voltage of the light emitting diode can be significantly reduced. .
- the difference between the lattice constant of the intervening layer 11 and that of the p-type silicon substrate 1 is larger than the difference of the lattice constant of the n-type buffer region 3 or the main semiconductor region 4-1 4c and the p-type silicon substrate 1.
- Small materials are desirable in terms of characteristics.
- the difference in thermal expansion coefficient between the intermediate layer 11 and the p-type silicon substrate 1 is different from the thermal expansion coefficient between the n-type buffer region 3 or the main semiconductor region 4-1 4c and the p-type silicon substrate 1. It is desirable in terms of characteristics that the material is smaller than the difference between the two.
- the light-emitting diode of Example 4 shown in FIG. 6 has a modified first electrode 5a, and the other configuration is the same as that of FIG.
- the first electrode 5a in FIG. 6 is formed of indium oxide (In 2 O 3) and oxidized tin (ZnO 2) formed on almost the entire surface of the main semiconductor region 4, ie, the surface of the p-type nitride semiconductor layer 15. Mixture of IT
- a light-transmitting conductive film 51 having an O force and a connection metal layer 52 which can be called a bonding pad electrode formed at a substantially central portion on the surface of the conductive film 51 are also formed.
- the light transmissive conductive film 51 has a thickness of about 10 nm and is in ohmic contact with the p-type nitride semiconductor layer 15.
- the connection metal layer 52 is made of a metal such as Ni (nickel), Au (gold), or A1 (aluminum), and is formed to a thickness that allows wire bonding, as shown in FIG. Since the connection metal layer 52 is thicker than the conductive film 51, the light generated in the main semiconductor region 4 is not substantially transmitted.
- the metal of the connection metal layer 52 diffused into the conductive film 51 or a part of the surface of the conductive film 51 and the main semiconductor region 4 at the time of forming the connection metal layer 52 or in a subsequent step. A region exists, and a Schottky barrier is formed between the metal layer 52 and the main semiconductor region 4.
- the conductive film 51 Current flows into region 4. Since the connection metal layer 52 is in Schottky contact with the main semiconductor region 4, the current is suppressed by the Schottky barrier, and the current flows through the Schottky barrier between the connection metal layer 52 and the main semiconductor region 4. It hardly flows. Therefore, the conductive film 51 The current component flowing into the outer peripheral portion of the region 4 occupies most of the current between the first and second electrodes 5a and 6. Light generated based on the current flowing through the outer peripheral portion of the main semiconductor region 4 is extracted above the light-transmitting conductive film 51 without being disturbed by the light-impermeable connection metal layer 52.
- the Schottky barrier degrades as the temperature rises, and the leakage current passing through the Schottky barrier increases. Since the light emitting diode of Example 4 in FIG. 6 is configured using the P-type silicon substrate 1 like the light emitting diode of Example 1 in FIG. 1, the driving voltage in the forward direction is the same as in Example 1. Is relatively small and the power loss and heat generation are smaller than those using a conventional n-type silicon substrate. Therefore, the degradation of the Schottky barrier between the connection metal layer 52 and the main semiconductor region 4 due to the heat generated in the silicon substrate 1 and the main semiconductor region 4 is suppressed, and the current passing through the Schottky barrier is reduced.
- the current between the first and second electrodes 5a and 6 is the same as that of the light emitting diode using the conventional n-type silicon substrate, the current flowing through the outer peripheral portion of the main semiconductor region 4 with respect to the total current And the luminous efficiency is higher than that of a light emitting diode using a conventional n-type silicon substrate.
- the heat generation of the main semiconductor region 4 and the silicon substrate 1 in FIG. 6 can be the same as the heat generation of the light emitting diode using the conventional n-type silicon substrate, a larger current than the conventional case is applied to the outer peripheral side of the main semiconductor region 4.
- the effect based on the p-type silicon substrate 1 can be obtained as in the first embodiment.
- the modified configuration of the first electrode 5a in FIG. 6 can be applied to the light emitting diodes of the second and third embodiments shown in FIGS.
- the light emitting diode of Example 5 shown in FIG. 7 has an n-type auxiliary nitride semiconductor layer 53 added between the first electrode 5a and the main semiconductor region 4 of the light emitting diode of Example 4 of FIG.
- the rest of the configuration is the same as that of FIG. It is desirable that the n-type auxiliary nitride semiconductor layer 53 also has a material strength represented by the following chemical formula, ignoring n-type impurities.
- x and y are numerical values satisfying 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1.
- n-type auxiliary nitride semiconductor layer 53 added in FIG. 7 is in contact with p-type nitride semiconductor layer 15, and the other main surface is in contact with light-transmitting conductive film 51.
- the light-transmitting conductive film 51 is made of ITO
- the resistance of ohmic contact between the conductive film 51 and the n-type auxiliary nitride semiconductor layer 53 is extremely low because ITO has the same characteristics as the n-type semiconductor. In this case, the power loss is reduced, the forward drive voltage is further reduced, and the luminous efficiency is improved.
- the thickness of the n-type auxiliary nitride semiconductor layer 53 is set to 1 It is desirable to set it to 30 nm, more preferably to 5 lOnm. Further, the thickness of the n-type auxiliary nitride semiconductor layer 53 is desirably a thickness at which a quantum mechanical tunnel effect can be obtained.
- Example 5 When a forward voltage is applied between the first and second electrodes 5 a and 6 in FIG. 7, a current flows from the conductive film 51 to the p-type nitride semiconductor layer 15 via the n-type auxiliary nitride semiconductor layer 53.
- Example 5 the forward voltage drop between the p-type auxiliary nitride semiconductor layer 15 and the conductive film 51 via the n-type auxiliary nitride semiconductor layer 53 was reduced by the p-type auxiliary nitride shown in FIG. It is smaller than the forward voltage drop between the semiconductor layer 15 and the conductive film 51. Therefore, the forward drive voltage can be reduced, and the luminous efficiency is improved.
- the structure of the first electrode 5a in FIG. 7 and the n-type auxiliary nitride semiconductor layer 53 can be applied to the second and third embodiments in FIGS.
- the transistor of Example 6 shown in FIG. 8 has the same configuration as that of FIG. 1 except that the main semiconductor region 4 for the light emitting diode of FIG. 1 is replaced by the main semiconductor region 4b for the transistor. It is.
- the n-type nitride semiconductor region 13 made of n-type GaN of the main semiconductor region 4b and the lower structure are the same as those in FIG.
- the main semiconductor region 4b includes, in addition to the n-type nitride semiconductor region 13 functioning as a collector region, a base region 31 formed on the p-type nitride semiconductor force epitaxially grown thereon.
- An emitter region 32 which is epitaxially grown and also has an n-type nitride semiconductor power.
- a base electrode 33 is connected to the base region 31, and an emitter electrode 34 as a first electrode is connected to the emitter region 32.
- the electrode 6 on the lower surface of the p-type silicon substrate 1 functions as a collector electrode.
- the transistor in FIG. 8 is an npn transistor, when the transistor is turned on, the collector electrode 6 is set to the highest potential, and a current flows from the collector electrode 6 side to the emitter electrode 34 side. Also in this transistor, the voltage drop at the time of ON between the two electrodes 6 and 34 can be reduced as in FIG.
- the main semiconductor region 4 for the light emitting diode in FIG. 1 is replaced by the main semiconductor region 4c for the field effect transistor,
- the configuration is the same as that of FIG.
- the main semiconductor region 4c in FIG. 9 is provided with the same n-type nitride semiconductor region 13 as in FIG.
- the n-type nitride semiconductor region 13 functions as a drain region.
- a body region 41 made of a p-type nitride semiconductor is provided in the n-type nitride semiconductor region 13 by introducing a p-type impurity. By introducing an n-type impurity into the body region 41, A source region 42 of nitride semiconductor power is provided.
- a gate electrode 44 is disposed on the surface of the body region 41 between the source region 42 and the n-type nitride semiconductor region 13 as a drain region via an insulating film 43.
- a source electrode 45 as a first electrode is connected to the source region 42.
- the second electrode 6 on the lower surface of the p-type silicon substrate 1 functions as a drain electrode.
- the voltage drop between the source electrode 45 and the drain electrode 6 during the ON driving is small.
- the buffer region 3 in Figs. 8 and 9 must also be used as a collector region or a drain region. Can do.
- FIGS. 4, 6, 7, 8 and 9 the quantum mechanical tunnel effect of A1N or the like similar to that in FIG. 5 is formed between the buffer region 3 and the p-type silicon substrate 1. Can be arranged. That is, in FIG. 4, FIG. 6, FIG. 7, FIG. 8, and FIG. 9, an intervening layer having a quantum mechanical tunnel effect such as A1N is provided between the chain line 11 ′ and the p-type silicon substrate 1. it can.
- a layer in which In is contained in the buffer regions 3, 3a, and 3b can be a layer that does not include the force In.
- the present invention can be applied to a rectifier diode having a pn junction and a Schottky nolia diode having a Schottky barrier electrode. Further, the present invention can be applied to all semiconductor elements in which current flows in the thickness direction of the substrate 1. Industrial applicability
- the present invention is applicable to semiconductor devices such as light emitting diodes, transistors, field effect transistors, and rectifier diodes.
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005514103A JP3940933B2 (ja) | 2003-09-24 | 2004-09-22 | 窒化物系半導体素子 |
US11/375,964 US7675076B2 (en) | 2003-09-24 | 2006-03-15 | Nitride-based semiconductor device of reduced voltage drop |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003331881 | 2003-09-24 | ||
JP2003-331881 | 2003-09-24 | ||
JP2004093515 | 2004-03-26 | ||
JP2004-093515 | 2004-03-26 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/375,964 Continuation US7675076B2 (en) | 2003-09-24 | 2006-03-15 | Nitride-based semiconductor device of reduced voltage drop |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2005029587A1 true WO2005029587A1 (ja) | 2005-03-31 |
Family
ID=34380359
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2004/013819 WO2005029587A1 (ja) | 2003-09-24 | 2004-09-22 | 窒化物系半導体素子 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7675076B2 (ja) |
JP (1) | JP3940933B2 (ja) |
TW (1) | TWI243399B (ja) |
WO (1) | WO2005029587A1 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006339629A (ja) * | 2005-05-02 | 2006-12-14 | Nichia Chem Ind Ltd | 半導体素子 |
EP1958266A1 (en) * | 2005-12-08 | 2008-08-20 | Electronics and Telecommunications Research Institute | Silicon-based light emitting diode using side reflecting mirror |
JP2011222804A (ja) * | 2010-04-12 | 2011-11-04 | Nippon Telegr & Teleph Corp <Ntt> | 半導体装置およびその製造方法 |
US8076694B2 (en) | 2005-05-02 | 2011-12-13 | Nichia Corporation | Nitride semiconductor element having a silicon substrate and a current passing region |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI270217B (en) | 2004-02-24 | 2007-01-01 | Showa Denko Kk | Gallium nitride-based compound semiconductor multilayer structure and production method thereof |
US20110018104A1 (en) * | 2008-01-16 | 2011-01-27 | Toru Nagashima | METHOD FOR PRODUCING A LAMINATED BODY HAVING Al-BASED GROUP-III NITRIDE SINGLE CRYSTAL LAYER, LAMINATED BODY PRODUCED BY THE METHOD, METHOD FOR PRODUCING Al-BASED GROUP-III NITRIDE SINGLE CRYSTAL SUBSTRATE EMPLOYING THE LAMINATED BODY, AND ALUMINUM NITRIDE SINGLE CRYSTAL SUBSTRATE |
US7989834B2 (en) | 2008-04-30 | 2011-08-02 | Lg Innotek Co., Ltd. | Light emitting device and method for manufacturing the same |
KR101405742B1 (ko) * | 2010-02-24 | 2014-06-10 | 엘지이노텍 주식회사 | 반도체 발광소자 |
WO2013009552A2 (en) * | 2011-07-08 | 2013-01-17 | RoseStreet Labs Energy, LLC | Multi-color light emitting devices with compositionally graded cladding group iii-nitride layers grown on substrates |
DE102011108080B4 (de) * | 2011-07-21 | 2015-08-20 | Otto-Von-Guericke-Universität Magdeburg | Gruppe-III-Nitrid-basierte Schichtenfolge, deren Verwendung und Verfahren ihrer Herstellung |
US9054232B2 (en) * | 2012-02-28 | 2015-06-09 | Koninklijke Philips N.V. | Integration of gallium nitride LEDs with aluminum nitride/gallium nitride devices on silicon substrates for AC LEDs |
KR20150014641A (ko) * | 2013-07-30 | 2015-02-09 | 서울반도체 주식회사 | 질화갈륨계 다이오드 및 그 제조 방법 |
CN105374912B (zh) * | 2015-10-28 | 2017-11-21 | 厦门市三安光电科技有限公司 | 发光二极管及其制作方法 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11177142A (ja) * | 1997-10-10 | 1999-07-02 | Toyoda Gosei Co Ltd | GaN系の半導体素子 |
JP2000004047A (ja) * | 1998-06-16 | 2000-01-07 | Toshiba Corp | 半導体発光装置及びその製造方法 |
JP2001044209A (ja) * | 1999-07-27 | 2001-02-16 | Furukawa Electric Co Ltd:The | GaN系半導体装置の製造方法 |
JP2002208729A (ja) * | 2001-01-11 | 2002-07-26 | Sanken Electric Co Ltd | 発光素子及びその製造方法 |
JP2003017742A (ja) * | 2001-06-29 | 2003-01-17 | Sanken Electric Co Ltd | 半導体発光素子 |
JP2003059948A (ja) * | 2001-08-20 | 2003-02-28 | Sanken Electric Co Ltd | 半導体装置及びその製造方法 |
JP2003249642A (ja) * | 2002-02-22 | 2003-09-05 | Fuji Xerox Co Ltd | ヘテロ接合半導体素子及びその製造方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5679965A (en) * | 1995-03-29 | 1997-10-21 | North Carolina State University | Integrated heterostructures of Group III-V nitride semiconductor materials including epitaxial ohmic contact, non-nitride buffer layer and methods of fabricating same |
US5858826A (en) * | 1996-01-16 | 1999-01-12 | United Microelectronics Corporation | Method of making a blanket N-well structure for SRAM data stability in P-type substrates |
JPH1117742A (ja) | 1997-06-24 | 1999-01-22 | Toshiba Corp | 分散ネットワークコンピューティングシステム、及び同システムに用いられる情報交換方法、この方法を格納した記憶媒体 |
US6586781B2 (en) * | 2000-02-04 | 2003-07-01 | Cree Lighting Company | Group III nitride based FETs and HEMTs with reduced trapping and method for producing the same |
JP4240752B2 (ja) * | 2000-05-01 | 2009-03-18 | 富士電機デバイステクノロジー株式会社 | 半導体装置 |
JP2002190621A (ja) * | 2000-10-12 | 2002-07-05 | Sharp Corp | 半導体発光素子およびその製造方法 |
US6649287B2 (en) * | 2000-12-14 | 2003-11-18 | Nitronex Corporation | Gallium nitride materials and methods |
JP3453558B2 (ja) * | 2000-12-25 | 2003-10-06 | 松下電器産業株式会社 | 窒化物半導体素子 |
US6552398B2 (en) * | 2001-01-16 | 2003-04-22 | Ibm Corporation | T-Ram array having a planar cell structure and method for fabricating the same |
JP2004531894A (ja) * | 2001-06-15 | 2004-10-14 | クリー インコーポレイテッド | 紫外線発光ダイオード |
US6573558B2 (en) * | 2001-09-07 | 2003-06-03 | Power Integrations, Inc. | High-voltage vertical transistor with a multi-layered extended drain structure |
US6759689B2 (en) * | 2002-08-07 | 2004-07-06 | Shin-Etsu Handotai Co., Ltd. | Light emitting element and method for manufacturing the same |
JP2004266039A (ja) * | 2003-02-28 | 2004-09-24 | Shin Etsu Handotai Co Ltd | 発光素子及び発光素子の製造方法 |
JP4530171B2 (ja) * | 2003-08-08 | 2010-08-25 | サンケン電気株式会社 | 半導体装置 |
-
2004
- 2004-09-16 TW TW093128027A patent/TWI243399B/zh active
- 2004-09-22 WO PCT/JP2004/013819 patent/WO2005029587A1/ja active Application Filing
- 2004-09-22 JP JP2005514103A patent/JP3940933B2/ja active Active
-
2006
- 2006-03-15 US US11/375,964 patent/US7675076B2/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11177142A (ja) * | 1997-10-10 | 1999-07-02 | Toyoda Gosei Co Ltd | GaN系の半導体素子 |
JP2000004047A (ja) * | 1998-06-16 | 2000-01-07 | Toshiba Corp | 半導体発光装置及びその製造方法 |
JP2001044209A (ja) * | 1999-07-27 | 2001-02-16 | Furukawa Electric Co Ltd:The | GaN系半導体装置の製造方法 |
JP2002208729A (ja) * | 2001-01-11 | 2002-07-26 | Sanken Electric Co Ltd | 発光素子及びその製造方法 |
JP2003017742A (ja) * | 2001-06-29 | 2003-01-17 | Sanken Electric Co Ltd | 半導体発光素子 |
JP2003059948A (ja) * | 2001-08-20 | 2003-02-28 | Sanken Electric Co Ltd | 半導体装置及びその製造方法 |
JP2003249642A (ja) * | 2002-02-22 | 2003-09-05 | Fuji Xerox Co Ltd | ヘテロ接合半導体素子及びその製造方法 |
Non-Patent Citations (3)
Title |
---|
MARCHAND H. ET AL.: "Metalorganic chemical vapor deposition of GaN on Si(III): stress control and application to field-effects transistors", JOURNAL OF APPLIED PHYSICS, vol. 89, no. 12, 15 June 2001 (2001-06-15), pages 7846 - 7851, XP012052659 * |
WANG C.W. ET AL.: "Effect of rapid thermal annealing on radio-frequency magnetron-sputtered GaN thin films and Au/GaN Schottky diodes", JOURNAL OF THE VACUUM SCIENCE & TECHNOLOGY B, vol. 17, no. 4, July 1999 (1999-07-01) - August 1999 (1999-08-01), pages 1545 - 1548, XP012007607 * |
ZHIZHEN Y.E. ET AL.: "An untraviolet photodetector based on GaN/Si", INTERNATIONAL JOURNAL OF MODERN PHYSICS B, vol. 16, no. 28-29, 2002, pages 4310 - 4313, XP002984402 * |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006339629A (ja) * | 2005-05-02 | 2006-12-14 | Nichia Chem Ind Ltd | 半導体素子 |
US8076694B2 (en) | 2005-05-02 | 2011-12-13 | Nichia Corporation | Nitride semiconductor element having a silicon substrate and a current passing region |
EP1958266A1 (en) * | 2005-12-08 | 2008-08-20 | Electronics and Telecommunications Research Institute | Silicon-based light emitting diode using side reflecting mirror |
EP1958266A4 (en) * | 2005-12-08 | 2012-10-17 | Korea Electronics Telecomm | SILICON LED WITH MIRROR REFLECTIVE LATERAL |
JP2011222804A (ja) * | 2010-04-12 | 2011-11-04 | Nippon Telegr & Teleph Corp <Ntt> | 半導体装置およびその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
JPWO2005029587A1 (ja) | 2006-11-30 |
TW200522138A (en) | 2005-07-01 |
US7675076B2 (en) | 2010-03-09 |
TWI243399B (en) | 2005-11-11 |
US20060157730A1 (en) | 2006-07-20 |
JP3940933B2 (ja) | 2007-07-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4168284B2 (ja) | 窒化物系半導体素子 | |
JP3952210B2 (ja) | 窒化物系半導体素子及びその製造方法 | |
JP5136765B2 (ja) | 窒化物系半導体素子及びその製造方法 | |
US7807521B2 (en) | Nitride semiconductor light emitting device and method of manufacturing the same | |
JP4954536B2 (ja) | 窒化物半導体発光素子 | |
WO2012091311A2 (en) | High efficiency light emitting diode | |
JP3940933B2 (ja) | 窒化物系半導体素子 | |
JP4178410B2 (ja) | 半導体発光素子 | |
JP2008078297A (ja) | GaN系半導体発光素子 | |
JP4058595B2 (ja) | 半導体発光素子及びその製造方法 | |
CN102544290A (zh) | 氮化物半导体发光二极管元件 | |
JPH09326508A (ja) | 半導体光素子 | |
JP4058592B2 (ja) | 半導体発光素子及びその製造方法 | |
JP2000332288A (ja) | 窒化ガリウム系半導体発光素子及びその製造方法 | |
JP4058593B2 (ja) | 半導体発光素子 | |
JP4058594B2 (ja) | 半導体発光素子 | |
JP3777869B2 (ja) | 窒化ガリウム系化合物半導体発光素子 | |
JP2006339629A (ja) | 半導体素子 | |
JP2003115606A (ja) | 半導体発光素子 | |
JPH1079530A (ja) | 窒化ガリウム系化合物半導体発光素子 | |
JP2000174338A (ja) | 窒化ガリウム系化合物半導体発光素子 | |
JP2001345476A (ja) | 窒化ガリウム系化合物半導体発光素子 | |
JP2001345477A (ja) | 窒化ガリウム系化合物半導体発光素子 | |
JP2006040964A (ja) | 半導体発光素子 | |
JP2005094043A (ja) | 窒化ガリウム系化合物半導体発光素子 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 200480024805.4 Country of ref document: CN |
|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BW BY BZ CA CH CN CO CR CU CZ DK DM DZ EC EE EG ES FI GB GD GE GM HR HU ID IL IN IS JP KE KG KP KZ LC LK LR LS LT LU LV MA MD MK MN MW MX MZ NA NI NO NZ PG PH PL PT RO RU SC SD SE SG SK SY TJ TM TN TR TT TZ UA UG US UZ VN YU ZA ZM |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): BW GH GM KE LS MW MZ NA SD SZ TZ UG ZM ZW AM AZ BY KG MD RU TJ TM AT BE BG CH CY DE DK EE ES FI FR GB GR HU IE IT MC NL PL PT RO SE SI SK TR BF CF CG CI CM GA GN GQ GW ML MR SN TD TG |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2005514103 Country of ref document: JP |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 11375964 Country of ref document: US |
|
WWP | Wipo information: published in national office |
Ref document number: 11375964 Country of ref document: US |
|
122 | Ep: pct application non-entry in european phase |