WO2004112125A1 - Procede d'obtention d'une couche tres mince par amincissement par auto-portage provoque - Google Patents
Procede d'obtention d'une couche tres mince par amincissement par auto-portage provoque Download PDFInfo
- Publication number
- WO2004112125A1 WO2004112125A1 PCT/FR2004/050212 FR2004050212W WO2004112125A1 WO 2004112125 A1 WO2004112125 A1 WO 2004112125A1 FR 2004050212 W FR2004050212 W FR 2004050212W WO 2004112125 A1 WO2004112125 A1 WO 2004112125A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- thick layer
- substrate
- implantation
- gaseous species
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006508363A JP4987470B2 (ja) | 2003-06-06 | 2004-06-03 | 自立を誘発することによって薄肉化された極薄層の製造方法 |
US10/558,621 US7776714B2 (en) | 2003-06-06 | 2004-06-03 | Method for production of a very thin layer with thinning by means of induced self-support |
EP04742879.2A EP1631982B1 (fr) | 2003-06-06 | 2004-06-03 | Procede d'obtention d'une couche tres mince par amincissement par auto-portage provoque |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0350207A FR2855910B1 (fr) | 2003-06-06 | 2003-06-06 | Procede d'obtention d'une couche tres mince par amincissement par auto-portage provoque |
FR0350207 | 2003-06-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2004112125A1 true WO2004112125A1 (fr) | 2004-12-23 |
Family
ID=33443291
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/FR2004/050212 WO2004112125A1 (fr) | 2003-06-06 | 2004-06-03 | Procede d'obtention d'une couche tres mince par amincissement par auto-portage provoque |
Country Status (5)
Country | Link |
---|---|
US (1) | US7776714B2 (fr) |
EP (1) | EP1631982B1 (fr) |
JP (1) | JP4987470B2 (fr) |
FR (1) | FR2855910B1 (fr) |
WO (1) | WO2004112125A1 (fr) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2773261B1 (fr) | 1997-12-30 | 2000-01-28 | Commissariat Energie Atomique | Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions |
FR2823596B1 (fr) * | 2001-04-13 | 2004-08-20 | Commissariat Energie Atomique | Substrat ou structure demontable et procede de realisation |
FR2856844B1 (fr) * | 2003-06-24 | 2006-02-17 | Commissariat Energie Atomique | Circuit integre sur puce de hautes performances |
EP1652230A2 (fr) * | 2003-07-29 | 2006-05-03 | S.O.I.Tec Silicon on Insulator Technologies | Procede d' obtention d' une couche mince de qualite accrue par co-implantation et recuit thermique |
FR2922359B1 (fr) * | 2007-10-12 | 2009-12-18 | Commissariat Energie Atomique | Procede de fabrication d'une structure micro-electronique impliquant un collage moleculaire |
FR2925221B1 (fr) | 2007-12-17 | 2010-02-19 | Commissariat Energie Atomique | Procede de transfert d'une couche mince |
ATE555505T1 (de) * | 2008-02-26 | 2012-05-15 | Soitec Silicon On Insulator | Verfahren zur herstellung eines halbleitersubstrats |
FR2934924B1 (fr) * | 2008-08-06 | 2011-04-22 | Soitec Silicon On Insulator | Procede de multi implantation dans un substrat. |
JP5478199B2 (ja) * | 2008-11-13 | 2014-04-23 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
FR2947098A1 (fr) * | 2009-06-18 | 2010-12-24 | Commissariat Energie Atomique | Procede de transfert d'une couche mince sur un substrat cible ayant un coefficient de dilatation thermique different de celui de la couche mince |
US8314018B2 (en) * | 2009-10-15 | 2012-11-20 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
FR2993095B1 (fr) | 2012-07-03 | 2014-08-08 | Commissariat Energie Atomique | Detachement d’une couche autoportee de silicium <100> |
US20170339117A1 (en) * | 2016-05-18 | 2017-11-23 | Nec Platforms, Ltd. | Information system, personal computer, drive device, control method, and program |
JP6652008B2 (ja) | 2016-07-21 | 2020-02-19 | 株式会社デンソー | スプール弁 |
FR3073082B1 (fr) * | 2017-10-31 | 2019-10-11 | Soitec | Procede de fabrication d'un film sur un support presentant une surface non plane |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000048278A1 (fr) * | 1999-02-10 | 2000-08-17 | Commissariat A L'energie Atomique | Procede de formation sur un support d'une couche de silicium a usage optique et mise en oeuvre du procede pour la realisation de composants optiques |
US6246068B1 (en) * | 1995-10-06 | 2001-06-12 | Canon Kabushiki Kaisha | Semiconductor article with porous structure |
US6335258B1 (en) * | 1996-11-05 | 2002-01-01 | Commissariat A L'energie Atomique | Method for making a thin film on a support and resulting structure including an additional thinning stage before heat treatment causes micro-cavities to separate substrate element |
US20020019118A1 (en) * | 1998-02-17 | 2002-02-14 | Chung Chan | Method for non mass selected ion implant profile control |
US6569748B1 (en) * | 1997-03-26 | 2003-05-27 | Canon Kabushiki Kaisha | Substrate and production method thereof |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2738671B1 (fr) * | 1995-09-13 | 1997-10-10 | Commissariat Energie Atomique | Procede de fabrication de films minces a materiau semiconducteur |
KR100232886B1 (ko) * | 1996-11-23 | 1999-12-01 | 김영환 | Soi 웨이퍼 제조방법 |
JPH10223496A (ja) * | 1997-02-12 | 1998-08-21 | Ion Kogaku Kenkyusho:Kk | 単結晶ウエハおよびその製造方法 |
US6162705A (en) * | 1997-05-12 | 2000-12-19 | Silicon Genesis Corporation | Controlled cleavage process and resulting device using beta annealing |
FR2774214B1 (fr) * | 1998-01-28 | 2002-02-08 | Commissariat Energie Atomique | PROCEDE DE REALISATION D'UNE STRUCTURE DE TYPE SEMI-CONDUCTEUR SUR ISOLANT ET EN PARTICULIER SiCOI |
JPH11307472A (ja) * | 1998-04-23 | 1999-11-05 | Shin Etsu Handotai Co Ltd | 水素イオン剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
JP3697106B2 (ja) * | 1998-05-15 | 2005-09-21 | キヤノン株式会社 | 半導体基板の作製方法及び半導体薄膜の作製方法 |
JP3975634B2 (ja) * | 2000-01-25 | 2007-09-12 | 信越半導体株式会社 | 半導体ウェハの製作法 |
US6420243B1 (en) * | 2000-12-04 | 2002-07-16 | Motorola, Inc. | Method for producing SOI wafers by delamination |
JP2002348198A (ja) * | 2001-05-28 | 2002-12-04 | Nissin Electric Co Ltd | 半導体素子エピタキシャル成長用基板及びその製造方法 |
US6566158B2 (en) * | 2001-08-17 | 2003-05-20 | Rosemount Aerospace Inc. | Method of preparing a semiconductor using ion implantation in a SiC layer |
US20030064535A1 (en) * | 2001-09-28 | 2003-04-03 | Kub Francis J. | Method of manufacturing a semiconductor device having a thin GaN material directly bonded to an optimized substrate |
WO2003046993A1 (fr) * | 2001-11-29 | 2003-06-05 | Shin-Etsu Handotai Co.,Ltd. | Procede de production de plaquettes soi |
FR2855909B1 (fr) * | 2003-06-06 | 2005-08-26 | Soitec Silicon On Insulator | Procede d'obtention concomitante d'au moins une paire de structures comprenant au moins une couche utile reportee sur un substrat |
EP1484794A1 (fr) * | 2003-06-06 | 2004-12-08 | S.O.I. Tec Silicon on Insulator Technologies S.A. | Procédé de fabrication d'un substrat auto-porté |
-
2003
- 2003-06-06 FR FR0350207A patent/FR2855910B1/fr not_active Expired - Fee Related
-
2004
- 2004-06-03 JP JP2006508363A patent/JP4987470B2/ja active Active
- 2004-06-03 WO PCT/FR2004/050212 patent/WO2004112125A1/fr active Search and Examination
- 2004-06-03 EP EP04742879.2A patent/EP1631982B1/fr active Active
- 2004-06-03 US US10/558,621 patent/US7776714B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6246068B1 (en) * | 1995-10-06 | 2001-06-12 | Canon Kabushiki Kaisha | Semiconductor article with porous structure |
US6335258B1 (en) * | 1996-11-05 | 2002-01-01 | Commissariat A L'energie Atomique | Method for making a thin film on a support and resulting structure including an additional thinning stage before heat treatment causes micro-cavities to separate substrate element |
US6569748B1 (en) * | 1997-03-26 | 2003-05-27 | Canon Kabushiki Kaisha | Substrate and production method thereof |
US20020019118A1 (en) * | 1998-02-17 | 2002-02-14 | Chung Chan | Method for non mass selected ion implant profile control |
WO2000048278A1 (fr) * | 1999-02-10 | 2000-08-17 | Commissariat A L'energie Atomique | Procede de formation sur un support d'une couche de silicium a usage optique et mise en oeuvre du procede pour la realisation de composants optiques |
Also Published As
Publication number | Publication date |
---|---|
US20070020895A1 (en) | 2007-01-25 |
JP2006527480A (ja) | 2006-11-30 |
FR2855910A1 (fr) | 2004-12-10 |
US7776714B2 (en) | 2010-08-17 |
EP1631982B1 (fr) | 2015-04-08 |
JP4987470B2 (ja) | 2012-07-25 |
EP1631982A1 (fr) | 2006-03-08 |
FR2855910B1 (fr) | 2005-07-15 |
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