WO2004107352A3 - Use of voids between elements in semiconductor structures for isolation - Google Patents

Use of voids between elements in semiconductor structures for isolation Download PDF

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Publication number
WO2004107352A3
WO2004107352A3 PCT/US2004/013986 US2004013986W WO2004107352A3 WO 2004107352 A3 WO2004107352 A3 WO 2004107352A3 US 2004013986 W US2004013986 W US 2004013986W WO 2004107352 A3 WO2004107352 A3 WO 2004107352A3
Authority
WO
WIPO (PCT)
Prior art keywords
elements
storage elements
voids
isolation
semiconductor structures
Prior art date
Application number
PCT/US2004/013986
Other languages
French (fr)
Other versions
WO2004107352A2 (en
Inventor
Jian Chen
Masaaki Higashitani
Original Assignee
Sandisk Corp
Jian Chen
Masaaki Higashitani
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=33450432&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=WO2004107352(A3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Sandisk Corp, Jian Chen, Masaaki Higashitani filed Critical Sandisk Corp
Priority to JP2006532783A priority Critical patent/JP2007501531A/en
Priority to EP04751389A priority patent/EP1625616A2/en
Publication of WO2004107352A2 publication Critical patent/WO2004107352A2/en
Publication of WO2004107352A3 publication Critical patent/WO2004107352A3/en

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/7682Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A flash EEPROM or other type of memory cell array having adjacent charge storage elements is formed with a gas filled void between them in order to reduce the level of capacitive coupling between storage elements, thus reducing cross-coupling between charge storage elements and resulting errors occurring in the data read from the array.
PCT/US2004/013986 2003-05-21 2004-05-03 Use of voids between elements in semiconductor structures for isolation WO2004107352A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2006532783A JP2007501531A (en) 2003-05-21 2004-05-03 Use of voids between elements in semiconductor structures for element isolation.
EP04751389A EP1625616A2 (en) 2003-05-21 2004-05-03 Use of voids between elements in semiconductor structures for isolation

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/443,502 2003-05-21
US10/443,502 US7045849B2 (en) 2003-05-21 2003-05-21 Use of voids between elements in semiconductor structures for isolation

Publications (2)

Publication Number Publication Date
WO2004107352A2 WO2004107352A2 (en) 2004-12-09
WO2004107352A3 true WO2004107352A3 (en) 2005-02-03

Family

ID=33450432

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/013986 WO2004107352A2 (en) 2003-05-21 2004-05-03 Use of voids between elements in semiconductor structures for isolation

Country Status (7)

Country Link
US (2) US7045849B2 (en)
EP (1) EP1625616A2 (en)
JP (1) JP2007501531A (en)
KR (1) KR20060017803A (en)
CN (1) CN100428440C (en)
TW (1) TWI267943B (en)
WO (1) WO2004107352A2 (en)

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US20040232496A1 (en) 2004-11-25
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