WO2004099960A1 - Fully integrated dc-dc converter utilizing on-chip high frequency inductors - Google Patents

Fully integrated dc-dc converter utilizing on-chip high frequency inductors Download PDF

Info

Publication number
WO2004099960A1
WO2004099960A1 PCT/US2004/011641 US2004011641W WO2004099960A1 WO 2004099960 A1 WO2004099960 A1 WO 2004099960A1 US 2004011641 W US2004011641 W US 2004011641W WO 2004099960 A1 WO2004099960 A1 WO 2004099960A1
Authority
WO
WIPO (PCT)
Prior art keywords
conductor
die
lower portions
set forth
inductor
Prior art date
Application number
PCT/US2004/011641
Other languages
French (fr)
Inventor
Donald Gardner
Volkan Kursun
Siva Narendra
Original Assignee
Intel Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corporation filed Critical Intel Corporation
Publication of WO2004099960A1 publication Critical patent/WO2004099960A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/10Inductors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227Inductive arrangements or effects of, or between, wiring layers
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to voltage regulator circuits, and more particularly, to fully integrated DC-to-DC voltage regulators.
  • Switched regulators making use of inductors can offer an operating efficiency greater than 90%.
  • Voltage regulators are usually designed with operating frequencies in a range of 0.1 to 10 MHz. But the inductance needed for switched voltage regulators using inductors operating in this frequency range is too large for an on-chip inductor. Increasing the operating frequency still leads to inductors that are too large for on-chip placement without the use of magnetic material in the inductor.
  • magnetic materials are typically not used in high- frequency inductors because their frequency range has to date been limited to much less than 100 MHz.
  • a processor may be designed so that high performance circuits within the processor use a higher supply voltage than that used for low performance circuits within the processor. Modeling has shown that at least a 30% savings in power can be achieved by using a dual power supply in a microprocessor. Using one or more off-chip voltage regulators to provide two circuit supply voltages to a processor die can lead to an increase in complexity, pin count, and cost.
  • Fig. 1 is a computer system employing an embodiment of the present invention.
  • Fig. 2 is a DC-to-DC converter having an inductor according to an embodiment of the present invention.
  • FIG. 3 illustrates the structure of an inductor according to an embodiment of the present invention.
  • FIG. 4 illustrates another structure of an inductor according to an embodiment of the present invention. Description of Embodiments
  • Embodiments of the present invention may be integrated on a processor, or used in computer systems, such as that in Fig. 1.
  • microprocessor die 102 comprises many sub-blocks, such as arithmetic logic unit (ALU) 104 and on-die cache 106.
  • ALU arithmetic logic unit
  • Microprocessor 102 may also communicate to other levels of cache, such as off-die cache 108.
  • Higher memory hierarchy levels, such as system memory 110, are accessed via host bus 112 and chipset 114.
  • other off-die functional units such as graphics accelerator 116 and network interface controller (NIC) 118, to name just a few, may communicate with microprocessor 102 via appropriate busses or ports.
  • NIC network interface controller
  • Power supply 120 provides a supply voltage to microprocessor 102 via power bus 122.
  • Power supply 120 may be part of a power distribution system providing power to other modules, but for simplicity such connections are not shown.
  • Embodiments of the present invention are realized in voltage regulator 124.
  • Regulator 124 is an on-chip DC-to-DC switching regulator comprising an inductor which is switched ON and OFF at a relatively high switching frequency. The switching frequency may be much higher than 100 MHz, and it is expected that embodiments may have switching frequencies greater than 1GHz.
  • Fig. 2 provides one example of a circuit topology for regulator 124, which is recognized as a Buck converter.
  • Switch controller 202 senses the load voltage at output port 204 and compares it with a reference voltage V ref .
  • switches 206 and 208 are switched ON and OFF by switch controller 202 at a switching frequency and with a duty factor so as to maintain the sensed output voltage close to V re f.
  • Switches 206 and 208 may be realized by field effect transistors.
  • Inductor 210 comprises magnetic material, such as amorphous CoZrTa,
  • CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amorphous cobalt alloys may comprise various atomic percentages of its constituent elements.
  • a particular embodiment using the amorphous cobalt alloy CoZrTa may have 4% Zr, 4.5% Ta, with the rest being Co.
  • the range for Zr may be from 3% to 12% and the range for Ta may be from 0% to 10%.
  • inductor 210 is such that it has a relatively low resistance.
  • inductor 210 has a structure shown in Fig. 3.
  • Fig. 3 shows a portion of a low resistance inductor comprising a first sub-structure 302 and a second sub-structure 304. These sub-structures are substantially parallel to each other, and each comprises a conductor 306. Above and below conductor 306 are magnetic films 308.
  • Insulating layers 310 are between magnetic films 308 and conductor 306.
  • conductor 306 and magnetic films 308 may be viewed as comprising "upper” portions and “lower” portions.
  • An upper portion of conductor 306 or magnetic film 310 is that part of conductor 306 or magnetic film 310 substantially parallel to and above insulating pedestals 312.
  • Insulating pedestals 312 are insulating layers deposited above substrate 314.
  • a lower portion of conductor 306 or magnetic film 310 is that part of conductor 306 or magnetic film which is substantially parallel to substrate 314 but not above pedestals 312.
  • the upper and lower portions of conductor 306 and magnetic film 308 of a sub-structure form a periodic structure.
  • sub-structures 302 and 304 are joined by connecting sub-structure 305, so that conductive layers 306 in substructures 302 and 304 are electrically connected to each other.
  • DC current flow in sub-structure 302 is opposite in direction to DC cu ⁇ ent flow in sub-structure 304.
  • the upper magnetic layers in sub-structures 302 and 304 are also in physical contact via connecting sub-structure 305, but may not be for other embodiments.
  • Fig. 3 shows the upper and lower portions of conductor 306 connected to each other by "vertically" oriented conductors 316.
  • the upper and lower portions of conductor 306 may be electrically connected by vias.
  • the upper and lower portions of conductor 306 may be electrically connected by conductive layers arranged in a stepped manner over pedestals 312.
  • the vertically oriented conductors 316 in Fig. 3 are meant to pictorially represent these and other methods by which the upper and lower portions of conductor 306 are in electrical contact, and it is to be understood that reference to “vertical conductor” is meant to include reference to a conductor formed by vias, a conductor that is stepped, or a conductor of other shape formed by processing techniques to connect upper and lower portions of the conductor.
  • FIG. 3 shows the upper and lower portions of upper magnetic film 310 connected by vertically oriented magnetic films 317.
  • vertically oriented magnetic films 317 may be refe ⁇ ed to as vertical magnetic films and may represent structures that are stepped, as well other structures formed by processing techniques to connect upper and lower portions of upper magnetic film 310.
  • Insulating pedestals 312 for two adjacent sub-structures are arranged so that the insulating pedestals in one sub-structure are not aligned with the insulating pedestals of the other sub-structure.
  • the upper (lower) portions of the conductor and magnetic film of one sub-structure are not aligned with the upper (lower) portions of the conductor and magnetic film of the other sub-structure.
  • This a ⁇ angement allows for an increase in inductance.
  • define a trench as that region bounded by two adjacent vertical magnetic films 317 and the lower portion of the magnetic film 310 therebetween.
  • the arrangement of alternating pedestals and trenches in a sub-structure, in which the trenches of one sub-structure align with the pedestals of an adjacent sub- structure allows for the magnetic flux along the trenches of one sub-structure to align with the magnetic flux through the pedestals of an adjacent sub-structure. This alignment of flux increases the inductance.
  • the conductors and magnetic material may be approximately 200 microns long and 1mm wide, the distance between two adjacent sub-structures may be approximately 20 microns, the thickness of the conductor and magnetic material is approximately 1 to 2 microns, and the height (depth) of a pedestal (trench) is approximately 2 to 4 microns.
  • Other embodiments may be realized by utilizing inductors with various structures. For example, an integrated inductor is shown in Fig. 4 which has a simpler structure than that of Fig. 3. A simple, wide line conductor 402 is surrounded by high- frequency magnetic material 404. An oxide 406 immediately surrounds conductor 402 and insulates conductor 402 from magnetic material 404.
  • Typical dimensions for the structure of Fig. 4 are 100 microns for the overall width w , 1 mm for the overall length / , and 8 microns for the height h .
  • a typical thickness for magnetic material 404 and conductor 402 is 2 microns. These dimensions merely serve as an example, and other embodiments may have different dimensions. [0023] Various modifications may be made to the disclosed embodiments without departing from the scope of the invention as claimed below.
  • the integrated DC-to-DC switching regulator need not be on the same die as microprocessor 102, but may be integrated on another die with interconnects to the microprocessor die.
  • the phrase "A is connected to B" means that A and B are directly connected to each other by way of an interconnect, such as metal or polysilicon. This is to be distinguished from the phrase "A is coupled to B", which means that the connection between A and B may not be direct. That is, there may be an active device or passive element between A and B.

Abstract

A fully integrated DC-to-DC switching converter having an inductor, where the inductor has magnetic material that may be amorphous CoZrTa, CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amorphous cobalt alloys. The magnetic material allows for a relatively high switching frequency. In one embodiment, the inductor has two sub-structures, where each of the two sub-structures are parallel to each other and each includes a conductor having upper and lower portions. The conductors of the two sub-structures are electrically connected to each other, and the upper and lower portions are arranged so that magnetic flux from one of the sub-structures couples with the magnetic flux from the other sub-structure so as to provide a relatively high inductance with small form factor. In another embodiment, the inductor is a simple conductor surrounded by high-frequency magnetic material. In both structures, oxide insulates the conductors from the magnetic material.

Description

FULLY INTEGRATED DC-DC CONVERTER UTILIZING ON-CHIP HIGH FREQUENCY INDUCTORS
Field [0001] The present invention relates to voltage regulator circuits, and more particularly, to fully integrated DC-to-DC voltage regulators.
Background [0002] The vast majority of voltage regulators (converters) used in high performance electronics may be classified into two basic types: linear and switched regulators. Switched regulators are much more efficient than linear regulators because the pass transistors used in switched regulators do not continuously draw current. The best efficiency achievable with a linear regulator, even assuming ideal (lossless) components, is Nout/Nin, where Nout is the regulated output voltage and N;n is the input voltage to the voltage regulator. Linear regulators may be a good choice for applications in which the difference between the output voltage Nout and the original supply input voltage N;n is not too large. But when the regulated voltage is sufficiently less than the input voltage, switched regulators are usually the preferred option, particular where power savings is important. [0003] Switched regulators making use of inductors, such as a Buck switching regulator, can offer an operating efficiency greater than 90%. Presently, such voltage regulators are not fully integrated on the processor die for several reasons. Voltage regulators are usually designed with operating frequencies in a range of 0.1 to 10 MHz. But the inductance needed for switched voltage regulators using inductors operating in this frequency range is too large for an on-chip inductor. Increasing the operating frequency still leads to inductors that are too large for on-chip placement without the use of magnetic material in the inductor. However, magnetic materials are typically not used in high- frequency inductors because their frequency range has to date been limited to much less than 100 MHz. [0004] As processor technology scales to smaller dimensions, supply voltages to circuits within a processor will also scale to smaller values. The power consumption of processors has also been increasing. Using an external power supply or an off-chip voltage regulator to provide a small supply voltage to a processor with a large power consumption will lead to a larger total electrical current being supplied to the processor. This will increase the electrical current per pin, or the total number of pins needed. Currently, the number of pins limits the scaling of ULSI circuits. An increase in supply current can also lead to an increase in resistive voltage drops across various off-chip and on-chip interconnects. [0005] Furthermore, there has been interest in using two different supply voltages in a processor to reduce power consumption and pin count. As an example, a processor may be designed so that high performance circuits within the processor use a higher supply voltage than that used for low performance circuits within the processor. Modeling has shown that at least a 30% savings in power can be achieved by using a dual power supply in a microprocessor. Using one or more off-chip voltage regulators to provide two circuit supply voltages to a processor die can lead to an increase in complexity, pin count, and cost.
[0006] Consequently, as technology scales to smaller voltages, and for dual voltage processors, there would be advantages to integrating switched voltage regulators on the die.
Brief Description of the Drawings [0007] Fig. 1 is a computer system employing an embodiment of the present invention. [0008] Fig. 2 is a DC-to-DC converter having an inductor according to an embodiment of the present invention.
[0009] Fig. 3 illustrates the structure of an inductor according to an embodiment of the present invention.
[0010] Fig. 4 illustrates another structure of an inductor according to an embodiment of the present invention. Description of Embodiments
[0011] Embodiments of the present invention may be integrated on a processor, or used in computer systems, such as that in Fig. 1. In Fig. 1, microprocessor die 102 comprises many sub-blocks, such as arithmetic logic unit (ALU) 104 and on-die cache 106. Microprocessor 102 may also communicate to other levels of cache, such as off-die cache 108. Higher memory hierarchy levels, such as system memory 110, are accessed via host bus 112 and chipset 114. In addition, other off-die functional units, such as graphics accelerator 116 and network interface controller (NIC) 118, to name just a few, may communicate with microprocessor 102 via appropriate busses or ports. [0012] Power supply 120 provides a supply voltage to microprocessor 102 via power bus 122. Power supply 120 may be part of a power distribution system providing power to other modules, but for simplicity such connections are not shown. Embodiments of the present invention are realized in voltage regulator 124. [0013] Regulator 124 is an on-chip DC-to-DC switching regulator comprising an inductor which is switched ON and OFF at a relatively high switching frequency. The switching frequency may be much higher than 100 MHz, and it is expected that embodiments may have switching frequencies greater than 1GHz. Fig. 2 provides one example of a circuit topology for regulator 124, which is recognized as a Buck converter. Switch controller 202 senses the load voltage at output port 204 and compares it with a reference voltage Vref. In response to this comparison, switches 206 and 208 are switched ON and OFF by switch controller 202 at a switching frequency and with a duty factor so as to maintain the sensed output voltage close to Vref. Switches 206 and 208 may be realized by field effect transistors. [0014] Inductor 210 comprises magnetic material, such as amorphous CoZrTa,
CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amorphous cobalt alloys. An amorphous alloy used in a particular embodiment may comprise various atomic percentages of its constituent elements. For example, a particular embodiment using the amorphous cobalt alloy CoZrTa may have 4% Zr, 4.5% Ta, with the rest being Co. For some other embodiments using CoZrTa, the range for Zr may be from 3% to 12% and the range for Ta may be from 0% to 10%. Other embodiments may use the cobalt alloy CoFeHfO, with 19.1% Fe, 14.5% Hf, and 22.1% O, or the Cobalt alloy CoFeAlO, with 51.1% Co, 21.9% Fe, and 27% Al. These merely serve as particular examples. [0015] In prefeπed embodiments, the structure of inductor 210 is such that it has a relatively low resistance. For some embodiments, inductor 210 has a structure shown in Fig. 3. Fig. 3 shows a portion of a low resistance inductor comprising a first sub-structure 302 and a second sub-structure 304. These sub-structures are substantially parallel to each other, and each comprises a conductor 306. Above and below conductor 306 are magnetic films 308. Insulating layers 310 are between magnetic films 308 and conductor 306. [0016] For each sub-structure in Fig. 3, conductor 306 and magnetic films 308 may be viewed as comprising "upper" portions and "lower" portions. An upper portion of conductor 306 or magnetic film 310 is that part of conductor 306 or magnetic film 310 substantially parallel to and above insulating pedestals 312. Insulating pedestals 312 are insulating layers deposited above substrate 314. A lower portion of conductor 306 or magnetic film 310 is that part of conductor 306 or magnetic film which is substantially parallel to substrate 314 but not above pedestals 312. For some embodiments, the upper and lower portions of conductor 306 and magnetic film 308 of a sub-structure form a periodic structure.
[0017] As seen from Fig. 3, sub-structures 302 and 304 are joined by connecting sub-structure 305, so that conductive layers 306 in substructures 302 and 304 are electrically connected to each other. As a result, DC current flow in sub-structure 302 is opposite in direction to DC cuπent flow in sub-structure 304. For the embodiment of Fig. 3, the upper magnetic layers in sub-structures 302 and 304 are also in physical contact via connecting sub-structure 305, but may not be for other embodiments. Within substructures 302 and 304, Fig. 3 shows the upper and lower portions of conductor 306 connected to each other by "vertically" oriented conductors 316. In practice, the upper and lower portions of conductor 306 may be electrically connected by vias. In another embodiment, the upper and lower portions of conductor 306 may be electrically connected by conductive layers arranged in a stepped manner over pedestals 312. The vertically oriented conductors 316 in Fig. 3 are meant to pictorially represent these and other methods by which the upper and lower portions of conductor 306 are in electrical contact, and it is to be understood that reference to "vertical conductor" is meant to include reference to a conductor formed by vias, a conductor that is stepped, or a conductor of other shape formed by processing techniques to connect upper and lower portions of the conductor.
[0018] Similarly, Fig. 3 shows the upper and lower portions of upper magnetic film 310 connected by vertically oriented magnetic films 317. As stated with respect to vertical conductors 316, vertically oriented magnetic films 317 may be refeπed to as vertical magnetic films and may represent structures that are stepped, as well other structures formed by processing techniques to connect upper and lower portions of upper magnetic film 310. [0019] Insulating pedestals 312 for two adjacent sub-structures are arranged so that the insulating pedestals in one sub-structure are not aligned with the insulating pedestals of the other sub-structure. As a result, the upper (lower) portions of the conductor and magnetic film of one sub-structure are not aligned with the upper (lower) portions of the conductor and magnetic film of the other sub-structure. This aπangement allows for an increase in inductance. To discuss this further, define a trench as that region bounded by two adjacent vertical magnetic films 317 and the lower portion of the magnetic film 310 therebetween. The arrangement of alternating pedestals and trenches in a sub-structure, in which the trenches of one sub-structure align with the pedestals of an adjacent sub- structure, allows for the magnetic flux along the trenches of one sub-structure to align with the magnetic flux through the pedestals of an adjacent sub-structure. This alignment of flux increases the inductance. The structure of Fig. 3 is also described in U.S. patent 6,452,247. [0020] It is found that integrated inductors according to the embodiment of Fig. 3 having wide lines with magnetic material can provide an inductance in the 5 to 100 pH range. Inductances in this range can be used in switching regulators that switch in the 10 MHz to 1 GHz range. With a structure that has a relatively wide width compared to length, the resistance of inductor of Fig. 3 may be made relatively small. For some embodiments, but not all, the conductors and magnetic material may be approximately 200 microns long and 1mm wide, the distance between two adjacent sub-structures may be approximately 20 microns, the thickness of the conductor and magnetic material is approximately 1 to 2 microns, and the height (depth) of a pedestal (trench) is approximately 2 to 4 microns. [0021] Other embodiments may be realized by utilizing inductors with various structures. For example, an integrated inductor is shown in Fig. 4 which has a simpler structure than that of Fig. 3. A simple, wide line conductor 402 is surrounded by high- frequency magnetic material 404. An oxide 406 immediately surrounds conductor 402 and insulates conductor 402 from magnetic material 404. That is, the top, bottom, and sides of conductor 402 are suπounded by oxide 406 and high-frequency magnetic material 404, whereas the edges of conductor 402 are available for connection to interconnects, not shown. Magnetic material 404 is chosen from the same set of high-frequency materials as discussed for Fig. 3. Other embodiments may not need oxide 406. For example, magnetic material may immediately suπound conductor 402 if the magnetic material itself is insulated from other conductors, or if the magnetic material is itself an insulator. [0022] Typical dimensions for the structure of Fig. 4 are 100 microns for the overall width w , 1 mm for the overall length / , and 8 microns for the height h . A typical thickness for magnetic material 404 and conductor 402 is 2 microns. These dimensions merely serve as an example, and other embodiments may have different dimensions. [0023] Various modifications may be made to the disclosed embodiments without departing from the scope of the invention as claimed below. For example, the integrated DC-to-DC switching regulator need not be on the same die as microprocessor 102, but may be integrated on another die with interconnects to the microprocessor die. Furthermore, it is to be understood in these letters patent that the phrase "A is connected to B" means that A and B are directly connected to each other by way of an interconnect, such as metal or polysilicon. This is to be distinguished from the phrase "A is coupled to B", which means that the connection between A and B may not be direct. That is, there may be an active device or passive element between A and B.

Claims

What is claimed is:
1. A die comprising: an inductor comprising magnetic material selected from the group consisting of amorphous CoZrTa, CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amorphous cobalt alloys; a switch to energize the inductor; and a switch controller to switch the switch ON and OFF at a frequency and with a duty cycle, wherein the frequency is greater than 10 MHz.
2. The die as set forth in claim 1, wherein the frequency is greater than 100MHz.
3. The die as set forth in claim 1, wherein the frequency is greater than 1GHz.
4. The die as set forth in claim 2, the inductor further comprising: a first sub-structure comprising a first conductor, the first conductor comprising upper portions and lower portions; and a second sub-structure in electrical contact with the first conductor and comprising a second conductor, the second conductor comprising upper portions and lower portions; wherein a magnetic flux due to a DC current flow in the inductor is such that the magnetic flux due to the DC current flow in the lower portions of the first conductor is aligned with the magnetic flux due to the DC cuπent flow in the upper portions of the second conductor, and the magnetic flux due to the DC cuπent flow in the upper portions of the first conductor is aligned with the magnetic flux due to the DC current flow in the lower portions of the second conductor.
5. The die as set forth in claim 4, wherein the magnetic material comprises upper portions deposited above the upper portions of the first and second conductors, and comprises lower portions deposited above the lower portions of the first and second conductors.
6. The die as set forth in claim 2, the inductor further comprising: a conductor having a top, a bottom, a first side, and a second side; and an oxide immediately surrounding the top, bottom, first and second sides of the conductor; wherein the magnetic material suπounds the oxide such that the conductor is insulated from the magnetic material.
7. The die as set forth in claim 2, the inductor further comprising: a conductor having a top, a bottom, a first side, and a second side; wherein the magnetic material immediately suπounds the top, bottom, first and second sides of the conductor.
8. The die as set forth in claim 1, the inductor further comprising: a first sub-structure comprising a first conductor, the first conductor comprising upper portions and lower portions; and a second sub-structure in electrical contact with the first conductor and comprising a second conductor, the second conductor comprising upper portions and lower portions; wherein a magnetic flux due to a DC cuπent flow in the inductor is such that the magnetic flux due to the DC current flow in the lower portions of the first conductor is aligned with the magnetic flux due to the DC current flow in the upper portions of the second conductor, and the magnetic flux due to the DC current flow in the upper portions of the first conductor is aligned with the magnetic flux due to the DC current flow in the lower portions of the second conductor.
9. The die as set forth in claim 8, wherein the magnetic material comprises upper portions deposited above the upper portions of the first and second conductors, and comprises lower portions deposited above the lower portions of the first and second conductors.
10. The die as set forth in claim 1, the inductor further comprising: a conductor having a top, a bottom, a first side, and a second side; and an oxide suπounding the top, bottom, first and second sides of the conductor; wherein the magnetic material suπounds the oxide such that the conductor is insulated from the magnetic material.
11. The die as set forth in claim 1 , the inductor further comprising: a conductor having a top, a bottom, a first side, and a second side; wherein the magnetic material immediately suπounds the top, bottom, first and second sides of the conductor.
12. A die comprising a DC-to-DC switching converter, the converter comprising an inductor comprising: magnetic material selected from the group consisting of amorphous CoZrTa, CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amorphous cobalt alloys; a first sub-structure comprising a first conductor, the first conductor comprising upper portions and lower portions; and a second sub-structure in electrical contact with the first conductor and comprising a second conductor, the second conductor comprising upper portions and lower portions; wherein a magnetic flux due to a DC current flow in the inductor is such that the magnetic flux due to the DC cuπent flow in the lower portions of the first conductor is aligned with the magnetic flux due to the DC cuπent flow in the upper portions of the second conductor, and the magnetic flux due to the DC current flow in the upper portions of the first conductor is aligned with the magnetic flux due to the DC current flow in the lower portions of the second conductor.
13. The die as set forth in claim 12, wherein the magnetic material comprises upper portions deposited above the upper portions of the first and second conductors, and comprises lower portions deposited above the lower portions of the first and second conductors.
14. A die comprising a DC-to-DC switching converter, the converter comprising an inductor comprising: magnetic material selected from the group consisting of amorphous CoZrTa, CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amorphous cobalt alloys; a first sub-structure comprising a first set of pedestals and a first conductor, the first conductor comprising upper portions deposited above the first set of pedestals and comprising lower portions defining a first set of trenches; and a second sub-structure in electrical contact with the first conductor and comprising a second set of pedestals and a second conductor, the second conductor comprising upper portions deposited above the second set of pedestals and comprising lower portions to define a second set of trenches; wherein the first set of trenches are aligned with the second set of pedestals and the first set of pedestals are aligned with the second set of trenches.
15. The die as set forth in claim 14, wherein the magnetic material comprises upper portions deposited above the upper portions of the first and second conductors, and comprises lower portions deposited above the lower portions of the first and second conductors.
16. The die as set forth in claim 15, further comprising a switch controller to switch the DC-to-DC switching converter at a switching frequency greater than 10 MHz.
17. The die as set forth in claim 16, wherein the switching frequency is greater than 100MHz.
18. The die as set forth in claim 16, wherein the switching frequency is greater than 1GHz.
19. The die as set forth in claim 14, further comprising a switch controller to switch the DC-to-DC switching converter at a switching frequency greater than 10 MHz.
20. The die as set forth in claim 19, wherein the switching frequency is greater than 100MHz.
21. The die as set forth in claim 19, wherein the switching frequency is greater than 1GHz.
22. A die comprising a DC-to-DC switching converter, the converter comprising: an inductor comprising magnetic material selected from the group consisting of amoφhous CoZrTa, CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amoφhous cobalt alloys; and a switch controller to switch the DC-to-DC switching converter at a switching frequency greater than 10 MHz.
23. The die as set forth in claim 22, wherein the switching frequency is greater than 100 MHz.
24. The die as set forth in claim 22, wherein the switching frequency is greater than 1GHz.
25. A computer system comprising: a die comprising a microprocessor core; and memory not on the die; wherein the die further comprises a DC-to-DC switching converter, the converter comprising: an inductor comprising magnetic material selected from the group consisting of amoφhous CoZrTa, CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amoφhous cobalt alloys; and a switch controller to switch the DC-to-DC switching converter at a switching frequency greater than 10 MHz.
26. The computer system as set forth in claim 25, the inductor further comprising: a first sub-structure comprising a first conductor, the first conductor comprising upper portions and lower portions; and a second sub-structure in electrical contact with the first conductor and comprising a second conductor, the second conductor comprising upper portions and lower portions; wherein a magnetic flux due to a DC current flow in the inductor is such that the magnetic flux due to the DC cuπent flow in the lower portions of the first conductor is aligned with the magnetic flux due to the DC current flow in the upper portions of the second conductor, and the magnetic flux due to the DC cuπent flow in the upper portions of the first conductor is aligned with the magnetic flux due to the DC current flow in the lower portions of the second conductor.
27. The computer system as set forth in claim 25, the inductor further comprising: a conductor having a top, a bottom, a first side, and a second side; and an oxide suπounding the top, bottom, first and second sides of the conductor; wherein the magnetic material surrounds the oxide such that the conductor is insulated from the magnetic material.
28. The die as set forth in claim 25, the inductor further comprising: a conductor having a top, a bottom, a first side, and a second side; wherein the magnetic material immediately suπounds the top, bottom, first and second sides of the conductor.
PCT/US2004/011641 2003-05-05 2004-04-14 Fully integrated dc-dc converter utilizing on-chip high frequency inductors WO2004099960A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/430,627 2003-05-05
US10/430,627 US7202648B2 (en) 2003-05-05 2003-05-05 Fully integrated DC-to-DC regulator utilizing on-chip inductors with high frequency magnetic materials

Publications (1)

Publication Number Publication Date
WO2004099960A1 true WO2004099960A1 (en) 2004-11-18

Family

ID=33416287

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/011641 WO2004099960A1 (en) 2003-05-05 2004-04-14 Fully integrated dc-dc converter utilizing on-chip high frequency inductors

Country Status (3)

Country Link
US (2) US7202648B2 (en)
TW (1) TWI249901B (en)
WO (1) WO2004099960A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8541994B2 (en) 2009-12-18 2013-09-24 Realtek Semiconductor Corp. Switched-mode power supply

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7482792B2 (en) * 2005-06-14 2009-01-27 Intel Corporation IC with fully integrated DC-to-DC power converter
US7598630B2 (en) * 2005-07-29 2009-10-06 Intel Corporation IC with on-die power-gating circuit
US20070262402A1 (en) * 2006-05-11 2007-11-15 Park Chang-Min Integrated inductor with higher moment magnetic via
US7949887B2 (en) 2006-11-01 2011-05-24 Intel Corporation Independent power control of processing cores
US8397090B2 (en) * 2006-12-08 2013-03-12 Intel Corporation Operating integrated circuit logic blocks at independent voltages with single voltage supply
US20080143408A1 (en) 2006-12-19 2008-06-19 Fabrice Paillet Pulse width modulator
US8212536B2 (en) * 2009-12-23 2012-07-03 R2 Semiconductor, Inc. Stacked NMOS DC-to-DC power conversion
US9035625B2 (en) 2009-12-23 2015-05-19 R2 Semiconductor Common cascode routing bus for high-efficiency DC-to-DC conversion
US8233250B2 (en) 2009-12-23 2012-07-31 R2 Semiconductor, Inc. Over voltage protection of switching converter
TW201316663A (en) * 2011-10-12 2013-04-16 Hon Hai Prec Ind Co Ltd Connector module and processor module using the same
WO2013101131A1 (en) 2011-12-29 2013-07-04 Intel Corporation Integrated inductor for integrated circuit devices
US9229466B2 (en) 2011-12-31 2016-01-05 Intel Corporation Fully integrated voltage regulators for multi-stack integrated circuit architectures
US9921640B2 (en) 2012-09-28 2018-03-20 Intel Corporation Integrated voltage regulators with magnetically enhanced inductors
CN110399031A (en) * 2019-06-28 2019-11-01 武汉高德红外股份有限公司 The method and board of power consumption are reduced based on integrated form boost-buck power chip

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6291305B1 (en) * 1999-06-11 2001-09-18 S3 Graphics Co., Ltd. Method for implementing resistance, capacitance and/or inductance in an integrated circuit
US6429632B1 (en) * 2000-02-11 2002-08-06 Micron Technology, Inc. Efficient CMOS DC-DC converters based on switched capacitor power supplies with inductive current limiters
US20030005572A1 (en) * 1999-11-23 2003-01-09 Gardner Donald S. Integrated inductor
US20030006474A1 (en) * 1999-11-23 2003-01-09 Intel Corporation Apparatus and methods for fabricating inductor for integrated circuit or integrated circuit package

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4455545A (en) * 1982-11-05 1984-06-19 Sperry Corporation High frequency output inductor for inverter power supply
JPS59191485A (en) * 1983-04-13 1984-10-30 Kosuke Harada Low loss high frequency inverter
US5559360A (en) * 1994-12-19 1996-09-24 Lucent Technologies Inc. Inductor for high frequency circuits
JP3600415B2 (en) * 1997-07-15 2004-12-15 株式会社東芝 Distributed constant element
US6870456B2 (en) * 1999-11-23 2005-03-22 Intel Corporation Integrated transformer
US6891461B2 (en) * 1999-11-23 2005-05-10 Intel Corporation Integrated transformer
US6531945B1 (en) * 2000-03-10 2003-03-11 Micron Technology, Inc. Integrated circuit inductor with a magnetic core

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6291305B1 (en) * 1999-06-11 2001-09-18 S3 Graphics Co., Ltd. Method for implementing resistance, capacitance and/or inductance in an integrated circuit
US20030005572A1 (en) * 1999-11-23 2003-01-09 Gardner Donald S. Integrated inductor
US20030006474A1 (en) * 1999-11-23 2003-01-09 Intel Corporation Apparatus and methods for fabricating inductor for integrated circuit or integrated circuit package
US6429632B1 (en) * 2000-02-11 2002-08-06 Micron Technology, Inc. Efficient CMOS DC-DC converters based on switched capacitor power supplies with inductive current limiters

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
MATSUMOTO S ET AL: "INTEGRATION OF A POWER SUPPLY FOR SYSTEM-ON-CHIP", IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS, COMMUNICATIONS AND COMPUTER SCIENCES, INSTITUTE OF ELECTRONICS INFORMATION AND COMM. ENG. TOKYO, JP, vol. E80-A, no. 2, 1 February 1997 (1997-02-01), pages 276 - 282, XP000752158, ISSN: 0916-8508 *
SHIRAKAWA K ET AL: "THIN FILM CLOTH-STRUCTURED INDUCTOR FOR MAGNETIC INTEGRATED CIRCUIT", IEEE TRANSACTIONS ON MAGNETICS, IEEE INC. NEW YORK, US, vol. 26, no. 5, 1 September 1990 (1990-09-01), pages 2262 - 2264, XP000150520, ISSN: 0018-9464 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8541994B2 (en) 2009-12-18 2013-09-24 Realtek Semiconductor Corp. Switched-mode power supply
TWI416855B (en) * 2009-12-18 2013-11-21 Realtek Semiconductor Corp Switching power supply

Also Published As

Publication number Publication date
TWI249901B (en) 2006-02-21
US20040222773A1 (en) 2004-11-11
US7202648B2 (en) 2007-04-10
TW200427196A (en) 2004-12-01
US20050200338A1 (en) 2005-09-15

Similar Documents

Publication Publication Date Title
US20050200338A1 (en) Fully integrated DC-to-DC regulator utilizing on-chip inductors with high frequency magnetic materials
US8471667B2 (en) On-die micro-transformer structures with magnetic materials
US10028385B2 (en) Method of manufacturing a processor
US7098766B2 (en) Magnetic material for transformers and/or inductors
US7505294B2 (en) Tri-level inverter
US9564264B2 (en) High frequency integrated point-of-load power converter with embedded inductor substrate
US11437910B2 (en) Power module
US7443692B2 (en) Power converter architecture employing at least one capacitor across a DC bus
US8368501B2 (en) Integrated inductors
US10483249B2 (en) Integrated passive devices on chip
WO2007018856A1 (en) Ic with on-die power-gating circuit
CN104851845B (en) The integrated antenna package of parasitic loop inductance with reduction
US7586756B2 (en) Split thin film capacitor for multiple voltages
WO2017005505A1 (en) High power density inverter (ii)
US6597593B1 (en) Powering IC chips using AC signals
CN108111016B (en) Power module
Hofsajer et al. A new manufacturing and packaging technology for the integration of power electronics
Mezhiba et al. Inductance/area/resistance tradeoffs in high performance power distribution grids
US9590514B1 (en) Carbon nanotube-based integrated power converters
EP3171684B1 (en) High power density inverter (ii)
EP4312237A1 (en) Multi-phase power converter
US11357101B2 (en) Double inductor integrated power module for high current applications
EP3809460A1 (en) Electronic system and processor substrate having an embedded power device module
TW202335420A (en) Low-profile power module
CN115424997A (en) Integrated substrate and power integrated circuit

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): BW GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase