WO2004084224A3 - Magnetic tunneling junction cell array with shared reference layer for mram applications. - Google Patents

Magnetic tunneling junction cell array with shared reference layer for mram applications. Download PDF

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Publication number
WO2004084224A3
WO2004084224A3 PCT/US2004/007556 US2004007556W WO2004084224A3 WO 2004084224 A3 WO2004084224 A3 WO 2004084224A3 US 2004007556 W US2004007556 W US 2004007556W WO 2004084224 A3 WO2004084224 A3 WO 2004084224A3
Authority
WO
WIPO (PCT)
Prior art keywords
reference layer
magnetic elements
cell array
layer
tunneling junction
Prior art date
Application number
PCT/US2004/007556
Other languages
French (fr)
Other versions
WO2004084224A2 (en
Inventor
David Tsang
Original Assignee
Applied Spintronics Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Spintronics Tech Inc filed Critical Applied Spintronics Tech Inc
Publication of WO2004084224A2 publication Critical patent/WO2004084224A2/en
Publication of WO2004084224A3 publication Critical patent/WO2004084224A3/en

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers

Abstract

A method and system for providing a magnetic memory is disclosed. The method and system include providing a plurality of magnetic elements and a plurality of reference layers. Each of the magnetic elements includes a free layer and a spacer layer. Each of the reference layers is coupled with a corresponding portion of the magnetic elements. The reference layers are ferromagnetic. A portion of each reference layer functions as at least a portion of a pinned layer for each of the corresponding portion of the magnetic elements. The portion of each of the plurality of reference layers also functions as a write line for the corresponding portion of the plurality of magnetic elements. The spacer layer resides between the free layer of each of the plurality of magnetic elements and the reference layer.
PCT/US2004/007556 2003-03-14 2004-03-12 Magnetic tunneling junction cell array with shared reference layer for mram applications. WO2004084224A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US45432003P 2003-03-14 2003-03-14
US60/454,320 2003-03-14
US10/781,131 US6963500B2 (en) 2003-03-14 2004-02-17 Magnetic tunneling junction cell array with shared reference layer for MRAM applications
US10/781,131 2004-02-17

Publications (2)

Publication Number Publication Date
WO2004084224A2 WO2004084224A2 (en) 2004-09-30
WO2004084224A3 true WO2004084224A3 (en) 2005-07-07

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/007556 WO2004084224A2 (en) 2003-03-14 2004-03-12 Magnetic tunneling junction cell array with shared reference layer for mram applications.

Country Status (2)

Country Link
US (1) US6963500B2 (en)
WO (1) WO2004084224A2 (en)

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US6909633B2 (en) * 2002-12-09 2005-06-21 Applied Spintronics Technology, Inc. MRAM architecture with a flux closed data storage layer
US7067866B2 (en) * 2003-03-31 2006-06-27 Applied Spintronics Technology, Inc. MRAM architecture and a method and system for fabricating MRAM memories utilizing the architecture
JP2005116923A (en) * 2003-10-10 2005-04-28 Hitachi Ltd Nonvolatile magnetic memory cell using spin torque and magnetic random access memory using same
US7649765B2 (en) * 2003-11-04 2010-01-19 Magsil Corporation Magnetic memory cell and method of fabricating same
KR100738066B1 (en) * 2003-12-01 2007-07-12 삼성전자주식회사 Method of forming silicide film having excellent thermal stability, semiconductor device and semiconductor memory device comprising silicide film formed by the same, and methods of manufacturing the same
US7072208B2 (en) * 2004-07-28 2006-07-04 Headway Technologies, Inc. Vortex magnetic random access memory
FR2892871B1 (en) * 2005-11-02 2007-11-23 Commissariat Energie Atomique SPEED POLARIZED ELELECTIC CURRENT FREQUENCY RADIO OSCILLATOR
US8780507B2 (en) * 2007-12-28 2014-07-15 HGST Netherlands B.V. Read transducer and magnetic storage system implementing same
FR2929759B1 (en) * 2008-04-03 2010-04-16 Commissariat Energie Atomique MAGNETIC DEVICE INCORPORATING A MAGNETORESISTIVE STACK
US8659852B2 (en) 2008-04-21 2014-02-25 Seagate Technology Llc Write-once magentic junction memory array
US7855911B2 (en) 2008-05-23 2010-12-21 Seagate Technology Llc Reconfigurable magnetic logic device using spin torque
US7852663B2 (en) 2008-05-23 2010-12-14 Seagate Technology Llc Nonvolatile programmable logic gates and adders
US7881098B2 (en) 2008-08-26 2011-02-01 Seagate Technology Llc Memory with separate read and write paths
US7985994B2 (en) 2008-09-29 2011-07-26 Seagate Technology Llc Flux-closed STRAM with electronically reflective insulative spacer
US8169810B2 (en) 2008-10-08 2012-05-01 Seagate Technology Llc Magnetic memory with asymmetric energy barrier
US8089132B2 (en) 2008-10-09 2012-01-03 Seagate Technology Llc Magnetic memory with phonon glass electron crystal material
US8039913B2 (en) 2008-10-09 2011-10-18 Seagate Technology Llc Magnetic stack with laminated layer
US8045366B2 (en) 2008-11-05 2011-10-25 Seagate Technology Llc STRAM with composite free magnetic element
US8043732B2 (en) 2008-11-11 2011-10-25 Seagate Technology Llc Memory cell with radial barrier
US7826181B2 (en) 2008-11-12 2010-11-02 Seagate Technology Llc Magnetic memory with porous non-conductive current confinement layer
US8289756B2 (en) 2008-11-25 2012-10-16 Seagate Technology Llc Non volatile memory including stabilizing structures
US7826259B2 (en) 2009-01-29 2010-11-02 Seagate Technology Llc Staggered STRAM cell
US7999338B2 (en) 2009-07-13 2011-08-16 Seagate Technology Llc Magnetic stack having reference layers with orthogonal magnetization orientation directions
EP2608208B1 (en) * 2011-12-22 2015-02-11 Crocus Technology S.A. Self-referenced MRAM cell and method for writing the cell using a spin transfer torque write operation
US10096767B2 (en) 2013-03-09 2018-10-09 Taiwan Semiconductor Manufacturing Company, Ltd. Elongated magnetoresistive tunnel junction structure
US9240547B2 (en) 2013-09-10 2016-01-19 Micron Technology, Inc. Magnetic tunnel junctions and methods of forming magnetic tunnel junctions
US9502642B2 (en) 2015-04-10 2016-11-22 Micron Technology, Inc. Magnetic tunnel junctions, methods used while forming magnetic tunnel junctions, and methods of forming magnetic tunnel junctions
US9960346B2 (en) 2015-05-07 2018-05-01 Micron Technology, Inc. Magnetic tunnel junctions
US10573363B2 (en) * 2015-12-02 2020-02-25 Samsung Electronics Co., Ltd. Method and apparatus for performing self-referenced read in a magnetoresistive random access memory
US9680089B1 (en) 2016-05-13 2017-06-13 Micron Technology, Inc. Magnetic tunnel junctions
JP6952672B2 (en) * 2018-11-28 2021-10-20 株式会社東芝 Magnetic storage device
CN116250040A (en) * 2020-10-16 2023-06-09 华为技术有限公司 Memory and electronic equipment

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US6269018B1 (en) * 2000-04-13 2001-07-31 International Business Machines Corporation Magnetic random access memory using current through MTJ write mechanism
US6351409B1 (en) * 2001-01-04 2002-02-26 Motorola, Inc. MRAM write apparatus and method
US20020186582A1 (en) * 2001-04-02 2002-12-12 Manish Sharma Cladded read conductor for a pinned-on-the-fly soft reference layer
US6649960B1 (en) * 2001-02-16 2003-11-18 Maxtor Corporation Synthetic free layer structure for MRAM devices
US6740947B1 (en) * 2002-11-13 2004-05-25 Hewlett-Packard Development Company, L.P. MRAM with asymmetric cladded conductor

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US5659499A (en) * 1995-11-24 1997-08-19 Motorola Magnetic memory and method therefor
US5940319A (en) * 1998-08-31 1999-08-17 Motorola, Inc. Magnetic random access memory and fabricating method thereof
US6153443A (en) * 1998-12-21 2000-11-28 Motorola, Inc. Method of fabricating a magnetic random access memory
US6211090B1 (en) * 2000-03-21 2001-04-03 Motorola, Inc. Method of fabricating flux concentrating layer for use with magnetoresistive random access memories
JP3920564B2 (en) * 2000-12-25 2007-05-30 株式会社東芝 Magnetic random access memory
US6475812B2 (en) * 2001-03-09 2002-11-05 Hewlett Packard Company Method for fabricating cladding layer in top conductor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6269018B1 (en) * 2000-04-13 2001-07-31 International Business Machines Corporation Magnetic random access memory using current through MTJ write mechanism
US6351409B1 (en) * 2001-01-04 2002-02-26 Motorola, Inc. MRAM write apparatus and method
US6649960B1 (en) * 2001-02-16 2003-11-18 Maxtor Corporation Synthetic free layer structure for MRAM devices
US20020186582A1 (en) * 2001-04-02 2002-12-12 Manish Sharma Cladded read conductor for a pinned-on-the-fly soft reference layer
US6740947B1 (en) * 2002-11-13 2004-05-25 Hewlett-Packard Development Company, L.P. MRAM with asymmetric cladded conductor

Also Published As

Publication number Publication date
US20040179395A1 (en) 2004-09-16
WO2004084224A2 (en) 2004-09-30
US6963500B2 (en) 2005-11-08

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