WO2004057653A3 - A method and apparatus for forming a high quality low temperature silicon nitride layer - Google Patents

A method and apparatus for forming a high quality low temperature silicon nitride layer Download PDF

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Publication number
WO2004057653A3
WO2004057653A3 PCT/US2003/040793 US0340793W WO2004057653A3 WO 2004057653 A3 WO2004057653 A3 WO 2004057653A3 US 0340793 W US0340793 W US 0340793W WO 2004057653 A3 WO2004057653 A3 WO 2004057653A3
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WO
WIPO (PCT)
Prior art keywords
nitride layer
silicon nitride
forming
low temperature
high quality
Prior art date
Application number
PCT/US2003/040793
Other languages
French (fr)
Other versions
WO2004057653A2 (en
Inventor
Shulin Wang
Errol Antonio C Sanchez
Aihua Steven Chen
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/327,467 external-priority patent/US7172792B2/en
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Priority to AU2003303136A priority Critical patent/AU2003303136A1/en
Priority to EP03813046A priority patent/EP1584100A2/en
Priority to JP2004562356A priority patent/JP2006511087A/en
Publication of WO2004057653A2 publication Critical patent/WO2004057653A2/en
Publication of WO2004057653A3 publication Critical patent/WO2004057653A3/en

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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34—Nitrides
    • C23C16/345—Silicon nitride
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523—Pulsed gas flow or change of composition over time
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02219—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/3003—Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

A method of forming a silicon nitride layer is described. According to the present invention, a silicon nitride layer is deposited by thermally decomposing a silicon/nitrogen containing source gas or a silicon containing source gas and a nitrogen containing source gas at low deposition temperatures (e.g., less than 550°C) to form a silicon nitride layer. The thermally deposited silicon nitride layer is then treated with hydrogen radicals to form a treated silicon nitride layer.
PCT/US2003/040793 2002-12-20 2003-12-19 A method and apparatus for forming a high quality low temperature silicon nitride layer WO2004057653A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
AU2003303136A AU2003303136A1 (en) 2002-12-20 2003-12-19 A method and apparatus for forming a high quality low temperature silicon nitride layer
EP03813046A EP1584100A2 (en) 2002-12-20 2003-12-19 A method and apparatus for forming a high quality low temperature silicon nitride layer
JP2004562356A JP2006511087A (en) 2002-12-20 2003-12-19 Method and apparatus for forming a high quality low temperature silicon nitride layer

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US43581302P 2002-12-20 2002-12-20
US10/327,467 2002-12-20
US10/327,467 US7172792B2 (en) 2002-12-20 2002-12-20 Method for forming a high quality low temperature silicon nitride film
US60/435,813 2002-12-20

Publications (2)

Publication Number Publication Date
WO2004057653A2 WO2004057653A2 (en) 2004-07-08
WO2004057653A3 true WO2004057653A3 (en) 2004-08-12

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/040793 WO2004057653A2 (en) 2002-12-20 2003-12-19 A method and apparatus for forming a high quality low temperature silicon nitride layer

Country Status (5)

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EP (1) EP1584100A2 (en)
JP (1) JP2006511087A (en)
KR (1) KR101022949B1 (en)
AU (1) AU2003303136A1 (en)
WO (1) WO2004057653A2 (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7972663B2 (en) * 2002-12-20 2011-07-05 Applied Materials, Inc. Method and apparatus for forming a high quality low temperature silicon nitride layer
US7365029B2 (en) * 2002-12-20 2008-04-29 Applied Materials, Inc. Method for silicon nitride chemical vapor deposition
US7172792B2 (en) 2002-12-20 2007-02-06 Applied Materials, Inc. Method for forming a high quality low temperature silicon nitride film
US20060019032A1 (en) * 2004-07-23 2006-01-26 Yaxin Wang Low thermal budget silicon nitride formation for advance transistor fabrication
JP2007012788A (en) * 2005-06-29 2007-01-18 Elpida Memory Inc Method of manufacturing semiconductor device
KR101304726B1 (en) * 2006-04-03 2013-09-05 레르 리키드 쏘시에떼 아노님 뿌르 레？드 에렉스뿔라따시옹 데 프로세데 조르즈 클로드 Method for depositing silicon nitride films and/or silicon oxynitride films by chemical vapor deposition
JP2008235636A (en) * 2007-03-22 2008-10-02 Elpida Memory Inc Method of manufacturing semiconductor device, and semiconductor device
KR101223724B1 (en) 2010-10-25 2013-01-17 삼성디스플레이 주식회사 Passivation film for electronic device and method of manufacturing the same
US8586487B2 (en) * 2012-01-18 2013-11-19 Applied Materials, Inc. Low temperature plasma enhanced chemical vapor deposition of conformal silicon carbon nitride and silicon nitride films
US8728955B2 (en) * 2012-02-14 2014-05-20 Novellus Systems, Inc. Method of plasma activated deposition of a conformal film on a substrate surface
TWI496932B (en) * 2012-03-09 2015-08-21 Air Prod & Chem Barrier materials for display devices
TWI724141B (en) 2016-03-23 2021-04-11 法商液態空氣喬治斯克勞帝方法硏究開發股份有限公司 Si-containing film forming compositions and methods of making and using the same
CN110178201B (en) 2017-01-13 2023-06-16 应用材料公司 Method and apparatus for low temperature silicon nitride films
US20180363133A1 (en) * 2017-06-16 2018-12-20 Applied Materials, Inc. Method and Apparatus for Void Free SiN Gapfill
SG11202006604RA (en) * 2018-01-26 2020-08-28 Applied Materials Inc Treatment methods for silicon nitride thin films
KR102466189B1 (en) * 2020-08-25 2022-11-10 주식회사 한화 Substrate processing apparatus using hydrogen radicals
US11705312B2 (en) 2020-12-26 2023-07-18 Applied Materials, Inc. Vertically adjustable plasma source

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6251264A (en) * 1985-08-30 1987-03-05 Hitachi Ltd Manufcture of thin film transistor
US4857140A (en) * 1987-07-16 1989-08-15 Texas Instruments Incorporated Method for etching silicon nitride
JPH04365379A (en) * 1991-06-13 1992-12-17 Fuji Electric Co Ltd Manufacture of thin-film transistor
US5273920A (en) * 1992-09-02 1993-12-28 General Electric Company Method of fabricating a thin film transistor using hydrogen plasma treatment of the gate dielectric/semiconductor layer interface
US5591494A (en) * 1993-09-24 1997-01-07 Applied Materials, Inc. Deposition of silicon nitrides by plasma-enhanced chemical vapor deposition
US6324439B1 (en) * 1997-05-07 2001-11-27 Applied Materials, Inc. Method and apparatus for applying films using reduced deposition rates

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0613329A (en) * 1992-06-25 1994-01-21 Canon Inc Semiconductor device and manufacture thereof
JPH06132284A (en) * 1992-10-22 1994-05-13 Kawasaki Steel Corp Method for forming protective film of semiconductor device
JP3348509B2 (en) * 1994-03-30 2002-11-20 ソニー株式会社 Method of forming insulating film
JPH10261658A (en) * 1997-03-17 1998-09-29 Toyota Motor Corp Manufacture of semiconductor device
JP2001258139A (en) * 2000-03-09 2001-09-21 Mitsubishi Electric Corp Anchor mechanism of electric place

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6251264A (en) * 1985-08-30 1987-03-05 Hitachi Ltd Manufcture of thin film transistor
US4857140A (en) * 1987-07-16 1989-08-15 Texas Instruments Incorporated Method for etching silicon nitride
JPH04365379A (en) * 1991-06-13 1992-12-17 Fuji Electric Co Ltd Manufacture of thin-film transistor
US5273920A (en) * 1992-09-02 1993-12-28 General Electric Company Method of fabricating a thin film transistor using hydrogen plasma treatment of the gate dielectric/semiconductor layer interface
US5591494A (en) * 1993-09-24 1997-01-07 Applied Materials, Inc. Deposition of silicon nitrides by plasma-enhanced chemical vapor deposition
US6324439B1 (en) * 1997-05-07 2001-11-27 Applied Materials, Inc. Method and apparatus for applying films using reduced deposition rates

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
M. YAMAGUCHI, K YATABE, H OHTA: "the effect of hydrogen plasma on the properties of a-Si:/a-Si1-xNx:H superlattices", PHILOSOPHICAL MAGAZINE LETTERS, vol. 58, no. 4, 1988, pages 213 - 218, XP008031522 *
MASAKIYO MATSUMURA, OSAMO SUGIURA: "low-temperature chemical-vapor deposition of amorphous semiconductors and insulators", MATERIAL RESEARCH SOCIETY, vol. 297, 1993, pages 109 - 120, XP008031520 *
PATENT ABSTRACTS OF JAPAN vol. 0112, no. 37 (E - 528) 4 August 1987 (1987-08-04) *
PATENT ABSTRACTS OF JAPAN vol. 0172, no. 41 (E - 1364) 14 May 1993 (1993-05-14) *

Also Published As

Publication number Publication date
EP1584100A2 (en) 2005-10-12
KR20050085779A (en) 2005-08-29
AU2003303136A1 (en) 2004-07-14
AU2003303136A8 (en) 2004-07-14
WO2004057653A2 (en) 2004-07-08
KR101022949B1 (en) 2011-03-16
JP2006511087A (en) 2006-03-30

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