WO2004049423A1 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device Download PDF

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Publication number
WO2004049423A1
WO2004049423A1 PCT/JP2003/015022 JP0315022W WO2004049423A1 WO 2004049423 A1 WO2004049423 A1 WO 2004049423A1 JP 0315022 W JP0315022 W JP 0315022W WO 2004049423 A1 WO2004049423 A1 WO 2004049423A1
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Prior art keywords
film
semiconductor device
electrode
plasma
substrate
Prior art date
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PCT/JP2003/015022
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French (fr)
Japanese (ja)
Inventor
Unryu Ogawa
Toru Kakuda
Tadashi Terasaki
Original Assignee
Hitachi Kokusai Electric Inc.
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Application filed by Hitachi Kokusai Electric Inc. filed Critical Hitachi Kokusai Electric Inc.
Priority to JP2004555034A priority Critical patent/JPWO2004049423A1/en
Publication of WO2004049423A1 publication Critical patent/WO2004049423A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3211Nitridation of silicon-containing layers

Definitions

  • the present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device (semiconductor device) using plasma processing, for example, a DRAM (dynamic random access memory), or a system LSI with embedded memory.
  • plasma processing for example, a DRAM (dynamic random access memory), or a system LSI with embedded memory.
  • a semiconductor capacitor insulating film used for a memory cell in a system LSI incorporating a memory or a memory is formed by a nitride film formed by a reduced-pressure gas-phase growth (low-pressure CVD) method.
  • Nitride films formed by the vapor phase growth (low-pressure CVD) method have problems with film quality such as pinholes, and are not suitable for increasingly advanced miniaturization of semiconductor devices.
  • the low-pressure chemical vapor deposition (low-pressure CVD) method has a problem from the viewpoint of thermal history management of semiconductor devices because the temperature at which an insulating film is formed becomes high and greatly affects the characteristics of semiconductor devices.
  • step force Bale in high dielectric constant material such as T a 2 ⁇ 5
  • Tsu di the film thickness difference between the top and bottom of the trench is increased, resulting limits the miniaturization of the semiconductor device, in particular, T a 2 ⁇ of 5 such as high miniaturization trench-shaped portion surface It is becoming difficult to deposit dielectric materials.
  • a main object of the present invention is to form a capacitive insulating film having excellent step coverage at a low temperature, and particularly to forming a capacitive insulating film having excellent step coverage even in the treatment of a trench-shaped surface. It is an object of the present invention to provide a method of manufacturing a semiconductor device suitable for miniaturization of semiconductor devices. Disclosure of the invention
  • the silicon-containing electrode of a semiconductor device is nitrided using active species activated by plasma discharge of a gas containing nitrogen element in its chemical formula, resulting in a capacitor insulating film with a thickness of 3 OA or more.
  • a method of manufacturing a semiconductor device forming a nitride film as a semiconductor device is provided. According to a second aspect of the present invention,
  • An electrode containing silicon of a semiconductor device is oxidized using active species activated by plasma discharge of a gas containing an oxygen element in the chemical formula, and then a gas containing a nitrogen element in the chemical formula is plasma-treated.
  • active species activated by plasma discharge a gas containing an oxygen element in the chemical formula
  • a gas containing a nitrogen element in the chemical formula is plasma-treated.
  • an oxide film, an oxynitride film, and a nitride film are formed on the electrode surface, and at least oxynitridation is performed.
  • a method of manufacturing a semiconductor device in which a capacitor insulating film is formed by forming a total thickness of a film and a nitride film to be 3 OA or more.
  • FIG. 1A, 1B, and 1C are schematic longitudinal sectional views showing a semiconductor device manufactured by a method of manufacturing a semiconductor device according to a preferred embodiment of the present invention.
  • FIG. 2 shows a modified magnetron plasma processing apparatus (hereinafter, referred to as an MMT apparatus) for performing the method of manufacturing a semiconductor device according to a preferred embodiment of the present invention.
  • MMT apparatus modified magnetron plasma processing apparatus
  • FIG. 3 is a circuit diagram for explaining a high-frequency circuit of the MMT device used in the method for manufacturing a semiconductor device according to the preferred embodiment of the present invention.
  • FIG. 4 is a diagram showing a relationship between a silicon nitride film thickness and a processing time obtained by performing a method of manufacturing a semiconductor device according to a preferred embodiment of the present invention.
  • the silicon-containing electrode of a semiconductor device is nitrided using active species activated by plasma discharge of a gas containing nitrogen element in its chemical formula, resulting in a capacitor insulating film with a thickness of 3 OA or more.
  • a method of manufacturing a semiconductor device forming a nitride film as a semiconductor device is provided.
  • the processing temperature is lowered, the step coverage is improved, and the film thickness uniformity is improved regardless of the pattern shape of the semiconductor device. Further, by setting the thickness of the nitride film to 30 A or more, it becomes possible to satisfy electric characteristics such as leak current and charge-up of the capacitor insulating film. As a result, the power consumption of the semiconductor DRAM can be reduced, and the battery life can be prolonged in the case of a mobile phone or the like.
  • plasma discharge of gas containing oxygen element in its chemical formula The surface of the nitride film is oxidized using the activated species activated in this way to form a capacitor insulating film.
  • the capacitor insulating film can be formed more suitably.
  • An electrode containing silicon of a semiconductor device is oxidized using active species activated by plasma discharge of a gas containing an oxygen element in the chemical formula, and then a gas containing a nitrogen element in the chemical formula is plasma-treated.
  • active species activated by plasma discharge a gas containing an oxygen element in the chemical formula
  • a gas containing a nitrogen element in the chemical formula is plasma-treated.
  • an oxide film, an oxynitride film, and a nitride film are formed on the electrode surface, and at least oxynitridation is performed.
  • a method for manufacturing a semiconductor device in which a total thickness of a film and a nitride film is 3 OA or more to form a capacity insulating film. By doing so, the capacity insulating film can be formed more suitably.
  • an electrode containing silicon of the semiconductor device is oxidized using active species activated by plasma discharge of a gas containing oxygen in its chemical formula, and then nitrogen is added.
  • active species activated by plasma discharge of a gas contained in the chemical formula an oxide film and a nitride film are formed on the electrode surface.
  • a capacitor insulating film is formed by forming a nitride film and a nitride film having a total film thickness of 3 OA or more.
  • each of the above plasma treatments includes a processing chamber for processing a substrate, a substrate support for supporting the substrate in the processing chamber, an electrode disposed around the processing chamber, preferably a cylindrical electrode, and a magnetic field line forming means.
  • a substrate processing apparatus having: Next, preferred embodiments of the present invention will be described in more detail with reference to the drawings. I do.
  • FIG. 1A, 1B, and 1C show schematic partial cross-sectional views of a semiconductor device manufactured by a method for manufacturing a semiconductor device according to a preferred embodiment of the present invention.
  • a trench on which a doped polysilicon film or a doped bare silicon region is formed is formed on a semiconductor silicon wafer to form a trench-shaped lower polysilicon electrode.
  • the electrode 1 of the semiconductor device which is a doped bare silicon electrode is formed.
  • the surface of the electrode 1 is nitrided by plasma treatment. That is, the electrode 1 is nitrided by using a gas containing nitrogen element in its chemical formula, for example, an active species activated by plasma discharge of nitrogen gas. By this nitriding treatment, a nitride film (SiN film) 2 is formed.
  • the thickness of the nitride film 2 is 3 O A or more, the electrical characteristics of the capacitor insulating film of the semiconductor device can be satisfied. In particular, it is effective in increasing the electric capacity.
  • the upper electrode 3 is formed using a doped polysilicon film, and a semiconductor device is formed.
  • the surface of the nitride film 2 of the semiconductor device shown in FIG. 1A is further treated with a gas containing an oxygen element in its chemical formula, for example, an activated species activated by plasma discharge of oxygen gas.
  • a gas containing an oxygen element in its chemical formula for example, an activated species activated by plasma discharge of oxygen gas.
  • an activated species activated by plasma discharge of oxygen gas.
  • the oxygen concentration in the oxynitride film gradually decreases in the depth direction, and the oxide film and the oxynitride film are formed at 5-1 OA, and the nitrided portion is formed deeper than the oxynitride film. It becomes a film (SiN film) and is formed about 3 OA.
  • a nitride film has the characteristic of increasing the electric capacity, an oxide film has a characteristic of reducing the leak current, and an oxynitride film has an intermediate property between the nitride film and the oxide film. In this oxynitride film, the characteristics are closer to those of the oxide film when the oxygen concentration is higher, and are closer to those of the nitride film when the nitrogen concentration is higher.
  • the oxidation treatment is performed while adjusting the amount of oxidation after the nitride film is mainly formed, so that it is suitable for manufacturing a semiconductor device for the purpose of increasing the electric capacity.
  • the oxidation concentration refers to the number of oxygen atoms per unit volume in the oxynitride film as the total number of atoms per unit volume of the oxynitride film (the total number of atoms of silicon, oxygen, and nitrogen; 6. 6 X 1 0 2 2 ).
  • the nitrogen concentration refers to the number of nitrogen atoms per unit volume in the oxynitride film as the total number of atoms per unit volume of the oxynitride film (the total number of atoms of silicon, oxygen, and nitrogen, 6.6 X It is the value divided by 1 0 2 2 ).
  • the upper electrode 3 is formed using a doped polysilicon film to form a semiconductor device.
  • a doped silicon film or a doped bare silicon film is formed on a semiconductor silicon wafer.
  • a trench in which a region is formed is formed, and an electrode 1 of the semiconductor device, which is a trench-shaped doped polysilicon lower electrode or a doped bare silicon electrode, is formed.
  • the surface of the electrode 1 is oxidized by plasma treatment, and is then nitrided by plasma treatment. That is, the electrode 1 of the semiconductor device is oxidized using a gas containing oxygen element in its chemical formula, for example, an active species activated by plasma discharge of oxygen gas. Next, the surface of the oxidized electrode 1 is nitrided by using a gas containing a nitrogen element in its chemical formula, for example, a chemical species activated by plasma discharge of nitrogen gas.
  • oxide film of 4 OA When the oxide film of 4 OA is nitrided, it becomes a nitride film (SiN film) from the surface to about 5 to 1 OA, and an oxynitride film (SiSN film) at a depth deeper than this nitride film.
  • SiN film nitride film
  • SiSN film oxynitride film
  • the nitrogen concentration gradually decreases in the depth direction, and this oxynitride film is formed at about 20 to 25 A.
  • the total thickness of the monolayer and the oxynitride film with at least 3 OA or more, further at deeper than the oxynitride film, oxide film (S I_ ⁇ 2 film) is approximately 5
  • FIG. 2 shows the deformed magnet used to manufacture the semiconductor device shown in FIGS. 1A to 1C.
  • a ton-type plasma processing apparatus (Modified Magnetic Typed Processing System (MMT apparatus) 24) is shown.
  • the MMT apparatus 24 is a vacuum vessel 2 constituting a processing chamber 26.
  • the vacuum container 28 includes an upper container 30 and a lower container 32 which are vertically joined to each other
  • the upper container 30 is made of a ceramic such as alumina or quartz. 32 is made of metal such as aluminum and is grounded, and the periphery of the upper container 30 is covered with a cover 34.
  • the upper container 30 is cylindrical with a dome-shaped ceiling. On the ceiling, an upper cover 36 and a shield plate 38 are formed.
  • a diffusion chamber 40 is formed between 36 and the shower plate 38.
  • the upper cover 36 is made of metal such as aluminum and is grounded.
  • the shower plate 38 is made of quartz or alumina.
  • an inlet 42 for introducing a processing gas is formed in the upper lid 36, and a number of nozzles 44 are formed in the shower plate 38. For example, two kinds of processing gases introduced from 42 are mixed and diffused in the diffusion chamber 40 and supplied to the processing chamber 26 from the nozzle 44 of the shower plate 38.
  • a susceptor 46 as a substrate support for supporting the substrate W is disposed in the processing chamber 26.
  • This susceptor has a heater for heating the substrate W. Evening is set up.
  • the lower container 32 is provided with an exhaust port 48, and the processing gas in the processing chamber 26 is exhausted from the exhaust port 48.
  • the cylindrical electrode 50 is disposed around the processing chamber 26, that is, on the outer periphery of the upper container 30 with a small interval of about 2 mm from the upper container 30.
  • the cylindrical electrode 50 is connected to a high-frequency power supply 54 via a matching device 52.
  • the high-frequency power supply 54 generates high-frequency power having a frequency of, for example, 13.56 MHz, and the magnitude of the power is adjusted according to a control signal from the control device 56.
  • the magnetic field line forming means 58 is composed of, for example, two permanent magnets 60 and 62 formed in a ring shape, and is arranged around the processing chamber 26.
  • the two permanent magnets 60 and 62 are magnetized in opposite directions in the radial direction, and extend in the processing chamber 26 from one permanent magnet 60 toward the center and the other permanent magnet 62 Are formed.
  • a high frequency circuit (variable impedance circuit) 64 is connected to the susceptor 46 described above.
  • the high-frequency circuit 64 can adjust the susceptor impedance according to the control signal from the control device 56 described above.
  • the high-frequency circuit 64 is a circuit in which a coil and a capacitor are arranged in series or in parallel.
  • the impedance of the high-frequency circuit 64 can be adjusted by controlling the inductance of the coil divided by the capacitance of the capacitor.
  • the potential of the substrate W can be controlled through the evening.
  • FIG. 3 shows an internal circuit of the high-frequency circuit 64 described above.
  • the circuit does not include a power supply and consists only of passive elements.
  • the coil 1 2 1 and the capacitor 1 2 3 are connected in series.
  • the coil 122 is provided with several terminals 122 so that the inductance can be varied.
  • Objective Terminals 1 and 2 are arbitrarily short-circuited to control the number of coil patterns so that the inductance value can be obtained.
  • a variable capacitor capable of linearly changing its own capacitance is used for the capacitor 123.
  • the high-frequency circuit 64 is adjusted to a desired impedance value, so that the potential of the substrate W can be controlled.
  • the impedance of the high-frequency circuit 64 can be changed by adjusting at least one of the variable coil and the variable capacitor. However, even when a fixed coil and a fixed capacitor are used, the impedance is reduced. Of course, two or more circuits different from each other may be switched.
  • a magnetron discharge is generated under the influence of the magnetic field of the permanent magnets 60 and 62, and the electric charge is trapped in the space above the substrate W to increase the magnetron discharge.
  • a density plasma is generated.
  • the surface of the substrate W on the susceptor 46 is subjected to a plasma oxidation treatment or a plasma nitridation treatment by the generated high-density plasma.
  • the surface treatment is started and stopped by applying and stopping high-frequency power.
  • the high-frequency circuit 64 interposed between the susceptor 46 and the ground is controlled in advance to a desired impedance value.
  • the high-frequency circuit 64 When the high-frequency circuit 64 is adjusted to a desired impedance value, the potential of the substrate W is controlled thereby, and an oxidized film or a nitrided film having a desired film thickness and in-plane film thickness uniformity can be formed.
  • the film thickness cannot be controlled by the impedance control by the MMT apparatus as described above.
  • parallel plate electrode type plasma In the device the discharge voltage and the susceptor voltage cannot be controlled independently. Therefore, when the susceptor voltage is increased, a strong electric field is applied to the substrate, so that the film quality is deteriorated due to plasma damage and the film thickness uniformity is also deteriorated.
  • the MMT device of the present embodiment when a high frequency is applied to the cylindrical discharge electrode 50, the upper lid 36 grounded to the discharge electrode 50 and the high frequency grounded An electric field is generated between the susceptor 46 connected to the circuit 64 and the grounded lower container 32 to cause discharge and generate plasma.
  • the generated plasma diffuses along the lines of magnetic force and spreads over the entire surface of the substrate W.
  • high-energy electrons are trapped by strong lines of magnetic force on the surface of the cylindrical discharge electrode, which enables efficient generation of high-density plasma even at low pressure.
  • Plasma can be created uniformly.
  • the electric field is applied by the discharge electrode, and the electric charge is trapped by the lines of magnetic force, thereby increasing the plasma density as compared with the parallel plate electrode type plasma apparatus.
  • the high-frequency impedance of the high-frequency circuit 64 is controlled to reduce the potential of the substrate W. It is possible to control the plasma incident energy to the substrate W. In this way, the plasma injection energy is controlled by controlling the susceptor potential, which can be controlled independently of the plasma generation, rather than the voltage of the discharge electrode that generates the plasma. Therefore, the quality of the formed film can be well maintained.
  • the MMT device of the present embodiment can control the energy of ions incident on the substrate and has less plasma damage to the substrate than other plasma devices.
  • a half as substrate W The conductor wafer is placed on the susceptor 46, and the gas in the vacuum vessel 28 is exhausted from the exhaust port 48 to make the vacuum vessel 28 vacuum.
  • the substrate W is heated by a heater (not shown) provided on the susceptor 46 so that the temperature of the substrate W is adjusted to a temperature suitable for the processing conditions of the substrate W, for example, in a temperature range from room temperature to 400 ° C. Adjust the temperature of the.
  • the processing gas is introduced from the inlet 42.
  • the processing gas introduced from the inlet 42 is diffused in the diffusion chamber 40 and supplied to the processing chamber 26 from the nozzle 44 of the shower plate 38.
  • high-frequency power is supplied from the high-frequency power supply 54 to the cylindrical electrode 50.
  • an electric field is generated between the cylindrical electrode 50 and the upper lid 36 grounded, the susceptor 46 connected to the grounded high-frequency circuit 64, and the lower vessel 32 grounded. Discharge occurs and plasma is formed.
  • the magnetic field lines are formed by the magnetic field line forming means 58, and the plasma discharge spreads to the center of the processing chamber 26 by the magnetic field lines, and the impedance is adjusted by adjusting the high frequency circuit 64.
  • the substrate W is processed by adjusting the potential of the susceptor 46 (substrate W), thereby adjusting the amount of plasma processing on the substrate W.
  • the supply of high-frequency power from the high-frequency power supply 54 is stopped, the gas in the vacuum vessel 28 is exhausted from the exhaust port 48, and the substrate W on the susceptor 46 is taken out of the processing chamber 26. The process ends.
  • the semiconductor device is treated on the substrate W by processing the semiconductor silicon wafer 8 as the substrate W. It is formed.
  • the pressure in the vacuum vessel 28 is controlled to a predetermined pressure using the MMT apparatus shown in FIG. 2, and the temperature of the substrate W is controlled in a temperature range from room temperature to 400 ° C.
  • the flow rate of nitrogen or oxygen is controlled and introduced into the processing chamber 26 from the inlet 42, and the frequency and amount of the high-frequency power supplied to the cylindrical electrode 50 are adjusted, and the magnetic field line forming means 5
  • Set the magnetic strength of 8 and set the electric potential of The processing conditions are set by, for example, controlling.
  • Standard process conditions are as follows: For nitriding, temperature: 0 to 400 ° C, pressure: 2 to 30 Pa, process gas: N 2 , flow rate: 100 to 500 sccm, RF power: 800 to 1500 W , Vp p: a 250 to 800 V, in the case of oxidation, temperature: 0 to 400 ° (:, pressure: 2 to 30 P a, process gas: 0 2, flow rate: 100 to 500 sc cm, RF Power 500 to 1500 W, Vpp: 250 to 800 V.
  • Vpp refers to the difference between the maximum value and the minimum value of the susceptor potential for mounting the substrate.
  • FIG. 4 shows the processing time dependence of the thickness of the nitride film formed on the silicon-based; IS surface using the MMT device 24.
  • the processing conditions are as follows: discharge power 1000 W, pressure 30 Pa, discharge power 250 W, pressure 30 Pa, and discharge power 250 W, pressure 80 Pa.
  • the silicon surface can be nitrided in the range of 10-50 A while maintaining in-plane uniformity of ⁇ 2% or less.
  • it shows that the surface can be nitrided without pattern dependency because there is a self-limit of the film thickness to be nitrided depending on the process conditions.
  • MMT device 24 as compared with the CVD film of Ta 2 0 5, even for even pattern of more miniaturized high ⁇ scan Bae transfected ratio
  • a film having a uniform thickness can be formed, and, for example, in the case of performing a nitriding treatment, the thickness of the nitride film can be increased.
  • the difficulty associated with the ratio of the depth / width exceeds 2 0 times or more, by using the MM T unit 2 4, in an aspect ratio greater than the corresponding
  • it can be applied to trenches having a width of less than 0.1 and a depth of 7 m or more, and trenches having an aspect ratio of about 100 or more.
  • a first process of oxidizing the substrate W by switching or adjusting the high-frequency impedance of the substrate support (susceptor) 46 It is preferable that the second process of nitriding the oxide film formed by the first process with an active species obtained by activating nitrogen gas by plasma is performed continuously.
  • the first process can be performed using only oxygen, it is preferable to perform the first process by introducing a large amount of krypton and a small amount of oxygen into the treatment chamber.
  • this first process it is necessary to form a high-quality oxide film, so that only the monoatomic radical of oxygen is generated.
  • a large amount of gas is injected with a small amount of oxygen to generate plasma, and oxygen radicals oxidize a substrate made of, for example, silicon.
  • the high-frequency impedance of the substrate support is adjusted so that the potential of the plasma generated by the cylindrical electrode and the magnetic field line forming means and the potential of the substrate support are matched. As a result, entry of ions into the substrate to be processed on the substrate support can be prevented as much as possible, and oxidation can be performed with a large amount of oxygen radicals in the plasma.
  • the high-frequency impedance of the substrate support is adjusted by inverting the phase of the potential between the plasma and the substrate support so that the plasma resonates with the substrate support. Maximize ion incidence on
  • the processing gas it is preferable to further treat the processing gas with He gas.
  • He gas When He gas is introduced, the dissociation energy of He is very high, and by making it a mixed gas with nitrogen, it can be maintained at a higher state than the excitation of N 2 , and assists in the atomization of nitrogen. it can.
  • the present invention it is possible to form a capacitor insulating film having a low temperature and excellent step coverage, and particularly to form a capacitor insulating film having an excellent step coverage even when treating a trench-shaped surface. In monkey.
  • the present invention can be used particularly favorably for the production of miniaturized semiconductor memories.

Abstract

A method for manufacturing a semiconductor device wherein a nitride film as a capacitor insulating film having a thickness of not less than 30 Å is formed by nitriding a silicon-containing electrode of a semiconductor device using an active species activated through plasma discharge of a gas whose chemical formula includes nitrogen element is disclosed.

Description

明細書 半導体装置の製造方法 技術分野  Description Method of manufacturing semiconductor device
本発明は、 半導体装置の製造方法に関し、 特に、 プラズマ処理を用い た半導体装置 (半導体デバイス) 、 例えば DRAM (ダイナミックラン ダムアクセスメモリ) 、 或はメモリ混載のシステム L S Iの製造方法に 関するものである。 背景技術  The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device (semiconductor device) using plasma processing, for example, a DRAM (dynamic random access memory), or a system LSI with embedded memory. . Background art
従来の半導体装置 (半導体デバイス) 、 例えば DRAM (ダイナミツ
Figure imgf000003_0001
、 或はメモリ混載のシステム L S Iにおけ るメモリセルに使用されている半導体キャパシタ絶縁膜は、 減圧気相成 長 (減圧 CVD) 法を用いて形成した窒化膜により形成されているが、 この減圧気相成長 (減圧 CVD) 法による窒化膜は、 ピンホールなどの 膜質の問題があり、 ますます進歩する半導体装置の微細化に適していな い。 また、 この減圧気相成長 (減圧 CVD) 法では、 絶縁膜形成温度が 高くなつてしまい、 半導体装置の特性に大きな影響を与えるので、 半導 体装置の熱履歴管理の観点からも問題があり、 キャパシ夕絶縁膜形成温 度の低温化が強く求められるようになってきている。
Conventional semiconductor devices (semiconductor devices) such as DRAM (Dynamics)
Figure imgf000003_0001
A semiconductor capacitor insulating film used for a memory cell in a system LSI incorporating a memory or a memory is formed by a nitride film formed by a reduced-pressure gas-phase growth (low-pressure CVD) method. Nitride films formed by the vapor phase growth (low-pressure CVD) method have problems with film quality such as pinholes, and are not suitable for increasingly advanced miniaturization of semiconductor devices. In addition, the low-pressure chemical vapor deposition (low-pressure CVD) method has a problem from the viewpoint of thermal history management of semiconductor devices because the temperature at which an insulating film is formed becomes high and greatly affects the characteristics of semiconductor devices. However, there is an increasing demand for lowering the temperature at which the insulating film is formed.
近年、 これらの問題を解決するために、 T a25等の高誘電率材料を キャパシ夕絶縁膜として採用する場合もある (日本国公開特許公報 特 2002- 124650号公報および日本国公開特許公報 特開平 4 - 223366号公報参照) 。 Recently, in order to solve these problems, T a 25 high dielectric constant material Capacity evening sometimes employed as an insulating film (Japanese Patent Publication Laid-2002- 124650 discloses and Japanese Patent Publication such Gazette JP-A-4-223366).
しかしながら、 T a 25等の高誘電率材料においてはステップ力バレ ッジに問題があり、 トレンチの上部と下部の膜厚差が大きくなるので、 半導体装置の微細化に限界を生じ、 特に、 微細化されたトレンチ形状部 表面に T a 25等の高誘電率材料を成膜するのが困難になってきてい る。 However, step force Bale in high dielectric constant material, such as T a 25 There is a problem with the Tsu di, the film thickness difference between the top and bottom of the trench is increased, resulting limits the miniaturization of the semiconductor device, in particular, T a 2 〇 of 5 such as high miniaturization trench-shaped portion surface It is becoming difficult to deposit dielectric materials.
従って、 本発明の主な目的は、 低温でステップカバレッジの優れたキ ャパシ夕絶縁膜が形成でき、 特に、 トレンチ形状表面の処理においても ステツプカバレッジに優れたキャパシ夕絶縁膜が形成でき、 半導体装置 の微細化に適した半導体装置の製造方法を提供することにある。 発明の開示  Accordingly, a main object of the present invention is to form a capacitive insulating film having excellent step coverage at a low temperature, and particularly to forming a capacitive insulating film having excellent step coverage even in the treatment of a trench-shaped surface. It is an object of the present invention to provide a method of manufacturing a semiconductor device suitable for miniaturization of semiconductor devices. Disclosure of the invention
本発明の第 1の態様によれば、  According to a first aspect of the present invention,
窒素元素をその化学式中に含むガスをプラズマ放電することにより活 性化した活性種を使用して半導体装置のシリコンを含む電極を窒化処理 することで、 膜厚が 3 O A以上のキャパシ夕絶縁膜としての窒化膜を形 成する半導体装置の製造方法が提供される。 本発明の第 2の態様によれば、  The silicon-containing electrode of a semiconductor device is nitrided using active species activated by plasma discharge of a gas containing nitrogen element in its chemical formula, resulting in a capacitor insulating film with a thickness of 3 OA or more. A method of manufacturing a semiconductor device forming a nitride film as a semiconductor device is provided. According to a second aspect of the present invention,
酸素元素をその化学式中に含むガスをプラズマ放電することにより活 性化した活性種を使用して半導体装置のシリコンを含む電極を酸化処理 し、 次に窒素元素をその化学式中に含むガスをプラズマ放電することに より活性化した活性種を使用して前記酸化処理された電極を窒化処理す ることで、 前記電極表面に酸化膜、 酸窒化膜および窒化膜を形成し、 少 なくとも酸窒化膜および窒化膜の合計膜厚が 3 O A以上となるように形 成してキャパシタ絶縁膜を形成する半導体装置の製造方法が提供され る。 図面の簡単な説明 An electrode containing silicon of a semiconductor device is oxidized using active species activated by plasma discharge of a gas containing an oxygen element in the chemical formula, and then a gas containing a nitrogen element in the chemical formula is plasma-treated. By nitriding the oxidized electrode using active species activated by discharging, an oxide film, an oxynitride film, and a nitride film are formed on the electrode surface, and at least oxynitridation is performed. Provided is a method of manufacturing a semiconductor device in which a capacitor insulating film is formed by forming a total thickness of a film and a nitride film to be 3 OA or more. BRIEF DESCRIPTION OF THE FIGURES
図 1 A、 1 B、 1 Cは、 本発明の好ましい実施の形態の半導体装置の 製造方法で製造された半導体装置を示す概略縦断面図である。  1A, 1B, and 1C are schematic longitudinal sectional views showing a semiconductor device manufactured by a method of manufacturing a semiconductor device according to a preferred embodiment of the present invention.
図 2は、 本発明の好ましい実施の形態の半導体装置の製造方法を実施 するための変形マグネトロンプラズマ処理装置(Mod i f i ed Magne t ron Ty ped Process ing Sys t em 以下、 MM T装置という。 ) を示す概略縦断面 図である。  FIG. 2 shows a modified magnetron plasma processing apparatus (hereinafter, referred to as an MMT apparatus) for performing the method of manufacturing a semiconductor device according to a preferred embodiment of the present invention. FIG.
図 3は、 本発明の好ましい実施の形態の半導体装置の製造方法に用い る MM T装置の高周波回路を説明するための回路図である。  FIG. 3 is a circuit diagram for explaining a high-frequency circuit of the MMT device used in the method for manufacturing a semiconductor device according to the preferred embodiment of the present invention.
図 4は、 本発明の好ましい実施の形態の半導体装置の製造方法を実施 して得られたシリコン窒化膜厚と処理時間との関係を示す図である。 発明を実施するための好ましい形態  FIG. 4 is a diagram showing a relationship between a silicon nitride film thickness and a processing time obtained by performing a method of manufacturing a semiconductor device according to a preferred embodiment of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION
本発明の好ましい形態によれば、  According to a preferred embodiment of the present invention,
窒素元素をその化学式中に含むガスをプラズマ放電することにより活 性化した活性種を使用して半導体装置のシリコンを含む電極を窒化処理 することで、 膜厚が 3 O A以上のキャパシ夕絶縁膜としての窒化膜を形 成する半導体装置の製造方法が提供される。  The silicon-containing electrode of a semiconductor device is nitrided using active species activated by plasma discharge of a gas containing nitrogen element in its chemical formula, resulting in a capacitor insulating film with a thickness of 3 OA or more. A method of manufacturing a semiconductor device forming a nitride film as a semiconductor device is provided.
このように、 プラズマ処理により窒化膜を形成すると、 処理温度が低. 温となり、 ステップカバレッジが改善され、 半導体装置のパターン形状 がどのような場合にも膜厚均一性がよくなる。 また、 窒化膜の膜厚を 3 0 A以上とすることによってキャパシタ絶縁膜のリーク電流やチャージ アップといった電気特性を満足することができるようになる。 その結 果、 半導体 D R AMの消費電力を小さくでき、 携帯電話などの場合には バッテリの寿命をより長くすることができる。  As described above, when the nitride film is formed by the plasma processing, the processing temperature is lowered, the step coverage is improved, and the film thickness uniformity is improved regardless of the pattern shape of the semiconductor device. Further, by setting the thickness of the nitride film to 30 A or more, it becomes possible to satisfy electric characteristics such as leak current and charge-up of the capacitor insulating film. As a result, the power consumption of the semiconductor DRAM can be reduced, and the battery life can be prolonged in the case of a mobile phone or the like.
好ま Lくは、 酸素元素をその化学式中に含むガスをプラズマ放電する ことにより活性化した活性種を使用して前記窒化膜表面を酸化してキヤ パシ夕絶縁膜を形成する。 このようにすることにより、 更に好適にキヤ パシタ絶縁膜を形成することができる。 Preferably, plasma discharge of gas containing oxygen element in its chemical formula The surface of the nitride film is oxidized using the activated species activated in this way to form a capacitor insulating film. By doing so, the capacitor insulating film can be formed more suitably.
本発明の他の好ましい形態によれば、  According to another preferred form of the invention,
酸素元素をその化学式中に含むガスをプラズマ放電することにより活 性化した活性種を使用して半導体装置のシリコンを含む電極を酸化処理 し、 次に窒素元素をその化学式中に含むガスをプラズマ放電することに より活性化した活性種を使用して前記酸化処理された電極を窒化処理す ることで、 前記電極表面に酸化膜、 酸窒化膜および窒化膜を形成し、 少 なくとも酸窒化膜および窒化膜の合計膜厚が 3 O A以上となるように形 成してキャパシ夕絶縁膜を形成する半導体装置の製造方法が提供され る。 このようにすることによって、 更に好適にキャパシ夕絶縁膜を形成 することができる。  An electrode containing silicon of a semiconductor device is oxidized using active species activated by plasma discharge of a gas containing an oxygen element in the chemical formula, and then a gas containing a nitrogen element in the chemical formula is plasma-treated. By nitriding the oxidized electrode using active species activated by discharging, an oxide film, an oxynitride film, and a nitride film are formed on the electrode surface, and at least oxynitridation is performed. Provided is a method for manufacturing a semiconductor device in which a total thickness of a film and a nitride film is 3 OA or more to form a capacity insulating film. By doing so, the capacity insulating film can be formed more suitably.
この場合に、 好ましくは、 酸素元素をその化学式中に含むガスをブラ ズマ放電することにより活性化した活性種を使用して半導体装置のシリ コンを含む電極を酸化処理し、 次に窒素元素をその化学式中に含むガス をプラズマ放電することにより活性化した活性種を使用して前記酸化処 理された電極を窒化処理することで、 前記電極表面に酸化膜および窒化 膜を形成し、 少なくとも酸窒化膜および窒化膜の合計膜厚が 3 O A以上 の窒化膜とを形成してキャパシタ絶縁膜を形成する。  In this case, preferably, an electrode containing silicon of the semiconductor device is oxidized using active species activated by plasma discharge of a gas containing oxygen in its chemical formula, and then nitrogen is added. By nitriding the oxidized electrode using active species activated by plasma discharge of a gas contained in the chemical formula, an oxide film and a nitride film are formed on the electrode surface. A capacitor insulating film is formed by forming a nitride film and a nitride film having a total film thickness of 3 OA or more.
なお、 上記各プラズマ処理は、 好ましくは、 基板を処理する処理室 と、 処理室内で基板を支持する基板支持体と、 処理室周辺に配置された 電極、 好ましくは筒状電極と、 磁力線形成手段とを備える基板処理装置 によって行われる。 次に、 本発明の好ましい実施の形態を図面を参照して更に詳細に説明 する。 Preferably, each of the above plasma treatments includes a processing chamber for processing a substrate, a substrate support for supporting the substrate in the processing chamber, an electrode disposed around the processing chamber, preferably a cylindrical electrode, and a magnetic field line forming means. This is performed by a substrate processing apparatus having: Next, preferred embodiments of the present invention will be described in more detail with reference to the drawings. I do.
図 1 A、 1 B、 1 Cにおいて、 本発明の好ましい実施形態の半導体装 置の製造方法により製造された半導体装置の概略部分断面図が示されて いる。  1A, 1B, and 1C show schematic partial cross-sectional views of a semiconductor device manufactured by a method for manufacturing a semiconductor device according to a preferred embodiment of the present invention.
まず図 1 Aに示す半導体装置では、 半導体シリコンウェハに、 ドープ トポリシリコン膜またはド一プされたベアシリコン領域が形成されたト レンチを形成して、 トレンチ形状のド一ブトポリシリコン下電極または ドープされたベアシリコン電極である半導体装置の電極 1を形成する。 その後、 電極 1表面をプラズマ処理により窒化させる。 即ち、 窒素元 素をその化学式中に含むガス、 例えば窒素ガスをプラズマ放電すること により活性化した活性種を使用して電極 1を窒化する。 この窒化処理に より窒化膜 (S i N膜) 2が形成される。 この窒化膜 2の膜厚を 3 O A 以上にすると、 半導体装置のキャパシタ絶縁膜としての電気特性を満足 させることができる。 特に電気容量を増大させるのに効果がある。 そし て、 次にドーブトポリシリコン膜を用いて上電極 3を形成し、 半導体装 置を形成していく。  First, in the semiconductor device shown in FIG. 1A, a trench on which a doped polysilicon film or a doped bare silicon region is formed is formed on a semiconductor silicon wafer to form a trench-shaped lower polysilicon electrode. Alternatively, the electrode 1 of the semiconductor device which is a doped bare silicon electrode is formed. Thereafter, the surface of the electrode 1 is nitrided by plasma treatment. That is, the electrode 1 is nitrided by using a gas containing nitrogen element in its chemical formula, for example, an active species activated by plasma discharge of nitrogen gas. By this nitriding treatment, a nitride film (SiN film) 2 is formed. When the thickness of the nitride film 2 is 3 O A or more, the electrical characteristics of the capacitor insulating film of the semiconductor device can be satisfied. In particular, it is effective in increasing the electric capacity. Then, the upper electrode 3 is formed using a doped polysilicon film, and a semiconductor device is formed.
図 1 Bに示す半導体装置では、 図 1 Aに示した半導体装置の窒化膜 2 表面を、 さらに酸素元素をその化学式中に含むガス、 例えば酸素ガスを プラズマ放電することにより活性化した活性種を使用して酸化する。 こ のように例えば 3 5 A〜4 O Aの窒化膜を酸化すると、 表面がほぼ酸化 膜 (S i 02膜) であってこの酸化膜よりも深いところでは酸窒化膜 (S i O N膜) となってこの酸窒化膜中で酸素濃度が深さ方向で除々に減つ ており、 この酸化膜と酸窒化膜が 5〜 1 O A形成され、 前記酸窒化膜よ りもさらに深いところでは窒化膜 (S i N膜) となり、 およそ 3 O A形 成されている。 窒化膜は電気容量を増大させる特性を示し、 酸化膜はリ ーク電流を低減する特性を示し、 酸窒化膜は窒化膜と酸化膜の中間的な 特性を示し、 この酸窒化膜では酸素濃度が大きくなれば酸化膜の特性に 近づき、 窒素濃度が大きくなれば窒化膜の特性に近づく。 本実施例で は、 窒化膜を主体的に形成してから酸化量を調整しながら酸化処理して いるので、 電気容量を増大させる目的の半導体装置を製造する場合に適 している。 ここで、 酸化濃度とは、 酸窒化膜中の単位体積当りの酸素原 子数を酸窒化膜の単位体積当りの総原子数 (シリコン、 酸素、 窒素全て の原子数のことであり、 6 . 6 X 1 0 2 2) で割った値のことである。 ま た、 窒素濃度とは酸窒化膜中の単位体積当りの窒素原子数を酸窒化膜の 単位体積当りの総原子数 (シリコン、 酸素、 窒素全ての原子数のことで あり、 6 . 6 X 1 0 2 2) で割った値のことである。 そして、 次にドープ トポリシリコン膜を用いて上電極 3を形成し、 半導体装置を形成してい 図 1 Cに示す半導体装置では、 半導体シリコンウェハに、 ドープ卜ポ リシリコン膜またはドープされたベアシリコン領域が形成されたトレン チを形成して、 トレンチ形状のドーブトポリシリコン下電極またはド一 プされたベアシリコン電極である半導体装置の電極 1を形成する。 その後、 電極 1表面をプラズマ処理により-酸化させ、 次にプラズマ処 理により窒化させる。 即ち、 酸素元素をその化学式中に含むガス、 例え ば酸素ガスをプラズマ放電することにより活性化した活性種を使用して 半導体装置の電極 1を酸化する。 次に、 窒素元素をその化学式中に含む ガス、 例えば窒素ガスをプラズマ放電することにより活性化した化学種 を使用して、 酸化された電極 1表面を窒化し、 このように例えば 3 5 A 〜4 O Aの酸化膜を窒化すると、 表面からおよそ 5〜1 O Aまでは窒化 膜 (S i N膜) となり、 この窒化膜よりも深いところでは酸窒化膜 (S i〇N膜) となってこの酸窒化膜中で窒素濃度が深さ方向で徐々に減つ ており、 この酸窒化膜がおよそ 2 0〜2 5 A形成されており、 これら窒 化膜と酸窒化膜の合計膜厚を少なくとも 3 O A以上とし、 さらにこの酸 窒化膜よりもさらに深いところでは、 酸化膜 (S i〇2膜) がおよそ 5〜In the semiconductor device shown in FIG. 1B, the surface of the nitride film 2 of the semiconductor device shown in FIG. 1A is further treated with a gas containing an oxygen element in its chemical formula, for example, an activated species activated by plasma discharge of oxygen gas. Use and oxidize. When a nitride film of, for example, 35 A to 4 OA is oxidized in this way, the surface is almost an oxide film (SiO 2 film), and a portion deeper than this oxide film is an oxynitride film (SiO ON film). As a result, the oxygen concentration in the oxynitride film gradually decreases in the depth direction, and the oxide film and the oxynitride film are formed at 5-1 OA, and the nitrided portion is formed deeper than the oxynitride film. It becomes a film (SiN film) and is formed about 3 OA. A nitride film has the characteristic of increasing the electric capacity, an oxide film has a characteristic of reducing the leak current, and an oxynitride film has an intermediate property between the nitride film and the oxide film. In this oxynitride film, the characteristics are closer to those of the oxide film when the oxygen concentration is higher, and are closer to those of the nitride film when the nitrogen concentration is higher. In the present embodiment, the oxidation treatment is performed while adjusting the amount of oxidation after the nitride film is mainly formed, so that it is suitable for manufacturing a semiconductor device for the purpose of increasing the electric capacity. Here, the oxidation concentration refers to the number of oxygen atoms per unit volume in the oxynitride film as the total number of atoms per unit volume of the oxynitride film (the total number of atoms of silicon, oxygen, and nitrogen; 6. 6 X 1 0 2 2 ). In addition, the nitrogen concentration refers to the number of nitrogen atoms per unit volume in the oxynitride film as the total number of atoms per unit volume of the oxynitride film (the total number of atoms of silicon, oxygen, and nitrogen, 6.6 X It is the value divided by 1 0 2 2 ). Next, the upper electrode 3 is formed using a doped polysilicon film to form a semiconductor device. In the semiconductor device shown in FIG. 1C, a doped silicon film or a doped bare silicon film is formed on a semiconductor silicon wafer. A trench in which a region is formed is formed, and an electrode 1 of the semiconductor device, which is a trench-shaped doped polysilicon lower electrode or a doped bare silicon electrode, is formed. After that, the surface of the electrode 1 is oxidized by plasma treatment, and is then nitrided by plasma treatment. That is, the electrode 1 of the semiconductor device is oxidized using a gas containing oxygen element in its chemical formula, for example, an active species activated by plasma discharge of oxygen gas. Next, the surface of the oxidized electrode 1 is nitrided by using a gas containing a nitrogen element in its chemical formula, for example, a chemical species activated by plasma discharge of nitrogen gas. When the oxide film of 4 OA is nitrided, it becomes a nitride film (SiN film) from the surface to about 5 to 1 OA, and an oxynitride film (SiSN film) at a depth deeper than this nitride film. In the oxynitride film, the nitrogen concentration gradually decreases in the depth direction, and this oxynitride film is formed at about 20 to 25 A. The total thickness of the monolayer and the oxynitride film with at least 3 OA or more, further at deeper than the oxynitride film, oxide film (S I_〇 2 film) is approximately 5
1 O A形成されている。 本実施例では、 酸化膜を主体的に形成してから 窒化量を調整しながら窒化処理しているので、 リーク電流を低減させる 目的の半導体装置を製造する場合に適している。 そして、 次にドーブト ポリシリコン膜を用いて上電極 3を形成し、 半導体装置を形成してい 図 2には、 上記図 1 A〜図 1 Cに示す半導体装置を製造するのに用い た変形マグネ口トン型プラズマ処理装置(Mod i f i ed Magne t ron Typed Pr ocess ing Sys t em (MM T装置) 2 4が示されている。 MM T装置2 4 は、 処理室 2 6を構成する真空容器 2 8を有する。 この真空容器 2 8 は、 上部容器 3 0と下部容器 3 2とが上下に接合されて構成されてい る。 上部容器 3 0は、 アルミナ、 石英等のセラミックからなる。 下部容 器 3 2はアルミニウム等の金属製であり、 接地されている。 上部容器 3 0の周囲はカバー 3 4に覆われている。 また、 上部容器 3 0はドーム状 の天井部を有する円筒形であり、 この天井部には、 上蓋部 3 6とシャヮ 一板部 3 8とが形成され、 この上蓋部 3 6.とシャワー板部 3 8との間に 拡散室 4 0が構成されている。 上蓋部 3 6はアルミニウム等の金属製で あり、 接地されている。 シャワー板部 3 8は石英やアルミナ等の誘電体 製である。 また、 上蓋部 3 6には処理ガスを導入する導入口 4 2が形成 され、 シャワー板部 3 8には、 多数のノズル 4 4が形成されており、 導 入口 4 2から導入された例えば 2種の処理ガスは、 拡散室 4 0で混合 · 拡散され、 シャワー板 3 8のノズル 4 4から処理室 2 6に供給されるよ うになっている。 1 O A is formed. In the present embodiment, since the nitriding treatment is performed while adjusting the amount of nitriding after the oxide film is mainly formed, it is suitable for manufacturing a semiconductor device for the purpose of reducing the leak current. Then, the upper electrode 3 is formed using a doped polysilicon film to form a semiconductor device. FIG. 2 shows the deformed magnet used to manufacture the semiconductor device shown in FIGS. 1A to 1C. A ton-type plasma processing apparatus (Modified Magnetic Typed Processing System (MMT apparatus) 24) is shown.The MMT apparatus 24 is a vacuum vessel 2 constituting a processing chamber 26. The vacuum container 28 includes an upper container 30 and a lower container 32 which are vertically joined to each other The upper container 30 is made of a ceramic such as alumina or quartz. 32 is made of metal such as aluminum and is grounded, and the periphery of the upper container 30 is covered with a cover 34. The upper container 30 is cylindrical with a dome-shaped ceiling. On the ceiling, an upper cover 36 and a shield plate 38 are formed. A diffusion chamber 40 is formed between 36 and the shower plate 38. The upper cover 36 is made of metal such as aluminum and is grounded.The shower plate 38 is made of quartz or alumina. In addition, an inlet 42 for introducing a processing gas is formed in the upper lid 36, and a number of nozzles 44 are formed in the shower plate 38. For example, two kinds of processing gases introduced from 42 are mixed and diffused in the diffusion chamber 40 and supplied to the processing chamber 26 from the nozzle 44 of the shower plate 38.
処理室 2 6には、 基板 Wを支持する基板支持体であるサセプ夕 4 6が 配置されている。 このサセプ夕 4 6には、 基板 Wを加熱するためのヒー 夕が設けられている。 また、 下部容器 3 2には、 排気口 4 8が設けら れ、 この排気口 4 8から処理室 2 6内の処理ガスが排気されるようにな つている。 In the processing chamber 26, a susceptor 46 as a substrate support for supporting the substrate W is disposed. This susceptor has a heater for heating the substrate W. Evening is set up. Further, the lower container 32 is provided with an exhaust port 48, and the processing gas in the processing chamber 26 is exhausted from the exhaust port 48.
筒状電極 5 0は、 処理室 2 6の周囲、 即ち、 上部容器 3 0の外周に上 部容器 3 0とは 2 mm程度の微小な間隔を隔てて配置されている。 この 筒状電極 5 0は、 整合器 5 2を介して高周波電源 5 4に接続されてい る。 この高周波電源 5 4は、 例えば 1 3 . 5 6 MH zの周波数を持つ高 周波電力を発生し、 制御装置 5 6からの制御信号に応じて電力の大きさ が調整される。 また、 磁力線形成手段 5 8は、 例えばリング状に形成さ れた 2つの永久磁石 6 0 , 6 2から構成され、 処理室 2 6の周囲に配置 されている。 この 2つの永久磁石 6 0, 6 2は、 径方向で互いに逆向き に着磁されており、 処理室 2 6内には一方の永久磁石 6 0から中心方向 に延び、 他方の永久磁石 6 2に戻る磁力線が形成される。  The cylindrical electrode 50 is disposed around the processing chamber 26, that is, on the outer periphery of the upper container 30 with a small interval of about 2 mm from the upper container 30. The cylindrical electrode 50 is connected to a high-frequency power supply 54 via a matching device 52. The high-frequency power supply 54 generates high-frequency power having a frequency of, for example, 13.56 MHz, and the magnitude of the power is adjusted according to a control signal from the control device 56. The magnetic field line forming means 58 is composed of, for example, two permanent magnets 60 and 62 formed in a ring shape, and is arranged around the processing chamber 26. The two permanent magnets 60 and 62 are magnetized in opposite directions in the radial direction, and extend in the processing chamber 26 from one permanent magnet 60 toward the center and the other permanent magnet 62 Are formed.
前述したサセプ夕 4 6には、 高周波回路 (インピーダンス可変回路) 6 4が接続されている。 この高周波回路 6 4は、 前述した制御装置 5 6 からの制御信号に応じてサセプ夕インピーダンスを調整できるようにし てある。  A high frequency circuit (variable impedance circuit) 64 is connected to the susceptor 46 described above. The high-frequency circuit 64 can adjust the susceptor impedance according to the control signal from the control device 56 described above.
高周波回路 6 4は、 コイルとコンデンサが直列または並列に配置され た回路であり、 コイルのィンダクタンスゃコンデンサの容量を制御する ことによって、 高周波回路 6 4のインピーダンスを調整でき、 それによ つて、 サセプ夕 4 6を介して基板 Wの電位を制御できるようになつてい る。  The high-frequency circuit 64 is a circuit in which a coil and a capacitor are arranged in series or in parallel. The impedance of the high-frequency circuit 64 can be adjusted by controlling the inductance of the coil divided by the capacitance of the capacitor. The potential of the substrate W can be controlled through the evening.
図 3に、 上述した高周波回路 6 4の内部回路を示す。 回路は、 電源を 含まず、 受動素子のみから構成されている。 具体的には、 コイル 1 2 1 とコンデンサ 1 2 3が直列接続してある。 コイル 1 2 1にはインダクタ ンスを可変できるようにターミナル 1 2 2を数箇所設けてある。 目的の インダクタンスの値が得られるように、 ターミナル 1 2 2を任意に短絡 してコイルのパターン数を制御する。 コンデンサ 1 2 3には自己の静電 容量をリニアに可変可能な可変コンデンサを使用している。 このコイル 1 2 1とコンデンサ 1 2 3のうち少なくとも一方を調整し、 高周波回路 6 4を希望のインピーダンス値に調整して、 基板 Wの電位を制御できる ようになつている。 なお、 このように、 可変コイルまたは可変コンデン サの少なくとも一方を調整することにより高周波回路 6 4のインピーダ ンスを変更することができるが、 固定のコイルと固定コンデンサを使用 する場合であってもインピーダンスの異なる 2つ以上の回路を切替えて もよいことは勿論である。 FIG. 3 shows an internal circuit of the high-frequency circuit 64 described above. The circuit does not include a power supply and consists only of passive elements. Specifically, the coil 1 2 1 and the capacitor 1 2 3 are connected in series. The coil 122 is provided with several terminals 122 so that the inductance can be varied. Objective Terminals 1 and 2 are arbitrarily short-circuited to control the number of coil patterns so that the inductance value can be obtained. A variable capacitor capable of linearly changing its own capacitance is used for the capacitor 123. By adjusting at least one of the coil 12 1 and the capacitor 12 3, the high-frequency circuit 64 is adjusted to a desired impedance value, so that the potential of the substrate W can be controlled. As described above, the impedance of the high-frequency circuit 64 can be changed by adjusting at least one of the variable coil and the variable capacitor. However, even when a fixed coil and a fixed capacitor are used, the impedance is reduced. Of course, two or more circuits different from each other may be switched.
本発明の好ましい実施の形態に使用する MM T装置 2 4では、 永久磁 石 6 0、 6 2の磁界の影響を受けてマグネトロン放電が発生し、 基板 W の上方空間に電荷をトラップして高密度プラズマが生成される。 そし て、 生成された高密度プラズマにより、 サセプタ 4 6上の基板 Wの表面 にプラズマ酸化処理又はプラズマ窒化処理が施される。 なお、 表面処理 の開始および終了は高周波電力の印加おょぴ停止によって行なわれる。 基板 Wの表面又は下地膜表面を酸化処理又は窒化処理する際に、 サセ プ夕 4 6と接地間に介設した高周波回路 6 4を、 予め所望のインピーダ ンス値に制御しておく。 高周波回路 6 4を所望のインピーダンス値に調 整すると、 それにより基板 Wの電位が制御されて、 所望の膜厚及び面内 膜厚均一性をもつ酸化処理膜又は窒化処理膜が形成できる。  In the MMT device 24 used in the preferred embodiment of the present invention, a magnetron discharge is generated under the influence of the magnetic field of the permanent magnets 60 and 62, and the electric charge is trapped in the space above the substrate W to increase the magnetron discharge. A density plasma is generated. Then, the surface of the substrate W on the susceptor 46 is subjected to a plasma oxidation treatment or a plasma nitridation treatment by the generated high-density plasma. The surface treatment is started and stopped by applying and stopping high-frequency power. When oxidizing or nitriding the surface of the substrate W or the surface of the underlying film, the high-frequency circuit 64 interposed between the susceptor 46 and the ground is controlled in advance to a desired impedance value. When the high-frequency circuit 64 is adjusted to a desired impedance value, the potential of the substrate W is controlled thereby, and an oxidized film or a nitrided film having a desired film thickness and in-plane film thickness uniformity can be formed.
高周波電力の出力値制御やバイアス電力供給制御を行う平行平板電極 型プラズマ装置では、 上述したような MM T装置によるインピーダンス 制御による膜厚制御はできない。 原理的には、 平行平板電極型プラズマ 装置でも、 サセプタ電圧を上げていけば、 3 n m以上の酸化膜もしくは 窒化膜を形成することは可能である。 しかし、 平行平板電極型プラズマ 装置では、 放電用電圧とサセプタ電圧とは独立に制御できないので、 サ セプタ電圧を上げると強い電界が基板にかかるので、 プラズマダメージ により膜質が悪く、 膜厚均一性も悪くなる。 In a parallel plate electrode type plasma apparatus that controls the output value of the high frequency power and the control of the supply of the bias power, the film thickness cannot be controlled by the impedance control by the MMT apparatus as described above. In principle, it is possible to form an oxide film or nitride film of 3 nm or more by increasing the susceptor voltage even in a parallel plate electrode type plasma device. However, parallel plate electrode type plasma In the device, the discharge voltage and the susceptor voltage cannot be controlled independently. Therefore, when the susceptor voltage is increased, a strong electric field is applied to the substrate, so that the film quality is deteriorated due to plasma damage and the film thickness uniformity is also deteriorated.
■ これに対し、 本実施の形態の MM T装置では、 筒状の放電電極 5 0に 高周波が印加されると、 放電電極 5 0と接地されている上蓋部 3 6、 接 地されている高周波回路 6 4に接続されたサセプタ 4 6、 及び接地され た下容器 3 2との間で電界が生じ放電が起き、 プラズマが発生する。 そ して発生したプラズマは磁力線に沿って拡散し、 基板 W表面全体に広が る。 また、 筒状の放電電極表面において、 高いエネルギーの電子は強い 磁力線にトラップされることにより低い圧力でも効率よく高密度のブラ ズマを生成することが可能であるので、 基板 W表面に高密度のプラズマ を均一に作ることができる。 このように、 放電用電極により電界をか け、 更に磁力線による電荷のトラップを行うことにより、 平行平板電極 型プラズマ装置に比べて、 プラズマ密度を上げている。 さらに、 サセプ 夕 4 6に接続されている高周波回路 6 4のコイルのインダク夕ンス或い はコンデンサのキャパシタンスを可変することにより、 高周波回路 6 4 の高周波インピーダンスを制御して、 基板 Wの電位を制御可能であり、 基板 Wへのプラズマ入射エネルギーを制御することが出来る。 このよう に、 プラズマを生成する放電用電極の電圧ではなく、 プラズマ生成とは 独立に制御することができるサセプ夕電位を制御してプラズマ入射エネ ルギーを制御しているので、 基板にプラズマダメージがなく、 成膜され る膜質も良好に維持できる。  On the other hand, in the MMT device of the present embodiment, when a high frequency is applied to the cylindrical discharge electrode 50, the upper lid 36 grounded to the discharge electrode 50 and the high frequency grounded An electric field is generated between the susceptor 46 connected to the circuit 64 and the grounded lower container 32 to cause discharge and generate plasma. The generated plasma diffuses along the lines of magnetic force and spreads over the entire surface of the substrate W. In addition, high-energy electrons are trapped by strong lines of magnetic force on the surface of the cylindrical discharge electrode, which enables efficient generation of high-density plasma even at low pressure. Plasma can be created uniformly. As described above, the electric field is applied by the discharge electrode, and the electric charge is trapped by the lines of magnetic force, thereby increasing the plasma density as compared with the parallel plate electrode type plasma apparatus. Further, by varying the inductance of the coil of the high-frequency circuit 64 connected to the susceptor 46 or the capacitance of the capacitor, the high-frequency impedance of the high-frequency circuit 64 is controlled to reduce the potential of the substrate W. It is possible to control the plasma incident energy to the substrate W. In this way, the plasma injection energy is controlled by controlling the susceptor potential, which can be controlled independently of the plasma generation, rather than the voltage of the discharge electrode that generates the plasma. Therefore, the quality of the formed film can be well maintained.
上述したように、 本実施の形態の MM T装置は、 他のプラズマ装置と 比較すると、 基板に入射するイオンのエネルギーを制御可能であり、 基 板に対するプラズマダメージが少ない。  As described above, the MMT device of the present embodiment can control the energy of ions incident on the substrate and has less plasma damage to the substrate than other plasma devices.
次に MM T装置 2 4の操作について説明する。 まず基板 Wとしての半 導体ウェハをサセプタ 4 6に載置し、 真空容器 2 8内のガスを排気口 4 8から排気して真空容器 2 8内を真空状態にする。 次に基板 Wの温度を 例えば室温から 4 0 0 °Cの温度範囲で、 基板 Wの処理条件に適した温度 となるようにサセプタ 4 6に設けられたヒー夕 (図示せず) により基板 Wの温度を調整する。 次に処理ガスを導入口 4 2から導入する。 この導 入口 4 2から導入された処理ガスは、 拡散室 4 0で拡散され、 シャワー 板部 3 8のノズル 4 4から処理室 2 6に供給される。 同時に高周波電源 5 4から高周波電力を筒状電極 5 0に供給する。 すると、 筒状電極 5 0 と接地されている上蓋部 3 6、 接地されている高周波回路 6 4に接続さ れたサセプ夕 4 6、 及び接地された下容器 3 2との間で電界が生じ放電 が起き、 プラズマが形成される。 また、 処理室 2 6においては、 磁力線 形成手段 5 8により磁力線が形成され、 この磁力線により処理室 2 6中 央までプラズマ放電が広がり、 高周波回路 6 4の調整によりインピーダ ンスを調整することにより、 サセプタ 4 6 (基板 W) の電位を調整し、 それによつて、 基板 Wへのプラズマ処理量を調整して基板 Wを処理され る。 所定時間経過後、 高周波電源 5 4からの高周波電力の供給を停止 し、 真空容器 2 8内のガスを排気口 4 8から排気し、 サセプタ 4 6上の 基板 Wを処理室 2 6から取り出して処理を終了する。 Next, the operation of the MMT device 24 will be described. First, a half as substrate W The conductor wafer is placed on the susceptor 46, and the gas in the vacuum vessel 28 is exhausted from the exhaust port 48 to make the vacuum vessel 28 vacuum. Next, the substrate W is heated by a heater (not shown) provided on the susceptor 46 so that the temperature of the substrate W is adjusted to a temperature suitable for the processing conditions of the substrate W, for example, in a temperature range from room temperature to 400 ° C. Adjust the temperature of the. Next, the processing gas is introduced from the inlet 42. The processing gas introduced from the inlet 42 is diffused in the diffusion chamber 40 and supplied to the processing chamber 26 from the nozzle 44 of the shower plate 38. At the same time, high-frequency power is supplied from the high-frequency power supply 54 to the cylindrical electrode 50. Then, an electric field is generated between the cylindrical electrode 50 and the upper lid 36 grounded, the susceptor 46 connected to the grounded high-frequency circuit 64, and the lower vessel 32 grounded. Discharge occurs and plasma is formed. Further, in the processing chamber 26, the magnetic field lines are formed by the magnetic field line forming means 58, and the plasma discharge spreads to the center of the processing chamber 26 by the magnetic field lines, and the impedance is adjusted by adjusting the high frequency circuit 64. The substrate W is processed by adjusting the potential of the susceptor 46 (substrate W), thereby adjusting the amount of plasma processing on the substrate W. After a lapse of a predetermined time, the supply of high-frequency power from the high-frequency power supply 54 is stopped, the gas in the vacuum vessel 28 is exhausted from the exhaust port 48, and the substrate W on the susceptor 46 is taken out of the processing chamber 26. The process ends.
前述した、 図 1 A、 図 1 B、 図 1 Cのいずれかに示した半導体装置を 製造する場合には、 基板 Wとしての半導体シリコンゥェ八が処理される ことにより、 この基板 Wに半導体装置が形成される。 キャパシ夕絶縁膜 の処理においては、 図 2に示す MM T装置を用い真空容器 2 8内の圧力 を所定圧力に制御し、 基板 Wの温度を室温から 4 0 0 °Cの温度範囲で制 御し、 窒素或は酸素は流量制御されて導入口 4 2より処理室 2 6へ導入 されていき、 筒状電極 5 0へ供給される高周波電力の周波数や電力量を 調整し、 磁力線形成手段 5 8の磁力強度を設定し、 サセプ夕 4 6の電位 を制御すること等により処理条件が設定される。 In the case of manufacturing the semiconductor device shown in FIG. 1A, FIG. 1B, or FIG. 1C described above, the semiconductor device is treated on the substrate W by processing the semiconductor silicon wafer 8 as the substrate W. It is formed. In the processing of the capacitor insulating film, the pressure in the vacuum vessel 28 is controlled to a predetermined pressure using the MMT apparatus shown in FIG. 2, and the temperature of the substrate W is controlled in a temperature range from room temperature to 400 ° C. Then, the flow rate of nitrogen or oxygen is controlled and introduced into the processing chamber 26 from the inlet 42, and the frequency and amount of the high-frequency power supplied to the cylindrical electrode 50 are adjusted, and the magnetic field line forming means 5 Set the magnetic strength of 8 and set the electric potential of The processing conditions are set by, for example, controlling.
標準的なプロセス条件は、 窒化処理の場合は、 温度: 0〜400°C、 圧力 : 2〜 30 P a、 処理ガス: N2、 流量: 100〜500 s c cm、 RFパワー: 800〜 1500 W、 Vp p : 250〜 800 Vであり、 酸化処理の場合は、 温度: 0〜400° (:、 圧力 : 2〜30 P a、 処理ガ ス : 02、 流量: 100〜 500 s c cm、 RFパワー 500〜 1500 W、 Vpp : 250〜 800 Vである。 ここで、 Vp pとは基板を載せ るサセプタ電位の最大値と最小値の差を指す。 Standard process conditions are as follows: For nitriding, temperature: 0 to 400 ° C, pressure: 2 to 30 Pa, process gas: N 2 , flow rate: 100 to 500 sccm, RF power: 800 to 1500 W , Vp p: a 250 to 800 V, in the case of oxidation, temperature: 0 to 400 ° (:, pressure: 2 to 30 P a, process gas: 0 2, flow rate: 100 to 500 sc cm, RF Power 500 to 1500 W, Vpp: 250 to 800 V. Here, Vpp refers to the difference between the maximum value and the minimum value of the susceptor potential for mounting the substrate.
これらのプロセス条件によって、 窒化膜、 酸化膜、 及び酸窒化膜は限 界膜厚 (膜厚のセルフリミット) が決まり、 処理時間を延ばしてもその 限界膜厚よりも処理が進行することはなく、 従って限界膜厚となるよう 処理時間を調整すれば、 パターン依存性がなくなり、 基板表面形状によ らず基板表面全体にわたって均一な膜厚にすることができる。 特に、 半 導体装置の微細化が進んだ場合、 半導体装置の電極が卜レンチ形状であ つたとしてもトレンチの底部 5や側部 6もそれぞれ均一な膜厚に処理す ることができる。  These process conditions determine the critical film thickness (self-limit) of the nitride, oxide, and oxynitride films, and the processing does not proceed beyond the critical film thickness even if the processing time is extended. Therefore, if the processing time is adjusted so as to reach the limit film thickness, pattern dependency is eliminated, and a uniform film thickness can be obtained over the entire substrate surface regardless of the substrate surface shape. In particular, when the miniaturization of the semiconductor device is advanced, even if the electrode of the semiconductor device has a trench shape, the bottom portion 5 and the side portion 6 of the trench can be processed to have a uniform film thickness.
MMT装置 24を使用して、 シリコン基; IS表面に形成した窒化膜の膜 厚の処理時間依存性を図 4に示す。 処理条件が、 放電電力 1000W, 圧力 30 P aの場合と、 放電電力 250 W, 圧力 30 P aの場合と、 放 電電力 250W, 圧力 80 P aの場合とを示している。 処理温度が室温 で、 面内均一性を ± 2 %以下に維持しながらシリコン表面を 10〜50 Aの範囲で窒化処理することができる。 また、 プロセス条件により窒化 される膜厚のセルフリミットがあるので、 パターン依存性なく表面窒化 することが可能であることを示している。  FIG. 4 shows the processing time dependence of the thickness of the nitride film formed on the silicon-based; IS surface using the MMT device 24. The processing conditions are as follows: discharge power 1000 W, pressure 30 Pa, discharge power 250 W, pressure 30 Pa, and discharge power 250 W, pressure 80 Pa. At a processing temperature of room temperature, the silicon surface can be nitrided in the range of 10-50 A while maintaining in-plane uniformity of ± 2% or less. In addition, it shows that the surface can be nitrided without pattern dependency because there is a self-limit of the film thickness to be nitrided depending on the process conditions.
このように、 MMT装置 24を使用すると、 Ta 205の CVD膜等と 比較して、 より微細化され高いァスぺクト比のパターンにも対してもよ り均一な膜厚の膜を形成でき、 また、 例えば窒化処理を行う場合には、 窒化膜の厚膜化が図れる。 Thus, the use of MMT device 24, as compared with the CVD film of Ta 2 0 5, even for even pattern of more miniaturized high § scan Bae transfected ratio A film having a uniform thickness can be formed, and, for example, in the case of performing a nitriding treatment, the thickness of the nitride film can be increased.
例えば、 T a 205の C V D膜の場合には、 深さ/幅の比が 2 0倍以上 超えると対応困難であるが、 MM T装置 2 4を使用すると、 より大きい アスペクト比にも対応でき、 例えば、 幅が 0 . 以下、 深さが 7 m以上とトレンチや、 ァスぺクト比が約 1 0 0以上のトレンチにも対 応可能である。 For example, in the case of the CVD film of the T a 2 0 5 is the difficulty associated with the ratio of the depth / width exceeds 2 0 times or more, by using the MM T unit 2 4, in an aspect ratio greater than the corresponding For example, it can be applied to trenches having a width of less than 0.1 and a depth of 7 m or more, and trenches having an aspect ratio of about 100 or more.
なお、 例えば、 図 1 Cの半導体装置を製造するには、 基板支持体 (サ セプ夕) 4 6の高周波インピーダンスを切り替えまたは調整することに より、 基板 Wを酸化処理する第 1のプロセスと、 この第 1のプロセスに より形成された酸化膜を窒素ガスをプラズマで活性化した活性種により 窒化処理する第 2のプロセスとを、 連続して行うようにすることが好ま しい。  For example, in order to manufacture the semiconductor device of FIG. 1C, a first process of oxidizing the substrate W by switching or adjusting the high-frequency impedance of the substrate support (susceptor) 46, It is preferable that the second process of nitriding the oxide film formed by the first process with an active species obtained by activating nitrogen gas by plasma is performed continuously.
第 1のプロセスは、 酸素のみでも可能であるが、 大量のクリプトンと 少量の酸素を前記処理室に導入して行うことが好ましい。 この第 1のプ ロセスにおいては、 良質な酸化膜を形成する必要があり、 そのために酸 素の単原子ラジカルのみを生成するように、.酸素ラジカルと同等のエネ ルギパンドを第一励起に持つ K rガスを少量の酸素と共に大量に入れて プラズマを発生させ、 酸素ラジカルで例えばシリコンからなる基板を酸 化する。 そのためには、 筒状電極及び磁力線形成手段により生成される プラズマと基板支持体との電位の位相を合わせるように、 基板支持体の 高周波インピーダンスを調整する。 これにより、 基板支持体上の被処理 基板へのイオンの進入を極力防止し、 プラズマ中に多量にある酸素ラジ カルで酸化することができる。  Although the first process can be performed using only oxygen, it is preferable to perform the first process by introducing a large amount of krypton and a small amount of oxygen into the treatment chamber. In this first process, it is necessary to form a high-quality oxide film, so that only the monoatomic radical of oxygen is generated. r A large amount of gas is injected with a small amount of oxygen to generate plasma, and oxygen radicals oxidize a substrate made of, for example, silicon. For this purpose, the high-frequency impedance of the substrate support is adjusted so that the potential of the plasma generated by the cylindrical electrode and the magnetic field line forming means and the potential of the substrate support are matched. As a result, entry of ions into the substrate to be processed on the substrate support can be prevented as much as possible, and oxidation can be performed with a large amount of oxygen radicals in the plasma.
一方、 第 2のプロセスにおいては、 窒化を行う場合、 窒素の励起エネ ルギは低いものの、 窒素原子を酸化膜中に S i O Nとなるように取り込 むには、 N 2を完全に解離させなくてはならない。 この解離のための活性 化工ネルギは非常に高いものである。 そのため、 第 1のプロセスとは逆 にプラズマと基板支持体との電位の位相を反転させてプラズマと基板支 持体とが共鳴するように、 基板支持体の高周波ィンピーダンスを調整 し、 酸化膜へのイオン入射を最大にする。 On the other hand, in the second process, when nitriding, although the nitrogen excitation energy is low, nitrogen atoms are incorporated into the oxide film so as to become Si ON. For this reason, N 2 must be completely dissociated. The activation energy for this dissociation is very high. Therefore, contrary to the first process, the high-frequency impedance of the substrate support is adjusted by inverting the phase of the potential between the plasma and the substrate support so that the plasma resonates with the substrate support. Maximize ion incidence on
第 2のプロセスにおいては、 処理ガスに、 更に H eガスを加えて処理 することが好ましい。 H eガスを入れると、 H eの解離エネルギは非常 に高く、 窒素との混合ガスにすることで、 N 2の励起よりも高い状態に持 つていき、 窒素の単原子化をアシストすることができる。 産業上の利用可能性 In the second process, it is preferable to further treat the processing gas with He gas. When He gas is introduced, the dissociation energy of He is very high, and by making it a mixed gas with nitrogen, it can be maintained at a higher state than the excitation of N 2 , and assists in the atomization of nitrogen. it can. Industrial applicability
以上のように、 本発明によれば、 低温で、 かつステップカバレッジの 優れたキャパシタ絶縁膜を形成し、 特にトレンチ形状表面の処理におい てもステップカバレッジに優れたキャパシ夕絶縁膜を形成することがで さる。  As described above, according to the present invention, it is possible to form a capacitor insulating film having a low temperature and excellent step coverage, and particularly to form a capacitor insulating film having an excellent step coverage even when treating a trench-shaped surface. In monkey.
その結果、 本発明は、 より微細化された半導体メモリの製造に特に好 適に利用できる。  As a result, the present invention can be used particularly favorably for the production of miniaturized semiconductor memories.
2 0 0 2年 1 1月 2 6日に出願された日本国特許出願 2 0 0 2 - 3 4 1 9 3 3号の、 明細書、 請求の範囲、 図面および要約書を含む開示内容 全体は、 そのまま引用してここに組み込まれる。 種々の典型的な実施の形態を示しかつ説明してきたが、 本発明はそれ らの実施の形態に限定されない。 従って、 本発明の範囲は、 次の請求の 範囲によってのみ限定されるものである。 The entire disclosure of Japanese Patent Application No. 2 0 2-3 4 1 9 3 3 filed on January 26, 2001, including the description, claims, drawings and abstract, is as follows. , Which are incorporated here as they are. While various exemplary embodiments have been shown and described, the invention is not limited to those embodiments. Therefore, the scope of the present invention is limited only by the following claims.

Claims

請求の範囲 The scope of the claims
1 . 窒素元素をその化学式中に含むガスをプラズマ放電することにより 活性化した活性種を使用して半導体装置のシリコンを含む電極を窒化処 理することで、 膜厚が 3 O A以上のキャパシタ絶縁膜としての窒化膜を 形成する半導体装置の製造方法。 1. Nitrogen treatment of silicon-containing electrodes of semiconductor devices using active species activated by plasma discharge of a gas containing nitrogen element in its chemical formula, thereby insulating capacitors with a thickness of 3 OA or more. A method for manufacturing a semiconductor device in which a nitride film is formed as a film.
2 . 酸素元素をその化学式中に含むガスをプラズマ放電することにより 活性化した活性種を使用して前記窒化膜表面を酸化してキャパシ夕絶縁 膜を形成することを特徴とする請求項 1の半導体装置の製造方法。 2. The method according to claim 1, wherein the surface of the nitride film is oxidized using active species activated by plasma discharge of a gas containing oxygen element in its chemical formula to form a capacitance insulating film. A method for manufacturing a semiconductor device.
3 . 酸素元素をその化学式中に含むガスをプラズマ放電することにより 活性化した活性種を使用して半導体装置のシリコンを含む電極を酸化処 理し、 次に窒素元素をその化学式中に含むガスをプラズマ放電すること により活性化した活性種を使用して前記酸化処理された電極を窒化処理 することで、 前記電極表面に酸化膜、 酸窒化膜および窒化膜を形成し、 少なくとも酸窒化膜および窒化膜の合計膜厚が 3 O A以上となるように 形成してキャパシタ絶縁膜を形成する半導体装置の製造方法。 3. Oxidation of the silicon-containing electrode of the semiconductor device using active species activated by plasma discharge of a gas containing oxygen in its chemical formula, and then a gas containing nitrogen in its chemical formula Nitriding the oxidized electrode using active species activated by plasma discharge of the oxidized film, forming an oxide film, an oxynitride film, and a nitride film on the electrode surface; A method of manufacturing a semiconductor device in which a capacitor insulating film is formed by forming a total thickness of a nitride film to be 3 OA or more.
4 . 前記電極は溝形状である請求項 1乃至 3のいずれかに記載の半導体 装置の製造方法。 4. The method for manufacturing a semiconductor device according to claim 1, wherein the electrode has a groove shape.
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JP2007005696A (en) * 2005-06-27 2007-01-11 Tokyo Electron Ltd Plasma nitriding method and manufacturing method of semiconductor device
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