WO2004023718A3 - Systems and methods for packet flow regulation and transmission integrity verification of a switching entity - Google Patents

Systems and methods for packet flow regulation and transmission integrity verification of a switching entity Download PDF

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Publication number
WO2004023718A3
WO2004023718A3 PCT/CA2003/001353 CA0301353W WO2004023718A3 WO 2004023718 A3 WO2004023718 A3 WO 2004023718A3 CA 0301353 W CA0301353 W CA 0301353W WO 2004023718 A3 WO2004023718 A3 WO 2004023718A3
Authority
WO
WIPO (PCT)
Prior art keywords
packets
switching entity
receipt
packet flow
systems
Prior art date
Application number
PCT/CA2003/001353
Other languages
French (fr)
Other versions
WO2004023718A2 (en
Inventor
Mohammed Sammour
Jean Belanger
Maria Marcelo A R De
Original Assignee
Hyperchip Inc
Mohammed Sammour
Jean Belanger
Maria Marcelo A R De
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyperchip Inc, Mohammed Sammour, Jean Belanger, Maria Marcelo A R De filed Critical Hyperchip Inc
Priority to AU2003264210A priority Critical patent/AU2003264210A1/en
Publication of WO2004023718A2 publication Critical patent/WO2004023718A2/en
Publication of WO2004023718A3 publication Critical patent/WO2004023718A3/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/26Flow control; Congestion control using explicit feedback to the source, e.g. choke packets
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/27Evaluation or update of window size, e.g. using information derived from acknowledged [ACK] packets
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/29Flow control; Congestion control using a combination of thresholds
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/30Peripheral units, e.g. input or output ports
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/50Overload detection or protection within a single switching element

Abstract

A system for regulating packet flow through a switch fabric and a system for verifying the transmission integrity of the fabric. In the first system, an ingress sends packets to the switching entity in a designated order and an egress receives packets from the switching entity, re-orders the packets in the designated order and sends an acknowledgement of receipt of the packets to the ingress upon re-ordering. The ingress receives acknowledgements of receipt of packets from the egress, maintains an indication of a number of packets for which an acknowledgement of receipt has not yet been received, performs a comparison between the number of packets for which an acknowledgement of receipt has not yet been received and a threshold, and regulates sending packets to the switching entity on the basis of the comparison. The principle behind the second system is based on exchanging marker packets at identifiable reference instant.
PCT/CA2003/001353 2002-09-03 2003-09-03 Systems and methods for packet flow regulation and transmission integrity verification of a switching entity WO2004023718A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003264210A AU2003264210A1 (en) 2002-09-03 2003-09-03 Systems and methods for packet flow regulation and transmission integrity verification of a switching entity

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US40735702P 2002-09-03 2002-09-03
US40735602P 2002-09-03 2002-09-03
US60/407,357 2002-09-03
US60/407,356 2002-09-03

Publications (2)

Publication Number Publication Date
WO2004023718A2 WO2004023718A2 (en) 2004-03-18
WO2004023718A3 true WO2004023718A3 (en) 2004-09-10

Family

ID=31981502

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CA2003/001353 WO2004023718A2 (en) 2002-09-03 2003-09-03 Systems and methods for packet flow regulation and transmission integrity verification of a switching entity

Country Status (2)

Country Link
AU (1) AU2003264210A1 (en)
WO (1) WO2004023718A2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9059915B2 (en) 2012-08-31 2015-06-16 Cisco Technology, Inc. Multicast replication skip
US8958329B2 (en) 2012-11-20 2015-02-17 Cisco Technology, Inc. Fabric load balancing
US10122645B2 (en) 2012-12-07 2018-11-06 Cisco Technology, Inc. Output queue latency behavior for input queue based device
US9628406B2 (en) 2013-03-13 2017-04-18 Cisco Technology, Inc. Intra switch transport protocol
US9860185B2 (en) 2013-03-14 2018-01-02 Cisco Technology, Inc. Intra switch transport protocol
CN112822119B (en) * 2020-12-31 2022-09-13 北京浩瀚深度信息技术股份有限公司 Flow control method, flow control equipment and storage medium based on reverse token bucket

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6076112A (en) * 1995-07-19 2000-06-13 Fujitsu Network Communications, Inc. Prioritized access to shared buffers

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6076112A (en) * 1995-07-19 2000-06-13 Fujitsu Network Communications, Inc. Prioritized access to shared buffers

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
DIOT C ET AL: "Impact of out-of-sequence processing on the performance of data transmission", COMPUTER NETWORKS, ELSEVIER SCIENCE PUBLISHERS B.V., AMSTERDAM, NL, vol. 31, no. 5, 11 March 1999 (1999-03-11), pages 475 - 492, XP004304495, ISSN: 1389-1286 *
KOFMAN D: "Traffic and congestion control in broadband networks", DECISION AND CONTROL, 1996., PROCEEDINGS OF THE 35TH IEEE CONFERENCE ON KOBE, JAPAN 11-13 DEC. 1996, NEW YORK, NY, USA,IEEE, US, 11 December 1996 (1996-12-11), pages 2894 - 2898, XP010213672, ISBN: 0-7803-3590-2 *
TAHAR S ET AL: "Formal verification of an ATM switch fabric using multiway decision graphs", VLSI, 1996. PROCEEDINGS., SIXTH GREAT LAKES SYMPOSIUM ON AMES, IA, USA 22-23 MARCH 1996, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 22 March 1996 (1996-03-22), pages 106 - 111, XP010157903, ISBN: 0-8186-7502-0 *

Also Published As

Publication number Publication date
AU2003264210A8 (en) 2004-03-29
AU2003264210A1 (en) 2004-03-29
WO2004023718A2 (en) 2004-03-18

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