WO2003079434A3 - Semiconductor device having a wire bond pad and method therefor - Google Patents

Semiconductor device having a wire bond pad and method therefor Download PDF

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Publication number
WO2003079434A3
WO2003079434A3 PCT/US2003/007783 US0307783W WO03079434A3 WO 2003079434 A3 WO2003079434 A3 WO 2003079434A3 US 0307783 W US0307783 W US 0307783W WO 03079434 A3 WO03079434 A3 WO 03079434A3
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WO
WIPO (PCT)
Prior art keywords
bond pad
wire bond
metal layer
final metal
semiconductor device
Prior art date
Application number
PCT/US2003/007783
Other languages
French (fr)
Other versions
WO2003079434A2 (en
Inventor
Susan H Downey
James W Miller
Geoffrey B Hall
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Priority to AU2003218146A priority Critical patent/AU2003218146A1/en
Priority to JP2003577330A priority patent/JP4308671B2/en
Priority to KR1020047014382A priority patent/KR100979080B1/en
Priority to EP03714137.1A priority patent/EP1483789B1/en
Publication of WO2003079434A2 publication Critical patent/WO2003079434A2/en
Publication of WO2003079434A3 publication Critical patent/WO2003079434A3/en

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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/0504—14th Group
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Abstract

An integrated circuit (50) has a wire bond pad (53). The wire bond pad (53) is formed on a passivation layer (18) over active circuitry (26) and/or electrical interconnect layers (24) of the integrated circuit (50). The wire bond pad (53) is connected to a plurality of final metal layer portions (51, 52). The plurality of final metal layer portions (51, 52) are formed in a final interconnect layer of the interconnect layers (24). In one embodiment, the bond pad (53) is formed from aluminum and the final metal layer pads are formed from copper. The wire bond pad (53) allows routing of conductors in a final metal layer (28) directly underlying the bond pad (53), thus allowing the surface area of the semiconductor die to be reduced.
PCT/US2003/007783 2002-03-13 2003-03-12 Semiconductor device having a wire bond pad and method therefor WO2003079434A2 (en)

Priority Applications (4)

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AU2003218146A AU2003218146A1 (en) 2002-03-13 2003-03-12 Semiconductor device having a wire bond pad and method therefor
JP2003577330A JP4308671B2 (en) 2002-03-13 2003-03-12 Semiconductor device having wire bond pad and manufacturing method thereof
KR1020047014382A KR100979080B1 (en) 2002-03-13 2003-03-12 Semiconductor device having a wire bond pad and method therefor
EP03714137.1A EP1483789B1 (en) 2002-03-13 2003-03-12 Semiconductor device having a wire bond pad and method therefor

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US10/097,059 2002-03-13
US10/097,059 US6614091B1 (en) 2002-03-13 2002-03-13 Semiconductor device having a wire bond pad and method therefor

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WO2003079434A3 true WO2003079434A3 (en) 2004-03-11

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US6614091B1 (en) 2003-09-02
AU2003218146A8 (en) 2003-09-29
KR20040088584A (en) 2004-10-16
EP1483789B1 (en) 2016-11-16
CN100461397C (en) 2009-02-11
JP4308671B2 (en) 2009-08-05
WO2003079434A2 (en) 2003-09-25
TW200305267A (en) 2003-10-16
CN1639865A (en) 2005-07-13
AU2003218146A1 (en) 2003-09-29
JP2005520342A (en) 2005-07-07
US20040036174A1 (en) 2004-02-26
US20030173637A1 (en) 2003-09-18
KR100979080B1 (en) 2010-08-31
US6846717B2 (en) 2005-01-25
TWI261906B (en) 2006-09-11
EP1483789A2 (en) 2004-12-08

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