WO2003077132A8 - Arrangement of integrated circuits in a memory module - Google Patents

Arrangement of integrated circuits in a memory module

Info

Publication number
WO2003077132A8
WO2003077132A8 PCT/US2003/006978 US0306978W WO03077132A8 WO 2003077132 A8 WO2003077132 A8 WO 2003077132A8 US 0306978 W US0306978 W US 0306978W WO 03077132 A8 WO03077132 A8 WO 03077132A8
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuits
row
register
arrangement
memory module
Prior art date
Application number
PCT/US2003/006978
Other languages
French (fr)
Other versions
WO2003077132A1 (en
Inventor
Jayesh R Bhakta
Robert S Pauley Jr
Original Assignee
Netlist Inc
Jayesh R Bhakta
Robert S Pauley Jr
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Netlist Inc, Jayesh R Bhakta, Robert S Pauley Jr filed Critical Netlist Inc
Priority to AU2003213767A priority Critical patent/AU2003213767A1/en
Publication of WO2003077132A1 publication Critical patent/WO2003077132A1/en
Publication of WO2003077132A8 publication Critical patent/WO2003077132A8/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09409—Multiple rows of pads, lands, terminals or dummy patterns; Multiple rows of mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09709—Staggered pads, lands or terminals; Parallel conductors in different planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

Integrated circuits (202) utilizing standard commercial packaging are arranged on a printed circuit board (104) to allow the production of 1-Gigabyte and 2-Gigabyte capacity memory modules (200). A first row of integrated circuits (202) is oriented in an opposite orientation to a second row of integrated circuits (202). The integrated circuits (202) in a first half of the first row and in the corresponding half of the second row are connected via a signal trace to a first register (210). The integrated circuits (202) in a second half of the first row and in the corresponding half of the second row are connected to a second register (220). Each register processes a non-contiguous subset of the bits in each data word.
PCT/US2003/006978 2002-03-07 2003-03-06 Arrangement of integrated circuits in a memory module WO2003077132A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003213767A AU2003213767A1 (en) 2002-03-07 2003-03-06 Arrangement of integrated circuits in a memory module

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/094,512 2002-03-07
US10/094,512 US6751113B2 (en) 2002-03-07 2002-03-07 Arrangement of integrated circuits in a memory module

Publications (2)

Publication Number Publication Date
WO2003077132A1 WO2003077132A1 (en) 2003-09-18
WO2003077132A8 true WO2003077132A8 (en) 2003-12-18

Family

ID=27788121

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/006978 WO2003077132A1 (en) 2002-03-07 2003-03-06 Arrangement of integrated circuits in a memory module

Country Status (3)

Country Link
US (6) US6751113B2 (en)
AU (1) AU2003213767A1 (en)
WO (1) WO2003077132A1 (en)

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US20040184299A1 (en) 2004-09-23
US20030169614A1 (en) 2003-09-11
AU2003213767A1 (en) 2003-09-22
US6751113B2 (en) 2004-06-15
US20040136229A1 (en) 2004-07-15
US6873534B2 (en) 2005-03-29
US6930900B2 (en) 2005-08-16
WO2003077132A1 (en) 2003-09-18
US20040184301A1 (en) 2004-09-23
US6930903B2 (en) 2005-08-16
US20040057269A1 (en) 2004-03-25
US20040184300A1 (en) 2004-09-23

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