WO2003034490A3 - Semiconductor structure with one or more through-holes - Google Patents

Semiconductor structure with one or more through-holes Download PDF

Info

Publication number
WO2003034490A3
WO2003034490A3 PCT/EP2002/011605 EP0211605W WO03034490A3 WO 2003034490 A3 WO2003034490 A3 WO 2003034490A3 EP 0211605 W EP0211605 W EP 0211605W WO 03034490 A3 WO03034490 A3 WO 03034490A3
Authority
WO
WIPO (PCT)
Prior art keywords
holes
semiconductor structure
seal
feed
disclosed
Prior art date
Application number
PCT/EP2002/011605
Other languages
French (fr)
Other versions
WO2003034490A2 (en
Inventor
Matthias Heschel
Original Assignee
Hymite As
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hymite As filed Critical Hymite As
Priority to AU2002351771A priority Critical patent/AU2002351771A1/en
Priority to JP2003537117A priority patent/JP4546087B2/en
Priority to EP02787490A priority patent/EP1436837B1/en
Priority to AT02787490T priority patent/ATE464656T1/en
Priority to DE60236007T priority patent/DE60236007D1/en
Publication of WO2003034490A2 publication Critical patent/WO2003034490A2/en
Publication of WO2003034490A3 publication Critical patent/WO2003034490A3/en
Priority to HK05107072A priority patent/HK1074913A1/en

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4219—Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4236—Fixing or mounting methods of the aligned elements
    • G02B6/4245—Mounting of the opto-electronic elements
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4274—Electrical aspects
    • G02B6/4279—Radio frequency signal propagation aspects of the electrical connection, high frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases

Abstract

Semiconductor structures with one or more through-holes are disclosed. A feed-through metallization process may be used to seal the through-holes hermetically.
PCT/EP2002/011605 2001-10-17 2002-10-15 Semiconductor structure with one or more through-holes WO2003034490A2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
AU2002351771A AU2002351771A1 (en) 2001-10-17 2002-10-15 Semiconductor structure with one or more through-holes
JP2003537117A JP4546087B2 (en) 2001-10-17 2002-10-15 Semiconductor structure with one or more through holes, method for providing the semiconductor structure, and optoelectronic assembly structure including the semiconductor structure
EP02787490A EP1436837B1 (en) 2001-10-17 2002-10-15 Semiconductor structure with one or more through-holes
AT02787490T ATE464656T1 (en) 2001-10-17 2002-10-15 SEMICONDUCTOR STRUCTURE WITH ONE OR MORE THROUGH HOLES
DE60236007T DE60236007D1 (en) 2001-10-17 2002-10-15 SEMICONDUCTOR STRUCTURE WITH ONE OR MORE CONTINUOUS HOLES
HK05107072A HK1074913A1 (en) 2001-10-17 2005-08-16 Semiconductor structure with one or more through-holes

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US32969901P 2001-10-17 2001-10-17
US60/329,699 2001-10-17
US10/264,440 2002-10-04
US10/264,440 US6818464B2 (en) 2001-10-17 2002-10-04 Double-sided etching technique for providing a semiconductor structure with through-holes, and a feed-through metalization process for sealing the through-holes

Publications (2)

Publication Number Publication Date
WO2003034490A2 WO2003034490A2 (en) 2003-04-24
WO2003034490A3 true WO2003034490A3 (en) 2004-04-01

Family

ID=26950546

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2002/011605 WO2003034490A2 (en) 2001-10-17 2002-10-15 Semiconductor structure with one or more through-holes

Country Status (9)

Country Link
US (3) US6818464B2 (en)
EP (1) EP1436837B1 (en)
JP (1) JP4546087B2 (en)
CN (1) CN100377333C (en)
AT (1) ATE464656T1 (en)
AU (1) AU2002351771A1 (en)
DE (1) DE60236007D1 (en)
HK (1) HK1074913A1 (en)
WO (1) WO2003034490A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8993450B2 (en) 2003-09-15 2015-03-31 Nuvotronics, Llc Device package and methods for the fabrication and testing thereof

Families Citing this family (113)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7345316B2 (en) * 2000-10-25 2008-03-18 Shipley Company, L.L.C. Wafer level packaging for optoelectronic devices
US6932519B2 (en) 2000-11-16 2005-08-23 Shipley Company, L.L.C. Optical device package
US6827503B2 (en) * 2000-12-01 2004-12-07 Shipley Company, L.L.C. Optical device package having a configured frame
US6883977B2 (en) * 2000-12-14 2005-04-26 Shipley Company, L.L.C. Optical device package for flip-chip mounting
US7078671B1 (en) * 2001-08-06 2006-07-18 Shipley Company, L.L.C. Silicon optical microbench devices and wafer-level testing thereof
US6818464B2 (en) * 2001-10-17 2004-11-16 Hymite A/S Double-sided etching technique for providing a semiconductor structure with through-holes, and a feed-through metalization process for sealing the through-holes
US7343535B2 (en) * 2002-02-06 2008-03-11 Avago Technologies General Ip Dte Ltd Embedded testing capability for integrated serializer/deserializers
US6969204B2 (en) * 2002-11-26 2005-11-29 Hymite A/S Optical package with an integrated lens and optical assemblies incorporating the package
JP4220229B2 (en) * 2002-12-16 2009-02-04 大日本印刷株式会社 Mask blank for charged particle beam exposure and method for manufacturing mask for charged particle beam exposure
JP2004273438A (en) * 2003-02-17 2004-09-30 Pioneer Electronic Corp Etching mask
WO2004087541A2 (en) * 2003-04-04 2004-10-14 Mobile Concepts, Inc. Pallet and conveyor system for loading onto transport
US7432788B2 (en) 2003-06-27 2008-10-07 Memscap, Inc. Microelectromechanical magnetic switches having rotors that rotate into a recess in a substrate
US7520679B2 (en) * 2003-09-19 2009-04-21 Avago Technologies Fiber Ip (Singapore) Pte. Ltd. Optical device package with turning mirror and alignment post
US6953990B2 (en) * 2003-09-19 2005-10-11 Agilent Technologies, Inc. Wafer-level packaging of optoelectronic devices
US20050063648A1 (en) * 2003-09-19 2005-03-24 Wilson Robert Edward Alignment post for optical subassemblies made with cylindrical rods, tubes, spheres, or similar features
US6982437B2 (en) * 2003-09-19 2006-01-03 Agilent Technologies, Inc. Surface emitting laser package having integrated optical element and alignment post
US20050063431A1 (en) 2003-09-19 2005-03-24 Gallup Kendra J. Integrated optics and electronics
US6930367B2 (en) * 2003-10-31 2005-08-16 Robert Bosch Gmbh Anti-stiction technique for thin film and wafer-bonded encapsulated microelectromechanical systems
US7091124B2 (en) 2003-11-13 2006-08-15 Micron Technology, Inc. Methods for forming vias in microelectronic devices, and methods for packaging microelectronic devices
US8084866B2 (en) 2003-12-10 2011-12-27 Micron Technology, Inc. Microelectronic devices and methods for filling vias in microelectronic devices
US7223629B2 (en) * 2003-12-11 2007-05-29 Intel Corporation Method and apparatus for manufacturing a transistor-outline (TO) can having a ceramic header
DE102004006698A1 (en) 2004-02-11 2005-09-01 Robert Bosch Gmbh Micromechanical sensor
US20050213995A1 (en) * 2004-03-26 2005-09-29 Myunghee Lee Low power and low jitter optical receiver for fiber optic communication link
US7681306B2 (en) * 2004-04-28 2010-03-23 Hymite A/S Method of forming an assembly to house one or more micro components
US20050247894A1 (en) 2004-05-05 2005-11-10 Watkins Charles M Systems and methods for forming apertures in microfeature workpieces
US20050269688A1 (en) * 2004-06-03 2005-12-08 Lior Shiv Microelectromechanical systems (MEMS) devices integrated in a hermetically sealed package
US7045827B2 (en) * 2004-06-24 2006-05-16 Gallup Kendra J Lids for wafer-scale optoelectronic packages
US7232754B2 (en) 2004-06-29 2007-06-19 Micron Technology, Inc. Microelectronic devices and methods for forming interconnects in microelectronic devices
KR100594716B1 (en) * 2004-07-27 2006-06-30 삼성전자주식회사 Cap wafer comprising cavity, semiconductor chip comprising the cap wafer, and method thereof
TWI255503B (en) * 2004-07-30 2006-05-21 Touch Micro System Tech Method of double-sided etching
CN100454144C (en) * 2004-08-05 2009-01-21 探微科技股份有限公司 Method for double-face etching of wafer
SG120200A1 (en) 2004-08-27 2006-03-28 Micron Technology Inc Slanted vias for electrical circuits on circuit boards and other substrates
US7300857B2 (en) 2004-09-02 2007-11-27 Micron Technology, Inc. Through-wafer interconnects for photoimager and memory wafers
US7683393B2 (en) * 2004-12-07 2010-03-23 Ngk Spark Plug Co., Ltd. Wiring substrate for mounting light emitting element
NZ556367A (en) * 2004-12-08 2010-09-30 Obvious Ltd B Bidirectional data transfer optimization and content control for networks
US7271482B2 (en) 2004-12-30 2007-09-18 Micron Technology, Inc. Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods
US7553695B2 (en) * 2005-03-17 2009-06-30 Hymite A/S Method of fabricating a package for a micro component
US7495462B2 (en) * 2005-03-24 2009-02-24 Memsic, Inc. Method of wafer-level packaging using low-aspect ratio through-wafer holes
US7262622B2 (en) * 2005-03-24 2007-08-28 Memsic, Inc. Wafer-level package for integrated circuits
US7449355B2 (en) * 2005-04-27 2008-11-11 Robert Bosch Gmbh Anti-stiction technique for electromechanical systems and electromechanical device employing same
US7795134B2 (en) 2005-06-28 2010-09-14 Micron Technology, Inc. Conductive interconnect structures and formation methods using supercritical fluids
US20070004079A1 (en) * 2005-06-30 2007-01-04 Geefay Frank S Method for making contact through via contact to an offset contactor inside a cap for the wafer level packaging of FBAR chips
US7161283B1 (en) * 2005-06-30 2007-01-09 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Method for placing metal contacts underneath FBAR resonators
US20070048887A1 (en) * 2005-08-26 2007-03-01 Innovative Micro Technology Wafer level hermetic bond using metal alloy
US7528691B2 (en) * 2005-08-26 2009-05-05 Innovative Micro Technology Dual substrate electrostatic MEMS switch with hermetic seal and method of manufacture
US8736081B2 (en) 2005-08-26 2014-05-27 Innovative Micro Technology Wafer level hermetic bond using metal alloy with keeper layer
US7233048B2 (en) * 2005-08-26 2007-06-19 Innovative Micro Technology MEMS device trench plating process and apparatus for through hole vias
US7960208B2 (en) * 2005-08-26 2011-06-14 Innovative Micro Technology Wafer level hermetic bond using metal alloy with raised feature
US7582969B2 (en) * 2005-08-26 2009-09-01 Innovative Micro Technology Hermetic interconnect structure and method of manufacture
US7569926B2 (en) * 2005-08-26 2009-08-04 Innovative Micro Technology Wafer level hermetic bond using metal alloy with raised feature
US7262134B2 (en) 2005-09-01 2007-08-28 Micron Technology, Inc. Microfeature workpieces and methods for forming interconnects in microfeature workpieces
US7863187B2 (en) 2005-09-01 2011-01-04 Micron Technology, Inc. Microfeature workpieces and methods for forming interconnects in microfeature workpieces
US8786165B2 (en) * 2005-09-16 2014-07-22 Tsmc Solid State Lighting Ltd. QFN/SON compatible package with SMT land pads
EP2202791B1 (en) * 2005-11-16 2016-01-27 STMicroelectronics Srl Semiconductor device having deep through vias
KR101177885B1 (en) * 2006-01-16 2012-08-28 삼성전자주식회사 Wafer level packaging cap and fablication method thereof
US7528422B2 (en) * 2006-01-20 2009-05-05 Hymite A/S Package for a light emitting element with integrated electrostatic discharge protection
US8044412B2 (en) * 2006-01-20 2011-10-25 Taiwan Semiconductor Manufacturing Company, Ltd Package for a light emitting element
US20070170528A1 (en) 2006-01-20 2007-07-26 Aaron Partridge Wafer encapsulated microelectromechanical structure and method of manufacturing same
US7749899B2 (en) 2006-06-01 2010-07-06 Micron Technology, Inc. Microelectronic workpieces and methods and systems for forming interconnects in microelectronic workpieces
JP2008010659A (en) * 2006-06-29 2008-01-17 Disco Abrasive Syst Ltd Method of processing via hole
US7629249B2 (en) 2006-08-28 2009-12-08 Micron Technology, Inc. Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods
US7902643B2 (en) 2006-08-31 2011-03-08 Micron Technology, Inc. Microfeature workpieces having interconnects and conductive backplanes, and associated systems and methods
WO2008035261A1 (en) 2006-09-22 2008-03-27 Nxp B.V. Electronic device and method for making the same
US7531445B2 (en) 2006-09-26 2009-05-12 Hymite A/S Formation of through-wafer electrical interconnections and other structures using a thin dielectric membrane
KR100831405B1 (en) * 2006-10-02 2008-05-21 (주) 파이오닉스 Wafer bonding packaging method
JP4919984B2 (en) * 2007-02-25 2012-04-18 サムスン エレクトロニクス カンパニー リミテッド Electronic device package and method for forming the same
WO2009022982A1 (en) * 2007-08-10 2009-02-19 Agency For Science, Technology And Research Nano-interconnects for atomic and molecular scale circuits
SG150410A1 (en) 2007-08-31 2009-03-30 Micron Technology Inc Partitioned through-layer via and associated systems and methods
US7884015B2 (en) 2007-12-06 2011-02-08 Micron Technology, Inc. Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods
US20090181500A1 (en) * 2008-01-15 2009-07-16 Jochen Kuhmann Fabrication of Compact Semiconductor Packages
US20090273002A1 (en) * 2008-05-05 2009-11-05 Wen-Chih Chiou LED Package Structure and Fabrication Method
US7939449B2 (en) * 2008-06-03 2011-05-10 Micron Technology, Inc. Methods of forming hybrid conductive vias including small dimension active surface ends and larger dimension back side ends
US7851818B2 (en) * 2008-06-27 2010-12-14 Taiwan Semiconductor Manufacturing Company, Ltd. Fabrication of compact opto-electronic component packages
DE102008033395B3 (en) 2008-07-16 2010-02-04 Austriamicrosystems Ag Method for producing a semiconductor component and semiconductor component
US20100084752A1 (en) * 2008-10-08 2010-04-08 Honeywell International Inc. Systems and methods for implementing a wafer level hermetic interface chip
JP5246103B2 (en) * 2008-10-16 2013-07-24 大日本印刷株式会社 Method for manufacturing through electrode substrate
SE534510C2 (en) * 2008-11-19 2011-09-13 Silex Microsystems Ab Functional encapsulation
US8240203B2 (en) * 2008-12-11 2012-08-14 Honeywell International Inc. MEMS devices and methods with controlled die bonding areas
US7842613B1 (en) 2009-01-07 2010-11-30 Integrated Device Technology, Inc. Methods of forming microelectronic packaging substrates having through-substrate vias therein
US20100176507A1 (en) * 2009-01-14 2010-07-15 Hymite A/S Semiconductor-based submount with electrically conductive feed-throughs
US8309973B2 (en) * 2009-02-12 2012-11-13 Taiwan Semiconductor Manufacturing Company, Ltd. Silicon-based sub-mount for an opto-electronic device
US8729591B2 (en) 2009-02-13 2014-05-20 Tsmc Solid State Lighting Ltd. Opto-electronic device package with a semiconductor-based sub-mount having SMD metal contacts
US7838878B2 (en) * 2009-03-24 2010-11-23 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor-based sub-mounts for optoelectronic devices with conductive paths to facilitate testing and binning
JP5330115B2 (en) * 2009-06-17 2013-10-30 浜松ホトニクス株式会社 Multilayer wiring board
US20100320595A1 (en) * 2009-06-22 2010-12-23 Honeywell International Inc. Hybrid hermetic interface chip
US20110042803A1 (en) * 2009-08-24 2011-02-24 Chen-Fu Chu Method For Fabricating A Through Interconnect On A Semiconductor Substrate
CN102079503B (en) * 2009-11-26 2012-08-29 中芯国际集成电路制造(上海)有限公司 Etching method of silicon substrate forming MEMS (Micro Electro Mechanical System) device
KR101276333B1 (en) * 2009-11-30 2013-06-18 한국전자통신연구원 3d interconnection structure and manufacturing method thereof
WO2011109442A2 (en) * 2010-03-02 2011-09-09 Oliver Steven D Led packaging with integrated optics and methods of manufacturing the same
CN102403413B (en) * 2010-09-19 2013-09-18 常州普美电子科技有限公司 LED (Light-Emitting Diode) heat dissipation base plate, LED packaging structure, and manufacturing method of LED heat dissipation base plate and LED packaging structure
DE102010056562B4 (en) * 2010-12-30 2018-10-11 Snaptrack, Inc. Electroacoustic component and method for producing the electroacoustic component
DE102010056572B4 (en) 2010-12-30 2018-12-27 Snaptrack, Inc. Electronic component and method for producing the electronic component
US8654541B2 (en) 2011-03-24 2014-02-18 Toyota Motor Engineering & Manufacturing North America, Inc. Three-dimensional power electronics packages
JP5598420B2 (en) * 2011-05-24 2014-10-01 株式会社デンソー Manufacturing method of electronic device
FR2976402A1 (en) * 2011-06-07 2012-12-14 St Microelectronics Sa Electrical interconnection structure for integrated circuit placed in e.g. ball grid array, utilized in electronic system, has second-type electric connection connecting first-type electric connection to area leveled with reception zone
US8324082B1 (en) 2011-09-15 2012-12-04 SemiLEDs Optoelectronics Co., Ltd. Method for fabricating conductive substrates for electronic and optoelectronic devices
KR20140012445A (en) * 2012-07-20 2014-02-03 삼성전자주식회사 Nitride based semiconductor device and method for manufacturing the same
US9162878B2 (en) 2012-08-30 2015-10-20 Innovative Micro Technology Wafer level hermetic bond using metal alloy with raised feature and wetting layer
WO2014049089A1 (en) * 2012-09-28 2014-04-03 Csem Centre Suisse D'electronique Et De Microtechnique Sa - Recherche Et Developpement Implantable devices
US20150262902A1 (en) 2014-03-12 2015-09-17 Invensas Corporation Integrated circuits protected by substrates with cavities, and methods of manufacture
US9481572B2 (en) * 2014-07-17 2016-11-01 Texas Instruments Incorporated Optical electronic device and method of fabrication
US10056310B2 (en) * 2016-09-26 2018-08-21 International Business Machines Corporation Electrolytic seal
US10002844B1 (en) 2016-12-21 2018-06-19 Invensas Bonding Technologies, Inc. Bonded structures
WO2018147940A1 (en) 2017-02-09 2018-08-16 Invensas Bonding Technologies, Inc. Bonded structures
US10508030B2 (en) 2017-03-21 2019-12-17 Invensas Bonding Technologies, Inc. Seal for microelectronic assembly
US10242967B2 (en) * 2017-05-16 2019-03-26 Raytheon Company Die encapsulation in oxide bonded wafer stack
US11105770B2 (en) 2017-09-14 2021-08-31 International Business Machines Corporation Nanopore and DNA sensor employing nanopore
US10319654B1 (en) 2017-12-01 2019-06-11 Cubic Corporation Integrated chip scale packages
US11380597B2 (en) 2017-12-22 2022-07-05 Invensas Bonding Technologies, Inc. Bonded structures
US10923408B2 (en) 2017-12-22 2021-02-16 Invensas Bonding Technologies, Inc. Cavity packages
US10395940B1 (en) 2018-03-13 2019-08-27 Toyota Motor Engineering & Manufacturing North America, Inc. Method of etching microelectronic mechanical system features in a silicon wafer
US11004757B2 (en) 2018-05-14 2021-05-11 Invensas Bonding Technologies, Inc. Bonded structures
US11398415B2 (en) * 2018-09-19 2022-07-26 Intel Corporation Stacked through-silicon vias for multi-device packages

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0430593A2 (en) * 1989-11-22 1991-06-05 Xerox Corporation Method of cutting a silicon wafer by orientation dependent etching
US6036872A (en) * 1998-03-31 2000-03-14 Honeywell Inc. Method for making a wafer-pair having sealed chambers
EP1061578A1 (en) * 1998-12-16 2000-12-20 Seiko Epson Corporation Semiconductor chip, semiconductor device, circuit board and electronic equipment and production methods for them
WO2001024228A2 (en) * 1999-09-27 2001-04-05 Input Output, Inc. Temporary bridge for micro machined structures

Family Cites Families (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55166941A (en) * 1979-06-13 1980-12-26 Nec Corp Semiconductor device
US4903120A (en) 1985-11-22 1990-02-20 Texas Instruments Incorporated Chip carrier with interconnects on lid
US4775573A (en) * 1987-04-03 1988-10-04 West-Tronics, Inc. Multilayer PC board using polymer thick films
US4904036A (en) 1988-03-03 1990-02-27 American Telephone And Telegraph Company, At&T Bell Laboratories Subassemblies for optoelectronic hybrid integrated circuits
US4897711A (en) 1988-03-03 1990-01-30 American Telephone And Telegraph Company Subassembly for optoelectronic devices
DE3909186A1 (en) * 1989-03-21 1990-09-27 Endress Hauser Gmbh Co ELECTRICALLY CONDUCTIVE PROCESS AND METHOD FOR THEIR PRODUCTION
US5023881A (en) 1990-06-19 1991-06-11 At&T Bell Laboratories Photonics module and alignment method
US5068203A (en) 1990-09-04 1991-11-26 Delco Electronics Corporation Method for forming thin silicon membrane or beam
JP2976642B2 (en) 1991-11-07 1999-11-10 日本電気株式会社 Optical coupling circuit
US5656507A (en) 1992-01-28 1997-08-12 British Telecommunications Public Limited Company Process for self-aligning circuit components brought into abutment by surface tension of a molten material and bonding under tension
JP3239274B2 (en) * 1992-02-26 2001-12-17 富士通株式会社 Method of manufacturing inkjet head
US5308442A (en) 1993-01-25 1994-05-03 Hewlett-Packard Company Anisotropically etched ink fill slots in silicon
US5454161A (en) 1993-04-29 1995-10-03 Fujitsu Limited Through hole interconnect substrate fabrication process
US5401913A (en) * 1993-06-08 1995-03-28 Minnesota Mining And Manufacturing Company Electrical interconnections between adjacent circuit board layers of a multi-layer circuit board
JP2692625B2 (en) * 1994-12-08 1997-12-17 日本電気株式会社 Semiconductor substrate manufacturing method
JP3343875B2 (en) 1995-06-30 2002-11-11 キヤノン株式会社 Method of manufacturing inkjet head
JP3193863B2 (en) * 1996-01-31 2001-07-30 ホーヤ株式会社 Transfer mask manufacturing method
IT1283224B1 (en) 1996-03-11 1998-04-16 Pirelli Cavi Spa APPARATUS AND METHOD OF PROTECTION FOR OPTICAL FIBER DEVICES
JPH09266266A (en) * 1996-03-28 1997-10-07 Mitsubishi Electric Corp Semiconductor device, manufacturing method thereof and cap of the semiconductor device
US5703394A (en) 1996-06-10 1997-12-30 Motorola Integrated electro-optical package
US5891354A (en) 1996-07-26 1999-04-06 Fujitsu Limited Methods of etching through wafers and substrates with a composite etch stop layer
JP3724110B2 (en) * 1997-04-24 2005-12-07 三菱電機株式会社 Manufacturing method of semiconductor device
JP3039463B2 (en) * 1997-07-29 2000-05-08 日本電気株式会社 Semiconductor device and manufacturing method thereof
US6300686B1 (en) * 1997-10-02 2001-10-09 Matsushita Electric Industrial Co., Ltd. Semiconductor chip bonded to a thermal conductive sheet having a filled through hole for electrical connection
EP0926723B1 (en) * 1997-11-26 2007-01-17 STMicroelectronics S.r.l. Process for forming front-back through contacts in micro-integrated electronic devices
US6117794A (en) 1998-01-16 2000-09-12 Lucent Technologies, Inc. Method for improved metal oxide bonding of optical elements
US6072815A (en) 1998-02-27 2000-06-06 Litton Systems, Inc. Microlaser submount assembly and associates packaging method
KR100280622B1 (en) 1998-04-02 2001-03-02 윤종용 Contact Forming Method of Semiconductor Device
US6303986B1 (en) 1998-07-29 2001-10-16 Silicon Light Machines Method of and apparatus for sealing an hermetic lid to a semiconductor die
KR100855529B1 (en) 1998-09-03 2008-09-01 이비덴 가부시키가이샤 Multilayer printed wiring board and method for manufacturing the same
US6588949B1 (en) 1998-12-30 2003-07-08 Honeywell Inc. Method and apparatus for hermetically sealing photonic devices
US6221769B1 (en) 1999-03-05 2001-04-24 International Business Machines Corporation Method for integrated circuit power and electrical connections via through-wafer interconnects
US6291779B1 (en) 1999-06-30 2001-09-18 International Business Machines Corporation Fine pitch circuitization with filled plated through holes
JP3595817B2 (en) * 1999-09-20 2004-12-02 株式会社トッパンＮｅｃサーキットソリューションズ Optical module mounting method and mounting structure
JP2001127208A (en) * 1999-10-29 2001-05-11 Matsushita Electric Works Ltd Semiconductor chip packaging structure and manufacturing method thereof
US6653572B2 (en) 2001-02-07 2003-11-25 The Furukawa Electric Co., Ltd. Multilayer circuit board
US6577427B1 (en) * 2001-02-20 2003-06-10 Nayna Networks, Inc. Process for manufacturing mirror devices using semiconductor technology
US6818464B2 (en) 2001-10-17 2004-11-16 Hymite A/S Double-sided etching technique for providing a semiconductor structure with through-holes, and a feed-through metalization process for sealing the through-holes
US6660564B2 (en) 2002-01-25 2003-12-09 Sony Corporation Wafer-level through-wafer packaging process for MEMS and MEMS package produced thereby
CN103010139B (en) * 2011-09-28 2015-03-25 陈宗贤 Safety early warning device for preventing overtaking collision of rear vehicle during opening of vehicle door

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0430593A2 (en) * 1989-11-22 1991-06-05 Xerox Corporation Method of cutting a silicon wafer by orientation dependent etching
US6036872A (en) * 1998-03-31 2000-03-14 Honeywell Inc. Method for making a wafer-pair having sealed chambers
EP1061578A1 (en) * 1998-12-16 2000-12-20 Seiko Epson Corporation Semiconductor chip, semiconductor device, circuit board and electronic equipment and production methods for them
WO2001024228A2 (en) * 1999-09-27 2001-04-05 Input Output, Inc. Temporary bridge for micro machined structures

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
LINDER S ET AL: "Fabrication technology for wafer through-hole interconnections and three-dimensional stacks of chips and wafers", MICRO ELECTRO MECHANICAL SYSTEMS, 1994, MEMS '94, PROCEEDINGS, IEEE WORKSHOP ON OISO, JAPAN 25-28 JAN. 1994, NEW YORK, NY, USA,IEEE, 25 January 1994 (1994-01-25), pages 349 - 354, XP010207732, ISBN: 0-7803-1833-1 *
MITA Y ET AL: "Embedded-mask-methods for mm-scale multi-layer vertical/slanted Si structures", PROCEEDINGS IEEE THIRTEENTH ANNUAL INTERNATIONAL CONFERENCE ON MICRO ELECTRO MECHANICAL SYSTEMS, 23 January 2000 (2000-01-23) - 27 January 2000 (2000-01-27), Miyazaki, Japan, pages 300 - 305, XP010377143 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8993450B2 (en) 2003-09-15 2015-03-31 Nuvotronics, Llc Device package and methods for the fabrication and testing thereof
US9410799B2 (en) 2003-09-15 2016-08-09 Nuvotronics, Inc. Device package and methods for the fabrication and testing thereof

Also Published As

Publication number Publication date
HK1074913A1 (en) 2005-11-25
JP2005506701A (en) 2005-03-03
US6818464B2 (en) 2004-11-16
US7081412B2 (en) 2006-07-25
US7057274B2 (en) 2006-06-06
ATE464656T1 (en) 2010-04-15
AU2002351771A1 (en) 2003-04-28
JP4546087B2 (en) 2010-09-15
US20040266038A1 (en) 2004-12-30
CN100377333C (en) 2008-03-26
DE60236007D1 (en) 2010-05-27
EP1436837B1 (en) 2010-04-14
EP1436837A2 (en) 2004-07-14
WO2003034490A2 (en) 2003-04-24
US20030071283A1 (en) 2003-04-17
US20050059204A1 (en) 2005-03-17
CN1605126A (en) 2005-04-06

Similar Documents

Publication Publication Date Title
WO2003034490A3 (en) Semiconductor structure with one or more through-holes
AU2003235181A1 (en) Organic semiconductor composition, organic semiconductor element, and process for producing the same
WO2003019693A3 (en) Solutions of organic semiconductors
WO2003030256A3 (en) Arrangements to increase structural rigidity of semiconductor package
AU2003207185A1 (en) Organic semiconductor structure, process for producing the same, and organic semiconductor device
EP1184897B8 (en) Semiconductor base and its manufacturing method, and semiconductor crystal manufacturing method
AU2003235902A1 (en) Semiconductor substrate manufacturing method and semiconductor device manufacturing method, and semiconductor substrate and semiconductor device manufactured by the methods
AU2003294783A1 (en) Semiconductor structure, and methods for fabricating same
AU2001240599A1 (en) Flexible metal substrate for cis solar cells, and method for producing the same
AU2002304525A1 (en) Detachable substrate or detachable structure and method for the production thereof
AU2003296987A1 (en) Trench mosfet having implanted drain-drift region and process for manufacturing the same
AU2002221138A1 (en) Vacuum carbo-nitriding method
WO2006017016A3 (en) Devices and methods of making the same
WO2004068556A3 (en) Semiconductor structures with structural homogeneity
AU2002329197A1 (en) Trench structure for semiconductor devices
AU4274601A (en) Semiconductor layer, solar cell using it, and production methods and applications therefor
AU2003211255A1 (en) Method of manufacturing glass panel, and glass panel manufactured by the method
AU2002338003A1 (en) Semiconductor Devices
AU2002252197A1 (en) Separating of optical integrated modules and structures formed thereby
AU2224400A (en) Semiconductor fabrication processes
AU2002349757A1 (en) Method for forming thin film, substrate having thin film formed by the method, and photoelectric conversion device using the substrate
AUPS112202A0 (en) Semiconductor manufacture
AU2002361094A1 (en) Acrylic rubber, process for its production, and rubber compositions, oil- and weather-resistant rubber compositions, and oil- and weather-resistant rubbers, containing the same
WO2002103753A3 (en) Nanoelectronic interconnection and addressing
AU2002257257A1 (en) Semiconductor structures, devices and method of fabrication

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BY BZ CA CH CN CO CR CU CZ DE DM DZ EC EE ES FI GB GD GE GH HR HU ID IL IN IS JP KE KG KP KR LC LK LR LS LT LU LV MA MD MG MN MW MX MZ NO NZ OM PH PL PT RU SD SE SG SI SK SL TJ TM TN TR TZ UA UG UZ VN YU ZA ZM

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW MZ SD SL SZ UG ZM ZW AM AZ BY KG KZ RU TJ TM AT BE BG CH CY CZ DK EE ES FI FR GB GR IE IT LU MC PT SE SK TR BF BJ CF CG CI GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2003537117

Country of ref document: JP

WWE Wipo information: entry into national phase

Ref document number: 2002787490

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 20028252926

Country of ref document: CN

WWP Wipo information: published in national office

Ref document number: 2002787490

Country of ref document: EP