WO2003019380A3 - Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment - Google Patents
Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment Download PDFInfo
- Publication number
- WO2003019380A3 WO2003019380A3 PCT/US2002/027353 US0227353W WO03019380A3 WO 2003019380 A3 WO2003019380 A3 WO 2003019380A3 US 0227353 W US0227353 W US 0227353W WO 03019380 A3 WO03019380 A3 WO 03019380A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- high performance
- enable high
- performance memory
- latency sensitive
- memory updates
- Prior art date
Links
- 238000001514 detection method Methods 0.000 title 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30087—Synchronisation or serialisation instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3824—Operand accessing
- G06F9/383—Operand prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002456837A CA2456837C (en) | 2001-08-27 | 2002-08-27 | Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment |
AU2002327556A AU2002327556A1 (en) | 2001-08-27 | 2002-08-27 | Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment |
EP02763554.9A EP1586036B1 (en) | 2001-08-27 | 2002-08-27 | Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US31514401P | 2001-08-27 | 2001-08-27 | |
US60/315,144 | 2001-08-27 | ||
US10/212,548 US7216204B2 (en) | 2001-08-27 | 2002-08-05 | Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment |
US10/212,548 | 2002-08-05 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2003019380A2 WO2003019380A2 (en) | 2003-03-06 |
WO2003019380A3 true WO2003019380A3 (en) | 2006-12-14 |
Family
ID=26907247
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2002/027353 WO2003019380A2 (en) | 2001-08-27 | 2002-08-27 | Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment |
Country Status (6)
Country | Link |
---|---|
US (1) | US7216204B2 (en) |
EP (1) | EP1586036B1 (en) |
AU (1) | AU2002327556A1 (en) |
CA (1) | CA2456837C (en) |
TW (1) | TWI264639B (en) |
WO (1) | WO2003019380A2 (en) |
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- 2002-08-27 EP EP02763554.9A patent/EP1586036B1/en not_active Expired - Lifetime
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CA2456837A1 (en) | 2003-03-06 |
US20030041216A1 (en) | 2003-02-27 |
AU2002327556A8 (en) | 2007-02-01 |
AU2002327556A1 (en) | 2003-03-10 |
EP1586036A2 (en) | 2005-10-19 |
TWI264639B (en) | 2006-10-21 |
CA2456837C (en) | 2008-10-28 |
US7216204B2 (en) | 2007-05-08 |
WO2003019380A2 (en) | 2003-03-06 |
EP1586036B1 (en) | 2013-04-24 |
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