WO2002103760A3 - Method of selective removal of sige alloys - Google Patents
Method of selective removal of sige alloys Download PDFInfo
- Publication number
- WO2002103760A3 WO2002103760A3 PCT/US2002/018973 US0218973W WO02103760A3 WO 2002103760 A3 WO2002103760 A3 WO 2002103760A3 US 0218973 W US0218973 W US 0218973W WO 02103760 A3 WO02103760 A3 WO 02103760A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- oxidation rate
- selective removal
- sige alloys
- channel devices
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 3
- 229910045601 alloy Inorganic materials 0.000 title 1
- 239000000956 alloy Substances 0.000 title 1
- 230000003647 oxidation Effects 0.000 abstract 4
- 238000007254 oxidation reaction Methods 0.000 abstract 4
- 239000004065 semiconductor Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1054—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2002322105A AU2002322105A1 (en) | 2001-06-14 | 2002-06-14 | Method of selective removal of sige alloys |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US29815301P | 2001-06-14 | 2001-06-14 | |
US60/298,153 | 2001-06-14 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002103760A2 WO2002103760A2 (en) | 2002-12-27 |
WO2002103760A3 true WO2002103760A3 (en) | 2003-07-31 |
Family
ID=23149281
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2002/018973 WO2002103760A2 (en) | 2001-06-14 | 2002-06-14 | Method of selective removal of sige alloys |
Country Status (3)
Country | Link |
---|---|
US (2) | US6900094B2 (en) |
AU (1) | AU2002322105A1 (en) |
WO (1) | WO2002103760A2 (en) |
Families Citing this family (105)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69827824T3 (en) * | 1997-06-24 | 2009-09-03 | Massachusetts Institute Of Technology, Cambridge | CONTROL OF SEVENING DENSITY THROUGH THE USE OF GRADIENT LAYERS AND BY PLANARIZATION |
US7227176B2 (en) * | 1998-04-10 | 2007-06-05 | Massachusetts Institute Of Technology | Etch stop layer system |
EP1249036A1 (en) * | 2000-01-20 | 2002-10-16 | Amberwave Systems Corporation | Low threading dislocation density relaxed mismatched epilayers without high temperature growth |
US6602613B1 (en) | 2000-01-20 | 2003-08-05 | Amberwave Systems Corporation | Heterointegration of materials using deposition and bonding |
US6583015B2 (en) * | 2000-08-07 | 2003-06-24 | Amberwave Systems Corporation | Gate technology for strained surface channel and strained buried channel MOSFET devices |
WO2002015244A2 (en) * | 2000-08-16 | 2002-02-21 | Massachusetts Institute Of Technology | Process for producing semiconductor article using graded expitaxial growth |
US6649480B2 (en) * | 2000-12-04 | 2003-11-18 | Amberwave Systems Corporation | Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs |
US20020100942A1 (en) * | 2000-12-04 | 2002-08-01 | Fitzgerald Eugene A. | CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs |
US6703688B1 (en) * | 2001-03-02 | 2004-03-09 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6830976B2 (en) * | 2001-03-02 | 2004-12-14 | Amberwave Systems Corproation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6723661B2 (en) * | 2001-03-02 | 2004-04-20 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6724008B2 (en) | 2001-03-02 | 2004-04-20 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6940089B2 (en) * | 2001-04-04 | 2005-09-06 | Massachusetts Institute Of Technology | Semiconductor device structure |
WO2002103760A2 (en) | 2001-06-14 | 2002-12-27 | Amberware Systems Corporation | Method of selective removal of sige alloys |
US7301180B2 (en) * | 2001-06-18 | 2007-11-27 | Massachusetts Institute Of Technology | Structure and method for a high-speed semiconductor device having a Ge channel layer |
US6916727B2 (en) * | 2001-06-21 | 2005-07-12 | Massachusetts Institute Of Technology | Enhancement of P-type metal-oxide-semiconductor field effect transistors |
WO2003015142A2 (en) * | 2001-08-06 | 2003-02-20 | Massachusetts Institute Of Technology | Formation of planar strained layers |
US7138649B2 (en) * | 2001-08-09 | 2006-11-21 | Amberwave Systems Corporation | Dual-channel CMOS transistors with differentially strained channels |
US6974735B2 (en) * | 2001-08-09 | 2005-12-13 | Amberwave Systems Corporation | Dual layer Semiconductor Devices |
AU2002349881A1 (en) * | 2001-09-21 | 2003-04-01 | Amberwave Systems Corporation | Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same |
WO2003028106A2 (en) | 2001-09-24 | 2003-04-03 | Amberwave Systems Corporation | Rf circuits including transistors having strained material layers |
US6600170B1 (en) * | 2001-12-17 | 2003-07-29 | Advanced Micro Devices, Inc. | CMOS with strained silicon channel NMOS and silicon germanium channel PMOS |
US7132348B2 (en) * | 2002-03-25 | 2006-11-07 | Micron Technology, Inc. | Low k interconnect dielectric using surface transformation |
US6995430B2 (en) * | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
US7307273B2 (en) * | 2002-06-07 | 2007-12-11 | Amberwave Systems Corporation | Control of strain in device layers by selective relaxation |
US7615829B2 (en) * | 2002-06-07 | 2009-11-10 | Amberwave Systems Corporation | Elevated source and drain elements for strained-channel heterojuntion field-effect transistors |
US7074623B2 (en) * | 2002-06-07 | 2006-07-11 | Amberwave Systems Corporation | Methods of forming strained-semiconductor-on-insulator finFET device structures |
US7335545B2 (en) * | 2002-06-07 | 2008-02-26 | Amberwave Systems Corporation | Control of strain in device layers by prevention of relaxation |
US20030227057A1 (en) * | 2002-06-07 | 2003-12-11 | Lochtefeld Anthony J. | Strained-semiconductor-on-insulator device structures |
US7138310B2 (en) * | 2002-06-07 | 2006-11-21 | Amberwave Systems Corporation | Semiconductor devices having strained dual channel layers |
WO2003105206A1 (en) * | 2002-06-10 | 2003-12-18 | Amberwave Systems Corporation | Growing source and drain elements by selecive epitaxy |
US6982474B2 (en) * | 2002-06-25 | 2006-01-03 | Amberwave Systems Corporation | Reacted conductive gate electrodes |
US6680496B1 (en) * | 2002-07-08 | 2004-01-20 | Amberwave Systems Corp. | Back-biasing to populate strained layer quantum wells |
JP5144002B2 (en) | 2002-08-23 | 2013-02-13 | 台湾積體電路製造股▲ふん▼有限公司 | Semiconductor heterostructures with reduced dislocation pileup and related methods |
US7594967B2 (en) * | 2002-08-30 | 2009-09-29 | Amberwave Systems Corporation | Reduction of dislocation pile-up formation during relaxed lattice-mismatched epitaxy |
US6946373B2 (en) * | 2002-11-20 | 2005-09-20 | International Business Machines Corporation | Relaxed, low-defect SGOI for strained Si CMOS applications |
US6730576B1 (en) * | 2002-12-31 | 2004-05-04 | Advanced Micro Devices, Inc. | Method of forming a thick strained silicon layer and semiconductor structures incorporating a thick strained silicon layer |
EP1437764A1 (en) * | 2003-01-10 | 2004-07-14 | S.O.I. Tec Silicon on Insulator Technologies S.A. | A compliant substrate for a heteroepitaxy, a heteroepitaxial structure and a method for fabricating a compliant substrate |
US7332417B2 (en) * | 2003-01-27 | 2008-02-19 | Amberwave Systems Corporation | Semiconductor structures with structural homogeneity |
US7198974B2 (en) * | 2003-03-05 | 2007-04-03 | Micron Technology, Inc. | Micro-mechanically strained semiconductor film |
EP1602125B1 (en) * | 2003-03-07 | 2019-06-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Shallow trench isolation process |
US7220656B2 (en) * | 2003-04-29 | 2007-05-22 | Micron Technology, Inc. | Strained semiconductor by wafer bonding with misorientation |
US7041575B2 (en) * | 2003-04-29 | 2006-05-09 | Micron Technology, Inc. | Localized strained semiconductor on insulator |
US7115480B2 (en) * | 2003-05-07 | 2006-10-03 | Micron Technology, Inc. | Micromechanical strained semiconductor by wafer bonding |
US6987037B2 (en) * | 2003-05-07 | 2006-01-17 | Micron Technology, Inc. | Strained Si/SiGe structures by ion implantation |
US7662701B2 (en) * | 2003-05-21 | 2010-02-16 | Micron Technology, Inc. | Gettering of silicon on insulator using relaxed silicon germanium epitaxial proximity layers |
US7008854B2 (en) * | 2003-05-21 | 2006-03-07 | Micron Technology, Inc. | Silicon oxycarbide substrates for bonded silicon on insulator |
US7501329B2 (en) * | 2003-05-21 | 2009-03-10 | Micron Technology, Inc. | Wafer gettering using relaxed silicon germanium epitaxial proximity layers |
US7273788B2 (en) * | 2003-05-21 | 2007-09-25 | Micron Technology, Inc. | Ultra-thin semiconductors bonded on glass substrates |
US6936506B1 (en) | 2003-05-22 | 2005-08-30 | Advanced Micro Devices, Inc. | Strained-silicon devices with different silicon thicknesses |
US7087473B2 (en) * | 2003-06-13 | 2006-08-08 | Matsushita Electric Industrial Co., Ltd. | Method of forming conventional complementary MOS transistors and complementary heterojunction MOS transistors on common substrate |
US7439158B2 (en) * | 2003-07-21 | 2008-10-21 | Micron Technology, Inc. | Strained semiconductor by full wafer bonding |
US7153753B2 (en) * | 2003-08-05 | 2006-12-26 | Micron Technology, Inc. | Strained Si/SiGe/SOI islands and processes of making same |
US7037770B2 (en) * | 2003-10-20 | 2006-05-02 | International Business Machines Corporation | Method of manufacturing strained dislocation-free channels for CMOS |
JP2005142431A (en) * | 2003-11-07 | 2005-06-02 | Toshiba Corp | Semiconductor device and its manufacturing method |
US7256465B2 (en) * | 2004-01-21 | 2007-08-14 | Sharp Laboratories Of America, Inc. | Ultra-shallow metal oxide surface channel MOS transistor |
US7078723B2 (en) * | 2004-04-06 | 2006-07-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Microelectronic device with depth adjustable sill |
FR2870043B1 (en) * | 2004-05-07 | 2006-11-24 | Commissariat Energie Atomique | MANUFACTURING OF ACTIVE ZONES OF DIFFERENT NATURE DIRECTLY ON INSULATION AND APPLICATION TO MOS TRANSISTOR WITH SINGLE OR DOUBLE GRID |
US7521292B2 (en) | 2004-06-04 | 2009-04-21 | The Board Of Trustees Of The University Of Illinois | Stretchable form of single crystal silicon for high performance electronics on rubber substrates |
US7799699B2 (en) | 2004-06-04 | 2010-09-21 | The Board Of Trustees Of The University Of Illinois | Printable semiconductor structures and related methods of making and assembling |
CN102097458B (en) | 2004-06-04 | 2013-10-30 | 伊利诺伊大学评议会 | Methods and devices for fabricating and assembling printable semiconductor elements |
US7791107B2 (en) * | 2004-06-16 | 2010-09-07 | Massachusetts Institute Of Technology | Strained tri-channel layer for semiconductor-based electronic devices |
JP4473651B2 (en) * | 2004-06-18 | 2010-06-02 | 株式会社東芝 | Manufacturing method of semiconductor device |
DE102004048096A1 (en) * | 2004-09-30 | 2006-04-27 | Forschungszentrum Jülich GmbH | Method for producing a strained layer on a substrate and layer structure |
US7393733B2 (en) | 2004-12-01 | 2008-07-01 | Amberwave Systems Corporation | Methods of forming hybrid fin field-effect transistor structures |
US20060113603A1 (en) * | 2004-12-01 | 2006-06-01 | Amberwave Systems Corporation | Hybrid semiconductor-on-insulator structures and related methods |
US7327008B2 (en) * | 2005-01-24 | 2008-02-05 | International Business Machines Corporation | Structure and method for mixed-substrate SIMOX technology |
FR2893446B1 (en) * | 2005-11-16 | 2008-02-15 | Soitec Silicon Insulator Techn | SEGMENT SEGMENT SEGMENT LAYER TREATMENT |
US7544584B2 (en) | 2006-02-16 | 2009-06-09 | Micron Technology, Inc. | Localized compressive strained semiconductor |
US7772060B2 (en) * | 2006-06-21 | 2010-08-10 | Texas Instruments Deutschland Gmbh | Integrated SiGe NMOS and PMOS transistors |
US7485544B2 (en) * | 2006-08-02 | 2009-02-03 | Micron Technology, Inc. | Strained semiconductor, devices and systems and methods of formation |
US8962447B2 (en) * | 2006-08-03 | 2015-02-24 | Micron Technology, Inc. | Bonded strained semiconductor with a desired surface orientation and conductance direction |
US7968960B2 (en) | 2006-08-18 | 2011-06-28 | Micron Technology, Inc. | Methods of forming strained semiconductor channels |
CN101517700B (en) | 2006-09-20 | 2014-04-16 | 伊利诺伊大学评议会 | Release strategies for making transferable semiconductor structures, devices and device components |
EP2104954B1 (en) | 2007-01-17 | 2022-03-16 | The Board of Trustees of the University of Illinois | Optical systems fabricated by printing-based assembly |
US7795605B2 (en) * | 2007-06-29 | 2010-09-14 | International Business Machines Corporation | Phase change material based temperature sensor |
US20090142891A1 (en) * | 2007-11-30 | 2009-06-04 | International Business Machines Corporation | Maskless stress memorization technique for cmos devices |
EP2963675A1 (en) | 2008-03-05 | 2016-01-06 | The Board of Trustees of The University of Illinois | Stretchable and foldable electronic devices |
US8470701B2 (en) * | 2008-04-03 | 2013-06-25 | Advanced Diamond Technologies, Inc. | Printable, flexible and stretchable diamond for thermal management |
US8372726B2 (en) | 2008-10-07 | 2013-02-12 | Mc10, Inc. | Methods and applications of non-planar imaging arrays |
US8097926B2 (en) | 2008-10-07 | 2012-01-17 | Mc10, Inc. | Systems, methods, and devices having stretchable integrated circuitry for sensing and delivering therapy |
US8389862B2 (en) | 2008-10-07 | 2013-03-05 | Mc10, Inc. | Extremely stretchable electronics |
EP2349440B1 (en) | 2008-10-07 | 2019-08-21 | Mc10, Inc. | Catheter balloon having stretchable integrated circuitry and sensor array |
US8886334B2 (en) | 2008-10-07 | 2014-11-11 | Mc10, Inc. | Systems, methods, and devices using stretchable or flexible electronics for medical applications |
TWI592996B (en) | 2009-05-12 | 2017-07-21 | 美國伊利諾大學理事會 | Printed assemblies of ultrathin, microscale inorganic light emitting diodes for deformable and semitransparent displays |
US9723122B2 (en) | 2009-10-01 | 2017-08-01 | Mc10, Inc. | Protective cases with integrated electronics |
US8716752B2 (en) * | 2009-12-14 | 2014-05-06 | Stmicroelectronics, Inc. | Structure and method for making a strained silicon transistor |
US9936574B2 (en) | 2009-12-16 | 2018-04-03 | The Board Of Trustees Of The University Of Illinois | Waterproof stretchable optoelectronics |
US10918298B2 (en) | 2009-12-16 | 2021-02-16 | The Board Of Trustees Of The University Of Illinois | High-speed, high-resolution electrophysiology in-vivo using conformal electronics |
US10441185B2 (en) | 2009-12-16 | 2019-10-15 | The Board Of Trustees Of The University Of Illinois | Flexible and stretchable electronic systems for epidermal electronics |
EP2547258B1 (en) | 2010-03-17 | 2015-08-05 | The Board of Trustees of the University of Illionis | Implantable biomedical devices on bioresorbable substrates |
WO2012097163A1 (en) | 2011-01-14 | 2012-07-19 | The Board Of Trustees Of The University Of Illinois | Optical component array having adjustable curvature |
US9765934B2 (en) | 2011-05-16 | 2017-09-19 | The Board Of Trustees Of The University Of Illinois | Thermally managed LED arrays assembled by printing |
JP2014523633A (en) | 2011-05-27 | 2014-09-11 | エムシー10 インコーポレイテッド | Electronic, optical and / or mechanical devices and systems and methods of manufacturing these devices and systems |
EP2713863B1 (en) | 2011-06-03 | 2020-01-15 | The Board of Trustees of the University of Illionis | Conformable actively multiplexed high-density surface electrode array for brain interfacing |
EP2786644B1 (en) | 2011-12-01 | 2019-04-10 | The Board of Trustees of the University of Illionis | Transient devices designed to undergo programmable transformations |
CN105283122B (en) | 2012-03-30 | 2020-02-18 | 伊利诺伊大学评议会 | Appendage mountable electronic device conformable to a surface |
US9059321B2 (en) | 2012-05-14 | 2015-06-16 | International Business Machines Corporation | Buried channel field-effect transistors |
US9171794B2 (en) | 2012-10-09 | 2015-10-27 | Mc10, Inc. | Embedding thin chips in polymer |
KR102077447B1 (en) * | 2013-06-24 | 2020-02-14 | 삼성전자 주식회사 | Semiconductor device and method for fabricating the same |
US9553012B2 (en) * | 2013-09-13 | 2017-01-24 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor structure and the manufacturing method thereof |
CN107851208B (en) | 2015-06-01 | 2021-09-10 | 伊利诺伊大学评议会 | Miniaturized electronic system with wireless power supply and near field communication capability |
WO2016196673A1 (en) | 2015-06-01 | 2016-12-08 | The Board Of Trustees Of The University Of Illinois | Alternative approach to uv sensing |
US10925543B2 (en) | 2015-11-11 | 2021-02-23 | The Board Of Trustees Of The University Of Illinois | Bioresorbable silicon electronics for transient implants |
US10529738B2 (en) * | 2016-04-28 | 2020-01-07 | Globalfoundries Singapore Pte. Ltd. | Integrated circuits with selectively strained device regions and methods for fabricating same |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4920076A (en) * | 1988-04-15 | 1990-04-24 | The United States Of America As Represented By The United States Department Of Energy | Method for enhancing growth of SiO2 in Si by the implantation of germanium |
US5312766A (en) * | 1991-03-06 | 1994-05-17 | National Semiconductor Corporation | Method of providing lower contact resistance in MOS transistors |
US5327375A (en) * | 1988-07-08 | 1994-07-05 | Eliyahou Harari | DRAM cell utilizing novel capacitor |
EP0844651A1 (en) * | 1996-11-26 | 1998-05-27 | Xerox Corporation | Method of controlling oxidation in multilayer semiconductor structure comprising Group III elements |
US5963817A (en) * | 1997-10-16 | 1999-10-05 | International Business Machines Corporation | Bulk and strained silicon on insulator using local selective oxidation |
Family Cites Families (97)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3542482A1 (en) * | 1985-11-30 | 1987-06-04 | Licentia Gmbh | MODULATION-Doped FIELD EFFECT TRANSISTOR |
JPS63122176A (en) | 1986-11-11 | 1988-05-26 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and its manufacture |
DE3816358A1 (en) * | 1988-05-13 | 1989-11-23 | Eurosil Electronic Gmbh | NON-VOLATILE STORAGE CELL AND METHOD FOR THE PRODUCTION THEREOF |
US5241197A (en) * | 1989-01-25 | 1993-08-31 | Hitachi, Ltd. | Transistor provided with strained germanium layer |
DE4101167A1 (en) | 1991-01-17 | 1992-07-23 | Daimler Benz Ag | CMOS FET circuit layout - has common gate and drain electrodes in vertical or lateral configuration |
JPH04307974A (en) | 1991-04-05 | 1992-10-30 | Sharp Corp | Electrically erasable nonvolatile semiconductor storage device |
US5442205A (en) * | 1991-04-24 | 1995-08-15 | At&T Corp. | Semiconductor heterostructure devices with strained semiconductor layers |
US5166084A (en) * | 1991-09-03 | 1992-11-24 | Motorola, Inc. | Process for fabricating a silicon on insulator field effect transistor |
US5291439A (en) * | 1991-09-12 | 1994-03-01 | International Business Machines Corporation | Semiconductor memory cell and memory array with inversion layer |
JPH05121317A (en) * | 1991-10-24 | 1993-05-18 | Rohm Co Ltd | Method for forming soi structure |
US5467305A (en) * | 1992-03-12 | 1995-11-14 | International Business Machines Corporation | Three-dimensional direct-write EEPROM arrays and fabrication methods |
US5212110A (en) * | 1992-05-26 | 1993-05-18 | Motorola, Inc. | Method for forming isolation regions in a semiconductor device |
US5386132A (en) * | 1992-11-02 | 1995-01-31 | Wong; Chun C. D. | Multimedia storage system with highly compact memory device |
US5418743A (en) * | 1992-12-07 | 1995-05-23 | Nippon Steel Corporation | Method of writing into non-volatile semiconductor memory |
US5523592A (en) * | 1993-02-03 | 1996-06-04 | Hitachi, Ltd. | Semiconductor optical device, manufacturing method for the same, and opto-electronic integrated circuit using the same |
US5792679A (en) * | 1993-08-30 | 1998-08-11 | Sharp Microelectronics Technology, Inc. | Method for forming silicon-germanium/Si/silicon dioxide heterostructure using germanium implant |
JPH07106466A (en) | 1993-09-30 | 1995-04-21 | Toppan Printing Co Ltd | Printed-wiring board for mounting of multichip module |
US5461243A (en) * | 1993-10-29 | 1995-10-24 | International Business Machines Corporation | Substrate for tensilely strained semiconductor |
US5534713A (en) | 1994-05-20 | 1996-07-09 | International Business Machines Corporation | Complementary metal-oxide semiconductor transistor logic using strained SI/SIGE heterostructure layers |
US6218677B1 (en) * | 1994-08-15 | 2001-04-17 | Texas Instruments Incorporated | III-V nitride resonant tunneling |
US5561302A (en) * | 1994-09-26 | 1996-10-01 | Motorola, Inc. | Enhanced mobility MOSFET device and method |
US5777347A (en) * | 1995-03-07 | 1998-07-07 | Hewlett-Packard Company | Vertical CMOS digital multi-valued restoring logic device |
US5920088A (en) * | 1995-06-16 | 1999-07-06 | Interuniversitair Micro-Electronica Centrum (Imec Vzw) | Vertical MISFET devices |
DE19533313A1 (en) * | 1995-09-08 | 1997-03-13 | Max Planck Gesellschaft | Semiconductor transistor device structure for e.g. CMOS FET |
JP3403877B2 (en) * | 1995-10-25 | 2003-05-06 | 三菱電機株式会社 | Semiconductor memory device and manufacturing method thereof |
JP3217015B2 (en) * | 1996-07-18 | 2001-10-09 | インターナショナル・ビジネス・マシーンズ・コーポレーション | Method for forming field effect transistor |
US6191432B1 (en) * | 1996-09-02 | 2001-02-20 | Kabushiki Kaisha Toshiba | Semiconductor device and memory device |
US5847419A (en) * | 1996-09-17 | 1998-12-08 | Kabushiki Kaisha Toshiba | Si-SiGe semiconductor device and method of fabricating the same |
US6399970B2 (en) | 1996-09-17 | 2002-06-04 | Matsushita Electric Industrial Co., Ltd. | FET having a Si/SiGeC heterojunction channel |
DE59707274D1 (en) | 1996-09-27 | 2002-06-20 | Infineon Technologies Ag | Integrated CMOS circuit arrangement and method for its production |
US5780922A (en) * | 1996-11-27 | 1998-07-14 | The Regents Of The University Of California | Ultra-low phase noise GE MOSFETs |
US5808344A (en) * | 1996-12-13 | 1998-09-15 | International Business Machines Corporation | Single-transistor logic and CMOS inverters |
JP3487124B2 (en) * | 1997-03-26 | 2004-01-13 | 三菱電機株式会社 | High frequency circuit |
EP0867701A1 (en) * | 1997-03-28 | 1998-09-30 | Interuniversitair Microelektronica Centrum Vzw | Method of fabrication of an infrared radiation detector and more particularly an infrared sensitive bolometer |
US5891769A (en) * | 1997-04-07 | 1999-04-06 | Motorola, Inc. | Method for forming a semiconductor device having a heteroepitaxial layer |
US5906951A (en) * | 1997-04-30 | 1999-05-25 | International Business Machines Corporation | Strained Si/SiGe layers on insulator |
DE19720008A1 (en) * | 1997-05-13 | 1998-11-19 | Siemens Ag | Integrated CMOS circuit arrangement and method for its production |
DE69827824T3 (en) * | 1997-06-24 | 2009-09-03 | Massachusetts Institute Of Technology, Cambridge | CONTROL OF SEVENING DENSITY THROUGH THE USE OF GRADIENT LAYERS AND BY PLANARIZATION |
US5936274A (en) * | 1997-07-08 | 1999-08-10 | Micron Technology, Inc. | High density flash memory |
US5981400A (en) * | 1997-09-18 | 1999-11-09 | Cornell Research Foundation, Inc. | Compliant universal substrate for epitaxial growth |
US6154475A (en) * | 1997-12-04 | 2000-11-28 | The United States Of America As Represented By The Secretary Of The Air Force | Silicon-based strain-symmetrized GE-SI quantum lasers |
JP3447939B2 (en) * | 1997-12-10 | 2003-09-16 | 株式会社東芝 | Nonvolatile semiconductor memory and data reading method |
JP3059145B2 (en) | 1997-12-12 | 2000-07-04 | 松下電子工業株式会社 | Nonvolatile semiconductor memory device and driving method thereof |
FR2773177B1 (en) * | 1997-12-29 | 2000-03-17 | France Telecom | PROCESS FOR OBTAINING A SINGLE-CRYSTAL GERMANIUM OR SILICON LAYER ON A SILICON OR SINGLE-CRYSTAL GERMANIUM SUBSTRATE, RESPECTIVELY, AND MULTILAYER PRODUCTS OBTAINED |
US6013134A (en) * | 1998-02-18 | 2000-01-11 | International Business Machines Corporation | Advance integrated chemical vapor deposition (AICVD) for semiconductor devices |
EP1070341A1 (en) | 1998-04-10 | 2001-01-24 | Massachusetts Institute Of Technology | Silicon-germanium etch stop layer system |
US6689211B1 (en) * | 1999-04-09 | 2004-02-10 | Massachusetts Institute Of Technology | Etch stop layer system |
JP4258034B2 (en) * | 1998-05-27 | 2009-04-30 | ソニー株式会社 | Semiconductor device and manufacturing method of semiconductor device |
JP3403076B2 (en) * | 1998-06-30 | 2003-05-06 | 株式会社東芝 | Semiconductor device and manufacturing method thereof |
US6130453A (en) * | 1999-01-04 | 2000-10-10 | International Business Machines Corporation | Flash memory structure with floating gate in vertical trench |
JP3592981B2 (en) | 1999-01-14 | 2004-11-24 | 松下電器産業株式会社 | Semiconductor device and manufacturing method thereof |
US6162688A (en) * | 1999-01-14 | 2000-12-19 | Advanced Micro Devices, Inc. | Method of fabricating a transistor with a dielectric underlayer and device incorporating same |
AU3346000A (en) * | 1999-01-15 | 2000-08-01 | Regents Of The University Of California, The | Polycrystalline silicon germanium films for forming micro-electromechanical systems |
US6074919A (en) * | 1999-01-20 | 2000-06-13 | Advanced Micro Devices, Inc. | Method of forming an ultrathin gate dielectric |
US6350993B1 (en) * | 1999-03-12 | 2002-02-26 | International Business Machines Corporation | High speed composite p-channel Si/SiGe heterostructure for field effect devices |
WO2000054338A1 (en) | 1999-03-12 | 2000-09-14 | International Business Machines Corporation | High speed ge channel heterostructures for field effect devices |
JP3595718B2 (en) * | 1999-03-15 | 2004-12-02 | 株式会社東芝 | Display element and method of manufacturing the same |
JP4521542B2 (en) | 1999-03-30 | 2010-08-11 | ルネサスエレクトロニクス株式会社 | Semiconductor device and semiconductor substrate |
US6103559A (en) * | 1999-03-30 | 2000-08-15 | Amd, Inc. (Advanced Micro Devices) | Method of making disposable channel masking for both source/drain and LDD implant and subsequent gate fabrication |
US6251755B1 (en) * | 1999-04-22 | 2001-06-26 | International Business Machines Corporation | High resolution dopant/impurity incorporation in semiconductors via a scanned atomic force probe |
US6151248A (en) * | 1999-06-30 | 2000-11-21 | Sandisk Corporation | Dual floating gate EEPROM cell array with steering gates shared by adjacent cells |
US6204529B1 (en) * | 1999-08-27 | 2001-03-20 | Hsing Lan Lung | 8 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gate |
US6339232B1 (en) * | 1999-09-20 | 2002-01-15 | Kabushika Kaisha Toshiba | Semiconductor device |
US6559040B1 (en) * | 1999-10-20 | 2003-05-06 | Taiwan Semiconductor Manufacturing Company | Process for polishing the top surface of a polysilicon gate |
US6249022B1 (en) * | 1999-10-22 | 2001-06-19 | United Microelectronics Corp. | Trench flash memory with nitride spacers for electron trapping |
US6551399B1 (en) * | 2000-01-10 | 2003-04-22 | Genus Inc. | Fully integrated process for MIM capacitors using atomic layer deposition |
EP1252659A1 (en) | 2000-01-20 | 2002-10-30 | Amberwave Systems Corporation | Strained-silicon metal oxide semiconductor field effect transistors |
US6271094B1 (en) * | 2000-02-14 | 2001-08-07 | International Business Machines Corporation | Method of making MOSFET with high dielectric constant gate insulator and minimum overlap capacitance |
JP3603747B2 (en) | 2000-05-11 | 2004-12-22 | 三菱住友シリコン株式会社 | Method for forming SiGe film, method for manufacturing heterojunction transistor, and heterojunction bipolar transistor |
DE10025264A1 (en) * | 2000-05-22 | 2001-11-29 | Max Planck Gesellschaft | Field effect transistor based on embedded cluster structures and method for its production |
JP3546169B2 (en) * | 2000-05-26 | 2004-07-21 | 三菱重工業株式会社 | Semiconductor device and manufacturing method thereof |
US6969875B2 (en) | 2000-05-26 | 2005-11-29 | Amberwave Systems Corporation | Buried channel strained silicon FET using a supply layer created through ion implantation |
EP1295319A2 (en) | 2000-06-22 | 2003-03-26 | Massachusetts Institute Of Technology | Etch stop layer system for sige devices |
US6583015B2 (en) * | 2000-08-07 | 2003-06-24 | Amberwave Systems Corporation | Gate technology for strained surface channel and strained buried channel MOSFET devices |
WO2002015244A2 (en) | 2000-08-16 | 2002-02-21 | Massachusetts Institute Of Technology | Process for producing semiconductor article using graded expitaxial growth |
US6649480B2 (en) * | 2000-12-04 | 2003-11-18 | Amberwave Systems Corporation | Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs |
EP1399970A2 (en) | 2000-12-04 | 2004-03-24 | Amberwave Systems Corporation | Cmos inverter circuits utilizing strained silicon surface channel mosfets |
US20020100942A1 (en) * | 2000-12-04 | 2002-08-01 | Fitzgerald Eugene A. | CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs |
KR100391988B1 (en) * | 2001-02-09 | 2003-07-22 | 삼성전자주식회사 | DRAM cell and fabrication method thereof |
JP2002241195A (en) | 2001-02-15 | 2002-08-28 | Mitsubishi Materials Silicon Corp | Method for producing epitaxial multilayer film and epitaxial multilayer film |
WO2002071495A1 (en) | 2001-03-02 | 2002-09-12 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed cmos electronics and high speed analog circuits |
US6724008B2 (en) * | 2001-03-02 | 2004-04-20 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6646322B2 (en) * | 2001-03-02 | 2003-11-11 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
WO2002071491A1 (en) | 2001-03-02 | 2002-09-12 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed cmos electronics and high speed analog circuits |
WO2002071488A1 (en) | 2001-03-02 | 2002-09-12 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed cmos electronics and high speed analog circuits |
US6723661B2 (en) * | 2001-03-02 | 2004-04-20 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6348407B1 (en) * | 2001-03-15 | 2002-02-19 | Chartered Semiconductor Manufacturing Inc. | Method to improve adhesion of organic dielectrics in dual damascene interconnects |
JP2002273961A (en) * | 2001-03-16 | 2002-09-25 | Hitachi Koki Co Ltd | Method of setting printing start position for continuous paper printer |
US6531324B2 (en) * | 2001-03-28 | 2003-03-11 | Sharp Laboratories Of America, Inc. | MFOS memory transistor & method of fabricating same |
US6603156B2 (en) * | 2001-03-31 | 2003-08-05 | International Business Machines Corporation | Strained silicon on insulator structures |
US6468869B1 (en) * | 2001-05-11 | 2002-10-22 | Macronix International Co., Ltd. | Method of fabricating mask read only memory |
WO2002103760A2 (en) | 2001-06-14 | 2002-12-27 | Amberware Systems Corporation | Method of selective removal of sige alloys |
US7301180B2 (en) * | 2001-06-18 | 2007-11-27 | Massachusetts Institute Of Technology | Structure and method for a high-speed semiconductor device having a Ge channel layer |
US6916727B2 (en) * | 2001-06-21 | 2005-07-12 | Massachusetts Institute Of Technology | Enhancement of P-type metal-oxide-semiconductor field effect transistors |
US6974735B2 (en) * | 2001-08-09 | 2005-12-13 | Amberwave Systems Corporation | Dual layer Semiconductor Devices |
US6541321B1 (en) * | 2002-05-14 | 2003-04-01 | Advanced Micro Devices, Inc. | Method of making transistors with gate insulation layers of differing thickness |
US7169226B2 (en) * | 2003-07-01 | 2007-01-30 | International Business Machines Corporation | Defect reduction by oxidation of silicon |
-
2002
- 2002-06-14 WO PCT/US2002/018973 patent/WO2002103760A2/en not_active Application Discontinuation
- 2002-06-14 US US10/172,542 patent/US6900094B2/en not_active Expired - Lifetime
- 2002-06-14 AU AU2002322105A patent/AU2002322105A1/en not_active Abandoned
-
2004
- 2004-03-10 US US10/797,231 patent/US20040171223A1/en not_active Abandoned
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4920076A (en) * | 1988-04-15 | 1990-04-24 | The United States Of America As Represented By The United States Department Of Energy | Method for enhancing growth of SiO2 in Si by the implantation of germanium |
US5327375A (en) * | 1988-07-08 | 1994-07-05 | Eliyahou Harari | DRAM cell utilizing novel capacitor |
US5327375B1 (en) * | 1988-07-08 | 1999-03-16 | Eliyahou Harari | Dram cellutilizing novel capacitor |
US5312766A (en) * | 1991-03-06 | 1994-05-17 | National Semiconductor Corporation | Method of providing lower contact resistance in MOS transistors |
EP0844651A1 (en) * | 1996-11-26 | 1998-05-27 | Xerox Corporation | Method of controlling oxidation in multilayer semiconductor structure comprising Group III elements |
US5963817A (en) * | 1997-10-16 | 1999-10-05 | International Business Machines Corporation | Bulk and strained silicon on insulator using local selective oxidation |
Also Published As
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US20030013323A1 (en) | 2003-01-16 |
US6900094B2 (en) | 2005-05-31 |
AU2002322105A1 (en) | 2003-01-02 |
WO2002103760A2 (en) | 2002-12-27 |
US20040171223A1 (en) | 2004-09-02 |
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