WO2002089205A3 - Relay connector for an electronic component and a method for producing the same - Google Patents
Relay connector for an electronic component and a method for producing the same Download PDFInfo
- Publication number
- WO2002089205A3 WO2002089205A3 PCT/DE2002/001279 DE0201279W WO02089205A3 WO 2002089205 A3 WO2002089205 A3 WO 2002089205A3 DE 0201279 W DE0201279 W DE 0201279W WO 02089205 A3 WO02089205 A3 WO 02089205A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- relay connector
- plated
- producing
- same
- electronic component
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
The invention relates to a relay connector comprising a three-dimensional base body consisting of insulating material, the upper side of said body having a bearing surface for the component in addition to internal contacts for electrically connecting to subassembly connections, and the underside having studs formed from insulating material for forming external contacts. The internal contacts are connected to the external contacts on the underside by means of printed conductors and plated holes. Said plated holes are created by vias in a plated hole region, preferably by means of laser drilling, whereby the wall thickness of the base body in the plated hole region is reduced by a recess. The invention enables the vias and the entire relay connector to be produced rapidly and cost-effectively by means of laser machining.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2001120257 DE10120257A1 (en) | 2001-04-25 | 2001-04-25 | Connection carrier for an electronic component and method for its production |
DE10120257.1 | 2001-04-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002089205A2 WO2002089205A2 (en) | 2002-11-07 |
WO2002089205A3 true WO2002089205A3 (en) | 2003-08-07 |
Family
ID=7682669
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2002/001279 WO2002089205A2 (en) | 2001-04-25 | 2002-04-08 | Relay connector for an electronic component and a method for producing the same |
Country Status (2)
Country | Link |
---|---|
DE (1) | DE10120257A1 (en) |
WO (1) | WO2002089205A2 (en) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5355283A (en) * | 1993-04-14 | 1994-10-11 | Amkor Electronics, Inc. | Ball grid array with via interconnection |
WO1998027588A1 (en) * | 1996-12-19 | 1998-06-25 | Telefonaktiebolaget Lm Ericsson (Publ) | A via structure |
US6107109A (en) * | 1997-12-18 | 2000-08-22 | Micron Technology, Inc. | Method for fabricating a semiconductor interconnect with laser machined electrical paths through substrate |
US6114240A (en) * | 1997-12-18 | 2000-09-05 | Micron Technology, Inc. | Method for fabricating semiconductor components using focused laser beam |
WO2001082372A1 (en) * | 2000-04-20 | 2001-11-01 | Siemens Aktiengesellschaft | Polymer stud grid array having feedthroughs and method for producing a substrate for a polymer stud grid array of this type |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0953210A1 (en) * | 1996-12-19 | 1999-11-03 | TELEFONAKTIEBOLAGET L M ERICSSON (publ) | Flip-chip type connection with elastic contacts |
TW420853B (en) * | 1998-07-10 | 2001-02-01 | Siemens Ag | Method of manufacturing the wiring with electric conducting interconnect between the over-side and the underside of the substrate and the wiring with such interconnect |
-
2001
- 2001-04-25 DE DE2001120257 patent/DE10120257A1/en not_active Withdrawn
-
2002
- 2002-04-08 WO PCT/DE2002/001279 patent/WO2002089205A2/en not_active Application Discontinuation
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5355283A (en) * | 1993-04-14 | 1994-10-11 | Amkor Electronics, Inc. | Ball grid array with via interconnection |
WO1998027588A1 (en) * | 1996-12-19 | 1998-06-25 | Telefonaktiebolaget Lm Ericsson (Publ) | A via structure |
US6107109A (en) * | 1997-12-18 | 2000-08-22 | Micron Technology, Inc. | Method for fabricating a semiconductor interconnect with laser machined electrical paths through substrate |
US6114240A (en) * | 1997-12-18 | 2000-09-05 | Micron Technology, Inc. | Method for fabricating semiconductor components using focused laser beam |
WO2001082372A1 (en) * | 2000-04-20 | 2001-11-01 | Siemens Aktiengesellschaft | Polymer stud grid array having feedthroughs and method for producing a substrate for a polymer stud grid array of this type |
Also Published As
Publication number | Publication date |
---|---|
DE10120257A1 (en) | 2002-11-14 |
WO2002089205A2 (en) | 2002-11-07 |
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