WO2002019637A1

WO2002019637A1 - Method and apparatus for queue administration in a packet processing device

Info

Publication number: WO2002019637A1
Application number: PCT/US2001/026694
Authority: WO
Inventors: Paul Peng-Sheng Wang; Sriram Krishnan
Original assignee: Entridia Corporation
Priority date: 2000-08-28
Filing date: 2001-08-27
Publication date: 2002-03-07
Also published as: AU2001285310A1

Abstract

A system for queuing packets, administrating one or more queues, and managing drop queues. A packet processing device having an administrator (300), a memory structure, an allocation unit (304), and one or more queues (320) having an optional queue manager (312). Upon receipt of a packet, the administrator (300) receives an address from the allocation unit (304), stores the address and stores the packet in the memory structure.

Description

FIELD OF THE INVENTION The present invention relates to a method and apparatus for processing packets and in particular to a method and apparatus for managing one or more queues in a packet processing device.

BACKGROUND OF THE INVENTION

As the use of packet switched networks and transmission protocols continues to increase, there is also an increased demand for increased transmission rates. A bottleneck in the transmission of packets in a packets switched network may arise if the packet processing devices in the network that process and route the packets are unable to operate at or near the speed of the transmission medium. For example, transmission medium operating at the OC-48 standard transmits packets at a maximum rate of about 1 packet every 130 nanoseconds while the OC-768 standard transmits packets at a maximum rate of about 1 packet every 8 nanoseconds. Hence, packet processing devices must process packets at a high rate.

One particular bottleneck for packet processing devices has been their inability to efficiently allocate memory space, queue packets in a desired transmit queue, and drop or delete unwanted packets as desired. Prior art methods and apparatus designed to perform these tasks perform particularly poorly when the packet processing must be performed at high rates. For example, in some configurations, a packet processing device, such as a router, utilizes a plurality of queues. If one particular queue becomes full it may be desirable to delete packets from that one particular queue. Systems of the prior art perform poorly when deleting packets within a particular queue, especially when operating at high transmission rates.

The present invention overcomes the disadvantages of the prior art by providing a method and apparatus for high speed packet processing and in particular a method and apparatus for queuing packets and administrating the queues in high speed packet processing device. SUMMARY OF THE INVENTION

The invention provides a method and apparatus to administrate one or more queues in a packet processing device. The invention overcomes drawbacks in the field by providing a system for high speed of administration of transmit priority queues and drop priority queues.

In one embodiment the invention includes a controller or administrator, a memory unit, one or more queues, one or more allocation units, and one or more age modules. The controller is configured to receive packets and oversee the queuing operation. The controller couples to memory configured with a plurality of slots, each slot identified by an address. In one configuration, each slot has capacity to store the largest packet to be processed by the packet processing device.

The controller is also in communication with an allocation unit. The allocation unit stores and provides addresses or slot identifiers to the controller. The addresses provided by the allocation unit identify slots in memory. In one embodiment the allocation unit is configured as a first-in, first-out device configured to maintain the order of memory addresses stored therein.

The controller also couples to a queue system having one or more queues. The queue system may have an associated queue manager. The queues store information from the controller in a desired order or for retrieval at a later time. In one embodiment the queues comprise a plurality of memory arrangements configured as first-in, first-out devices that are arranged into a plurality of separate queues based on a transmit priority assigned to the queue and a drop priority assigned to the queue.

The age module provides data indicating the time or order of arrival of one or more packets into the packet processing device. In one embodiment the age module comprises a counter and a state module providing a state value. The state module may comprise a one bit register having a value that changes upon counter roll-over. Upon receipt of a packet the age module may output data indicative of the time of receipt of the packet or order of receipt. In one configuration the output comprises a counter value and a state value.

In example method of operation, the controller receives a packet for storing and appropriate queuing. Upon receipt the system obtains an address from the allocation unit and stores the packet at the assigned address. Thereafter, the controller obtains the current age value from the age module and associates the age value with the address or slot identifier at which the newly received packet was stored in memory. This combination of slot identifier (address) and age value are referred to herein as the packet identifier.

Upon receipt or at any time thereafter the packet may be analyzed to determine which transmit priority queue and drop priority queue the packet should properly be associated. Based on this determination, the invention places the packet identifier into a queue corresponding to the same priority queue and drop queue. It is contemplated the queues comprises first-in, first-out type queues thereby allow the order of the packet identifiers in the queue to be tracked. Hence, the next-out packet identifier in each queue can be determined.

To transmit a packet from the packet processing device, the queue system determines which transmit priority queue has priority. Once the proper transmit priority queue is selected, the next-out positions of one or more drop queues are analyzed. In one embodiment, only drop queues from the transmit priority queue having authorization to transmit are analyzed. In the case of two or more next-out positions being analyzed, the operation selects the packet identifier, stored at one of the identified next-out positions, that has been stored for the longest period of time, i.e. which was received first.

The controller retrieves or is provided at least some of the data in the packet identifier, such as the address at which the corresponding packet is stored in memory. The packet may then be retrieved and transmitted, or the controller may provide the address to a transmit module that will eventually transmit the packet.

The invention may also be configured to delete packets as necessary to facilitate desired operation. In one embodiment the controller or the queue system compares the age value of one or more stored packet identifiers to the current age value. Packet identifiers that have an age value, as compared to the current age value, meeting certain criteria may be deleted. In another feature, packet identifiers falling within certain age value parameters may be deleted from one or more drop queues in the event of one or more queues becoming full or at or near capacity.

Further objects, features, and advantages of the present invention over the prior art will become apparent from the detailed description and the drawings. DESCRIPTION OF THE DRAWINGS

FIGURE 1 illustrates an example environment of the invention.

FIGURE 2 illustrates a block diagram of an example embodiment of the invention.

FIGURE 3 illustrates a block diagram of an alternative embodiment of the invention.

FIGURE 4 illustrates example values of a counter and a state bit.

FIGURE 5 illustrates an example configuration of a packet identifier.

FIGURE 6 illustrates a block diagram of an alternative embodiment of the invention having a plurality of transmit priority queues.

FIGURE 7 illustrates a block diagram of an alternative embodiment of the invention having a queues and allocations FIFO in a single memory structure.

FIGURE 8 illustrates an operational flow diagram of an example method of receiving a packet.

FIGURE 9 illustrates an operational flow diagram of an example method of aging a packet.

FIGURES 10A and 10B illustrate an operational flow diagram of an example method of requesting an address.

FIGURES 11A and 11B illustrate an operational flow diagram of an example method of obtaining a next-out packet identifier.

DETAILED DESCRIPTION OF THE INVENTION The invention is a method and apparatus for managing queues in a packet processing device. In one configuration, the invention administrates the queuing of packets into one of a plurality of queues while providing an efficient and rapid system to track packet location, retrieve a packet, or delete one or more packets from the queuing system. In the following description, numerous specific details are set forth in order to provide a more thorough description of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without these specific details. In other instances, well-known features have not been described in detail so as not to obscure the invention. Moreover, it is fully contemplated that the various features described herein may be utilized in any combination or alone.

1. Example Environment

Figure 1 illustrates one possible example environment for which the invention is well suited. The example environment shown in Figure 1 is within a packet processing device in a packet switched network, an in particular, within or embodied in conjunction with a queuing system in a packet processing device. The example environment shown includes a first computer network 102, a second computer network 104 and a third computer network 106. The second computer network 104 connects to the Internet 108 through a router 110 to achieve communication with a worldwide network of computers. The router 110 also facilitates communication with a third computer network 106. A router 110 is one example of a packet processing device configured to receive incoming packets, perform packet routing look-up functions, and forward packets onward based on the destination address contained within a packet header.

The third computer network 106 includes a hub 114. The hub 114 duplicates received packets and forwards the duplicate packets to each of the one or more computers 120 connected thereto.

Another packet processing device 130 resides between the first computer network 102 and the second computer network 104. The second packet processing device 130 is also configured as a router. Internal to the exemplary packet processing device 130 is a receive and transmit engine 132, memory 134, a packet queuing system 136, and an routing engine 138. The receiver portion of the Rx/Tx engine 132 accepts packets from a transmission medium and performs layer 3 to layer 4 processing. The receive portion also communicates with the queuing system 136 and the memory 134 to facilitate queuing of the packet during the routing look-up operation and while awaiting a transmit opportunity.

The queuing system 136 may utilize the invention described herein to store the packet in memory 134 and associate an identifier with the stored packet. This packet identifier is then assigned to an appropriate queue. When the queue containing the packet identifier is provided a transmit opportunity the packet identifier is utilized to retrieve the packet from memory. Thereafter the transmit portion of the Rx/Tx engine 132 sends the packet out of the router 130.

The invention also provides means to rapidly delete one or more packet identifiers from the queuing system 136 to clear additional space for incoming packets. The invention may also provide means to evaluate the age of packet identifiers in the queue system 136 and delete packet identifiers with undesirable age characteristics. The term packet identifiers as used herein means a generally unique code, memory address or other key to identify or locate a packet. Deletion of a packet identifier or recovery of a slot identifier to the allocation unit may be considered to also delete the associated packet or allow the system to overwrite the packet being stored in memory with other data.

Of course, it is but one possible example environment. It is fully contemplated that the invention may be adopted for use in other environments than the one just described.

2. Example Embodiments

Figure 2 illustrates a block diagram of an exemplary configuration of apparatus to achieve the invention. In this embodiment, the invention is embodied with a controller 200 connected or coupled to input/output medium 202, one or more queues 204, an allocation unit 206, and memory 208. In this configuration, the controller 200 is in communication with the one or more queues 204, the allocation unit 206 and memory 208. The controller 200 may comprise logic, either simple or complex and dynamic, a processor, digital signal processor or other device capable of overseeing operation of packet administration. In operation, the controller 200 oversees ingress and egress of packets into the memory 208. The memory 208 may comprise any type of RAM, including but not limited to SRAM, SDRAM, or DRAM or a combination thereof, or any other type of memory capable of storing data as contemplated by the present invention. In one configuration the memory 208 is divided into virtual slots. Each virtual slot is identified by a memory address.

The controller 200 also interfaces with the allocation unit 206. The allocation unit 206 may comprise a processor or a memory device, such as a first in, first out memory device (FIFO) capable of generating and tracking a sequence of handles, codes or addresses. Upon request, the allocation unit 206 provides one of the plurality of addresses to the controller 200. In the example embodiment described herein, an address corresponds to or identifies a particular address or slot in memory 208 and each address uniquely identifies a particular slot or location in memory 208. While other arrangements are covered by the scope of the invention, this unique correspondence reduces or eliminates data processing errors.

The one or more queues 204 may comprise one or more memory elements configured to store entries. In one embodiment the one or more queues further include a plurality of sub-queues. As is implied by the term queue, the one or more queues 204 record entries and may maintain the order of the entries.

In the embodiment of a packet processing device, it may be desired to assign different transmit priorities to different packets. As a result, some queues may be deemed high transmit priority queues while other queues may comprise low transmit priority queues. The one or more queues 204, with aid of the controller 200, operate to track the order of receipt of entries and, upon request, provide the entries as an output. Transmit priority algorithms determine from which of the one or more transmit priority queues a packet identifier will be retrieved for transmission. The transmit algorithms may determine the priority or number of transmit opportunities given to each sub-queue (drop queue) within the one or more queues 204. In another embodiment, priority within a transmit priority queue is based on age of the packet, which can be determined by the age value in the packet identifier. The following provides one example method of operation. Upon receipt of a packet, the controller 200 request an address from the allocation unit 206. The address corresponds to a slot in memory 208. The controller 200 associates the packet with the address, stores the packet in memory 208, and sends the address to the one or more queues 204. It is contemplated that either the controller 200 or the one or more queues 204 analyzes the packet to determine its priority. The one or more queues 204 assign the address to the proper sub-queue based on the transmit priority of its associated packet and the transmit priority of the assigned queue and sub-queue. In this manner packets are received, analyzed, stored, and queued for re-transmission.

In other embodiments, the apparatus of Figure 2 includes an ordering mechanism to track the order of receipt of the packets. This data is utilized to determine which packet (or packet address), out of all the packets in a particular sub-queue, should be transmitted first when the addresses (i.e. packets) are being retrieved for packet transmission.

In yet another additional embodiment, the apparatus of Figure 2 includes an age mechanism. The age mechanism provides means to delete addresses, i.e. reference to the packet, and hence the packet itself. Deleting of packets occurs when packets are no longer relevant or wanted due to delay in their transmission.

Figure 3 illustrates a block diagram of an exemplary configuration of another embodiment of the invention. As this is a different embodiment, new reference numerals are utilized throughout Figure 3. An administrator 300 connects to a transmission medium 301 to receive and transmit packets. The administrator 300 serves as a central control point for generation of a packet identifier and management of other processes. Operation of the administrator 300 is generally similar to the controller 200 shown in Figure 2. In one embodiment the administrator is constructed with application specific integrated circuit (ASIC logic), other large scale integrated circuit technology, a processor with associated code, or any other circuit configured to achieve a same or similar result.

A memory module 302 connects to the administrator 300 and is configured to store packets or other data sent from the administrator. In this embodiment the memory 302 is divided into slots or units. Each slot or unit may be identified by an address. Hence, in this embodiment, the memory 302 is divided into slots having addresses SI through SN, where N is the number of available slots. In one embodiment each slot is one thousand bytes in size, however it is contemplated that in other embodiments the slots may assume any various size. In one variation, the slot size mirrors the largest packet to be processed by the packet processing device.

The memory 302 may comprise any type of memory, including but not limited to SRAM, SDRAM, DRAM, flash memory, or a combination thereof, or any other type of memory capable of storing data as contemplated by the present invention. It is contemplated that a memory controller, such as RAM controller, be associated with the memory to facilitate desired operation.

An allocation engine 304 is also in communication with the administrator 300. Upon receipt of a packet, the administrator 300 requests an address from the allocation engine 304 and associates the received address with the newly received packet.

The allocation engine 304 is similar to the allocation unit 206 of Figure 2, but in this embodiment it comprises a first-in, first-out memory cell (hereinafter "allocation FIFO 304") containing addresses. The addresses contained within the allocation FIFO 304 may default to a set value on reset or be assigned to the allocation FIFO by the administrator 300 at start-up. For purposes of understanding, the term "first-in position" refers to the address residing in the FIFO for the longest period of time; the term "last-in position" refers to the address in the allocation FIFO 304 that is the most recent address returned to the allocation FIFO.

The addresses that reside in the allocation FIFO 304 correspond to or identifies a slot in memory 302. Thus, in one embodiment the allocation FIFO 304 contains 1 through N positions, and each position in the allocation FIFO stores an address. Upon request, the allocation FIFO 304 provides on its output an address. In accordance with FIFO operation, output from the allocation FIFO 304 occurs with the earliest entered input to the FIFO being the first output from the FIFO. As can be appreciated, during repeated operation of the queuing system the entries in the allocation FIFO are all repeatedly used as the allocation FIFO entries roll-over. As a result, the memory slots are used a generally equal number of times. It should be noted that the memory 302 is shared in that it stores a plurality of different packets that may be assigned to any of the various queues in the system. When the administrator 300, and queueing system in general, is finished with an address that was previously requested by the administrator and associated with an incoming packet, the administrator retrieves the address from the queue system 310 and returns it to the last-in position of the allocation FIFO 304. In this manner, addresses assigned by the allocation FIFO 304 are cycled through the allocation FIFO in first-in, first-out fashion. It is contemplated that other systems or apparatus other than a FIFO may be utilized. These systems or apparatus include, but are not limited to, a last-in, first-out device, a content addressable memory, or a device utilizing a stack, or any other device capable of achieving the functionality of the allocation unit.

An age module 306 couples to the administrator 300. Upon receipt of a packet, the administrator 300 requests or reads an age stamp or age value from the age module 306. In one embodiment the age module 306 comprises a counter configured to sequentially increment or decrement upon receipt of a packet. Any size counter may be selected. In one embodiment a twenty bit or position counter is utilized. Upon completion of a counter cycle, the counter resets and the process continues.

This embodiment is also configured with a state module 308. When the age module 306 completes a cycle of operation and subsequently resets, it sends a signal or in some way changes the value stored in the state module 308. In one embodiment the state module 308 comprises one or more bit registers or flags. For example, in a one bit state module, the bit initially assumes a value of logic zero. When the counter completes one cycle, the age module 306 changes the value of the state module 308 to logic one. When another cycle of the counter is complete, the age module 306 returns the value in the state module 308 to logic zero. This manner of operation continues. It is contemplated that any number of bits may be used to represent the state module, or that in other embodiments other apparatus may be utilized to assist in time stamping or order stamping packets.

Figure 4 illustrates a table containing example counter values an associated state bit values. Figure 4 is provided to better illustrate the relation between the counter operation and the state bit value. As shown, a counter value column 350 contains the counter values as a counter, in this example a three bit counter, cycles through its values. Values from a three bit counter are shown to simplify discussion by having to illustrate fewer values before a counter rollover occurs. A state bit column 352 contains the value of the state bit. During operation the counter increments (or decrements), as shown by rows 354. During this period, the value of the state bit remain unchanged.

When the counter rolls over, at a row 356, the state value changes as shown. This state value remains unchanged during rows 358. However, at a row 360, the counter rolls over again and the state value again changes. Operation continues in this manner. Based on this operation, the state value, in combination with the counter value, indicates a time or order of receipt of a packet. By comparison of the current counter value and current state value to two or more stored values representing previous counter values and state values, a comparison can made as to the order or age of the stored values. This system is fast and efficient and hence ideally suited for use with the apparatus and method described herein.

Upon receipt of a packet, the administrator 300 requests an address from the allocation FIFO (described above), an age stamp from the age module 306 (described above), and the current state value from the state module 308 (described above). These three items of information are packaged into a packet identifier that corresponds to or is associated with the newly received packet. Figure 5 illustrates an example of an identifier 400 as might be associated with each incoming packet. The packet identifier 400 includes a memory address field 402, an age value field 404, and a state value field 406. In one embodiment, the packet identifier 400 or other data association includes information regarding the transmit priority and the drop priority of the packet identified by the packet identifier. Packet length or other data may also be stored in or a part of the packet identifier.

The memory address field 402 stores the address or location of the packet. In one embodiment the memory address field 402 contains the address value, provided by the allocation FIFO 304, of the location of the packet in the memory 302. The age value field 404 stores the age stamp provided by the age module 306. The age value field thus provides an indication of when the packet was received in relation to the other packets. The state value field 406 stores the state value provided by the state module when the packet was received.

Returning now to Figure 3, a queue 310 communicates with the administrator 300. The single transmit priority queue 310 may include a queue manager 312 and a plurality of drop queues (sub-queues) 320A, 320B, 320C through 320#, where # is the total number of sub-queues in the transmit priority queue. In one embodiment the first drop queue 320A has a different drop priority than the second drop queue 320B, and the third drop queue 320C. In this embodiment each drop queue has a different drop priority. Drop priority is the priority or importance assigned to the packets, identified by packet identifiers, stored in the particular drop queue. Hence, if packets are to be dropped or deleted, packets of a single transmit priority, and of a particular drop priority may be deleted. This provides greater functionality and control when providing packet processing based on class or type of service.

The queue system 310 and the queue manager 312 obtain information about received packets to determine the transmit priority and drop priority to assign to each packet. Based on the transmit priority and drop priority assigned to the packet, the queue manager obtains the packet's corresponding packet identifier from the administrator 300 and assigns the packet identifier (shown in Figure 5) to the appropriate transmit priority queue 310 and drop priority 320A - 320# with a corresponding transmit priority and drop priority. In the embodiment discussed herein, each drop queue 320 A - 320# is divided into a number of positions. Each position can store a packet identifier. For example, the first queue has positions QA1-QAM where M is the total number of available positions in the drop queue. Different drop queues may have different number of positions or the same number of positions. It is further contemplated that the invention may be embodied with more than one transmit priority queue 310. Figure 6 illustrates an exemplary embodiment with more than one transmit priority queue. As shown, a first queue 310, a second queue 330, a third queue 332, and an fourth queue 334 are shown. The second transmit priority queue 330 includes sub- queues 322A - 322#. The third transmit priority queue 332 includes sub-queues 324A - 324#. The fourth transmit priority queue 334 includes sub-queues 326A - 326#. Any number of queues may be included as desired.

Returning to Figure 3, showing a first queue 310, with a plurality of sub-queues 320A-320# configured as drop queues. Upon receiving a packet identifier (shown in Figure 5), the queue manager 312 assigns it to the proper drop queue (any of sub-queue 320A - 320#). In one embodiment, the queue 310 and other queues described herein comprise first-in, first-out structures. The queue manager 312 is configured to apply transmit priority algorithms and drop priority algorithms to the operation of the queue structures. Transmit priority algorithms and drop priority algorithms are procedures or rules assigned to different classes of service or packet types to control the transmit priority assigned to a packet and the drop priority assigned to a packet. Drop priority and transmit priority may be determined in any various manner, including random early detection, weighted round robin, fair weighted queuing, or drop priority based on congestion. Drop priority based on congestion drops packets, or packet identifiers from the most backed-up queues. Random early detection comprises monitoring which queue is nearly full and dropping packets from that queue. This causes the sending device to recalculate its transmission rate. In the prevalent TCP/IP protocol this may achieve a more efficient utilization of the transmission medium by reducing re-transmissions.

In one particular configuration during a packet transmit opportunity, the queue manager 312 is configured to read and analyze the packet identifiers for the first-in position of each drop queue. The first-in position in the drop queues (sub-queue) may be maintained by a pointer system within the FIFO or any other system capable of tracking which packet identifier has been in the drop queues (sub-queue) the longest and is thus the next first-out from the queue.

In one configuration the queue manager 312 is also capable of analyzing the age field and the state field of one or more packet identifiers stored in the transmit queue, such as queue 310.

Figure 7 illustrates an alternative embodiment of the invention. As shown, the queue FIFO's 310 and the allocation FIFO 304 are placed in a FIFO memory 370. The allocation FIFO 304 stores and provides as an output the slot addresses in the memory 302. The queue FIFO's 310 and the allocation FIFO 304 share a common FIFO memory structure 370.

To oversee FIFO memory 370, this alternative embodiment includes a FIFO controller 372 and a memory controller 374. The FIFO control keeps track of the portions of the memory 370 dedicated to operation as a FIFO. For example, the FIFO controller 372 maintains a pointer to the next-out position in the FIFO's 370. The FIFO controller 372 may also maintain a pointer to the next-out position in the one or more queue FIFO's 304.

The memory controller 374 interfaces with the FIFO memory 370 and the FIFO controller 372 to further achieve desired operation of the FIFO memory. 3. Operation

The operation of one embodiment is now described. For purposes of understanding, the discussion and the figures are separated into the various individual operations of the administration/packet accounting system. It should be understood that in actual operation the operations or steps occur in unison or in any various order and may be intermingled as necessary or occur in parallel to achieve desired operation. Speed advantages may be gained by parallel operation. For purposes of discussion, the basic operations are divided into a receive packet operation, age packet operation, delete packet operation, and transmit packet operation. Each of these operations is described in more detail below.

Figure 8 illustrates an operational flow diagram of one example method of operation of the invention when receiving a packet. At a step 600 a packet processing device receives a packet. The packet may be received in any manner known in the art. Thereafter, at a step 602 the operation performs layer 3 to layer 4 processing.

At a step 604 the operation determines the transmit priority and the drop priority for the incoming packet. This analysis determines which transmit priority queue and which drop priority queue the packet will be placed. In one embodiment the controller or administrator performs this task. In another embodiment the queue manager or other apparatus or system performs this task. One exemplary method of determining the transmit priority and the drop priority is to examine the header information (not shown) of the received packet.

The operation continues at a step 608 when the administrator executes a request address operation. The request address operation comprises a request by the administrator for an address from the allocation engine. Upon request the allocation engine provides an address to the administrator. The address proyided by the allocation engine corresponds to a slot in the memory as is described above in greater detail. The request address operation is described in detail in conjunction with Figure 10A and 10B.

Next, at a step 610, the operation administrator stores the packet in memory at the address supplied by the allocation engine. The packet may remain in memory at the designated address until recalled by another system or until written over by another packet. Because the packet need not be deleted, it can be used multiple times, such as for multicast applications, and the overhead associated with deleting a packeted is eliminated.

Thereafter, at a step 612, the operation updates the age module. In one embodiment this comprises sending a signal to a counter to increment the counter value. In another embodiment the age module comprises a timer that periodically resets.

Next, at decision step 613, the operation determines if the previous incrementation or operation of the age module caused the age module to reset. For example, if the age module is embodied as a counter, decision step 613 inquires whether the previous counter increment at step 612 caused the counter to reset.

If the outcome of step 613 is yes, then the operation progresses to 630. At step 630 the operation changes the state value. In one embodiment the state value comprises the value of a one bit flag. In another embodiment, the state value comprises the value of a two bit register. Thereafter, at a step 632, the operation executes an age operation. The age operation removes, deletes, or allows to be over-written packets or packet identifiers in the system that have been stored for too long a period. The age operation is described in more detail in Figure 9.

Thereafter, the operation progresses to 614 and the age value is provided to the administrator. The age value is data representing or indicating the time of receipt or order of receipt of a packet or other item of data. In one example embodiment the age value comprises a counter value and a state value. In another embodiment the age value comprises the output of a timer.

At this state in operation, the packet is stored in memory at the address assigned by the allocation engine. Moreover, the administrator has stored in its internal memory, or at some other location, the address at which the packet is stored in memory, the age value or time stamp, and the state value representing the value of the state module when the packet was received. This information is referred to as the packet identifier as it identifies the packet location and some information about the age of the packet compared to other packets stored in memory.

Next, at a step 616, the operation sends the packet identifier from the administrator to the queue manager. In one embodiment the queue manager is integral with the administrator. Next, at a step 618, the queue manager determines the proper queue and sub-queue into which to place the packet identifier. Stated another way, the systems determine the proper transmit priority queue and drop queue into which to place the packet identifier. It is contemplated that the operation first determines the proper transmit priority queue into which to place the packet and once the transmit priority queue is decided, the operation determines the proper drop queue. In another configuration the administrator or other system determines the proper transmit priority queue and the proper drop priority queue.

In one configuration, the transmit priority queues and the drop queues are embodied as first-in, first-out memory units (FIFO). Thus, upon entry of a packet identifier into the drop queue the operation occurs in a manner consistent with a FIFO. When the queue manager or administrator stores an additional packet identifier in a particular drop queue, the newly stored packet identifier is placed in the last-in position in the FIFO queue. Although a FIFO queue is described herein, it is contemplated that other methods of tracking order of entry may be utilized. These alternate methods include, but are not limited to, use of a linked list, an alternate FIFO arrangement, address pointers, or any other order tracking mechanism.

In a related embodiment, it follows that the first-in, i.e., the next-out position is also tracked to determine which packet identifier is the next packet identifier to be read or output from the queue. In the case of a transmit priority queue having a plurality of drop priority queues, each of the plurality of drop priority queues may have a packet identifier in the next-out position.

At a step 620 the queue manager stores the packet identifier at the last- in position in the desired drop queue in the desired transmit priority queue. In one embodiment the packet identifier comprises the address of the packet in memory, the age value of the identifier associated with the packet and the state value when the administrator received the packet. The identifier is thus stored in the queue system in the appropriate drop queue.

Turning now to Figure 9, an operational flow diagram of a method of aging is now described. The aging process of Figure 9 is a more detailed listing of the age process listed at step 632 in Figure 6. The age process is a process that analyzes one or more packet identifiers stored in the queue system and removes or deletes packet identifiers that have remained in the queue system for too long a period. The system may selectively determine when to perform the age process so as to not delete any recent packet identifiers from the queue. In one method of operation, the age process only occurs when the age module resets. In at least one embodiment, the age process also assists in keeping the system consistent by deleting packets that have been stored for more than two counter cycles. This prevents packets remaining in the system for a long period of time from being confused with newer packets.

It is contemplated that the age process may operate in any manner desired that achieves the desired result of removing packets or packet identifiers from the queue system that are unwanted due to age. In one embodiment all the identifiers stored in the queue system are examined during the aging process. In another embodiment, only the first-in (i.e. next out) identifiers are analyzed.

In reference to the method of Figure 9, at a step 700 the aging process obtains the current state value of the state module. This information may be obtained directly from the state module or via the administrator. Next, at a step 702, the operation analyzes the field in the packet identifier that contains the one or more stored state values that represent the state value when the packet was received. In one configuration the analysis comprises a direct comparison that is used in the following step.

At a step 704 the operation deletes all packet identifiers having a state field value in the packet identifier with an identical value as the current state value. In one embodiment, the top or next-out positions of the FIFO are analyzed. The packet identifiers with an identical state value as the current state value are deleted because if the stored state value matches the current state value the packet identifier has been stored in the queue for at least one complete cycle of the age module.

Next, at a step 706 the operation returns the address contained in each of the one or more deleted packet identifiers to the allocation engine. If the allocation unit is implemented with a FIFO, the address may be returned to the last-in position of the allocation engine. After the address is returned to the allocation engine, the address is available for use by the queue system. The packet may remain in memory and is simply over-written when the address is re-utilized. The process then returns to the receive packet operation at a step 708.

This is but one possible method for aging of packets from the system. While this system is desirable for its speed and simplicity, it is contemplated that other methods of operation or configurations may be enabled that achieve a generally similar effect without departing from the scope of the invention.

Figures 10A and 10B illustrate an operation flow diagram of the request address operation of step 608 in Figure 8. The request address operation, explained now in more detail, comprises a request from the administrator to the allocation engine for an address. Although this operation is described in relation to the administrator and the allocation engine, it is contemplated that other apparatus or devices may execute this procedure. Moreover, other methods of allocating an address to a newly received packeted may be implemented without departing from the invention.

At a step 800, the operation requests an address from the allocation engine. This request is generally made as a result of receipt of a new packet. At a decision step 802 the operation determines if an address is available. An address may not be available if the allocation engine has assigned all the addresses to packet identifiers. The packet processing device may have a limited capacity with regard to the total number of packets that may be processed. In addition there may be a maximum number of spaces in the queue system and a corresponding limited number of slots in the memory or the allocation engine.

If there is an address available at step 802 the operation progresses to a step 804. At step 804 the operation advances to step 822 shown on Figure 10B. At step 822 the operation executes the address request. In one embodiment this comprises obtaining or popping the first-in (next-out) address from the allocation engine when the allocation engine is embodied as a FIFO. Thereafter at a step 824, the administrator receives the address from the allocation engine. The operation then returns to the receive packet operation shown in Figure 8.

In contrast, if at step 802 an address is not available the operation proceeds to a decision step 806 wherein analysis and/or comparison may be made between the priority of the newly received packet and the priority level or importance of one or more packets stored in the queue system. The priority of the newly received packet was calculated or determined at step 604 of Figure 8.

In one embodiment the transmit priority of the newly received packet is determined and the analysis occurs with regard to every packet in the corresponding transmit priority queue in the queue system. In a different configuration the analysis made only against the first-in (next-out) position of one or more drop queues in the transmit priority queue that corresponds to the transmit priority of the newly received packet.

If at step 806 the operation determines that the priority of the newly received packet is lower than the priority of the one or more stored packets, then the operation executes step 808 and deletes the newly received packet. This occurs because . the priority or importance of the stored packets is greater than the newly received packet and hence the proper packet to discard is the newly received packet.

Alternatively, if at decision step 806 the comparison determines the priority of the newly received packet is greater than the priority of the one or more stored packets, the operation moves to a step 810. At step 810 the operation analyzes the one or more queues. This analysis occurs because one or more packet identifiers will be dropped or deleted and analysis should occur to determine which one or more stored identifiers should properly be dropped.

Next, at a step 812 the queue manager executes drop algorithms. Drop packet algorithms are algorithms that determine or control the order or manner in which the queue system removes packets from the queues system. In certain environments it is desired to remove packets from a particular transmit priority queue.

At the time of queuing, the packet's drop priority is determined. The drop queues are the sub-queues within a transmit priority queue. Each drop queue contains packet identifiers that correspond to packets of similar priority or importance level. Thus, when packets are to be removed from the queue system, packet identifiers from the drop queue with the lowest importance or priority may be dropped. The drop algorithms may determine the drop queue from which to delete packet identifiers and the total number of identifiers to drop.

Next, based on the drop algorithms, the operation may select from one or more operations for dropping packets. In a step 814 the operation may delete one or more of the lowest priority packets. In a step 816 the operation may delete the oldest packets. In one embodiment the oldest packets may be determined based on a comparison between the current value or time stamp from the age module and the age value stored in the packet identifier. Alternatively or in addition, packet identifiers may be deleted in groups, such as the oldest twenty packet identifiers in a particular drop queue, or the entire contents of a drop queue may be deleted, step 818.

After the drop process of steps 814, 816, and 818, the operation proceeds to step 820 on Figure 10B. At step 820, the operation returns the one or more addresses of the one or more dropped packet identifiers to the allocation engine. This restores addresses to the allocation engine for re-use. Then at a step 822 the operation executes the address request by outputting an address from the allocation engine. At a step 824, the administrator receives the address from the allocation engine and the operation returns to the receive packet operation.

Figures 11A and 11B illustrate an operation flow diagram of an exemplary method of retrieving packets from a packet processing device. At a step 900 the transmit packet operation determines that a transmit opportunity is available. Notification of a transmit window may be provided from a transmit engine to the administrator or to the queue manager. Next, at a step 902, the queue manager executes one or more transmit priority algorithms to determine which queue has transmit priority. The transmit algorithms operate in a manner similar to drop algorithms in that they determine which packets should be transmitted when a transmit opportunity occurs. For purposes of understanding, the transmit priority queue that provided an opportunity to transmit a packet is referred to herein as the designated queue. Different transmit priority queues will be the designated queue during operation of the packet processing device.

Next, at step 904, the queue manager analyzes one or more packet identifiers that are stored in the designated transmit queue. In particular, at a step 906, the queue manager analyzes the state bit of one or more packet identifiers in one or more drop queues in the designated transmit priority queue. In one embodiment the queue manager analyzes only the first-in (next-out) packet identifier in each drop queue in the designated transmit priority queue.

At decision step 910 the transmit operation compares the state field value of the one or more packet identifiers to the previous state value to determine if any of the stored packet identifiers satisfy this match. If any stored packet identifiers have a state value that matches the previous state value the queue manager remembers these packet identifiers. For purposes of understanding, these packet identifiers are referred to as the subset. Because this subset contains the packet identifiers that have been stored for the longest period, the transmission will occur from this subset.

Next, at step 912, the queue manager analyzes the age value, in the age value field, of each packet identifier in the subset. In one configuration the analysis comprises a comparison between the age values to determine the age value that identifies the packet identifier that has been stored for the longest period of time.

At a step 914 the operation identifies the oldest packet identifier in the subset. This allows the transmit system to, in one embodiment, send out the oldest packet first, an aspect of a transmit priority queue. Because the system is capable of maintaining the packets in a particular order in a transmit queue, the packets can be deleted in a desired manner, including based on order of entry in the queue.

Thereafter the operation progresses to a step 916 wherein the packet to be transmitted is identified to the queue manager. In one embodiment, the process of identifying the packet to be identified comprises providing the packet identifier from the desired transmit priority queue to the queue manager.

Alternatively, if at decision step 910 the operation determines that none of the analyzed packet identifiers stored in the queue have the same state bit value as the previous state value, then the operation advances to a step 920. At step 920 the queue manager analyzes the age value in the identified subset of packet identifiers having state values matching the current state value. Based on this analysis, the operation, at step 922, identifies the oldest packet identifier, where the oldest packet identifier is the packet identifier that has been stored the longest. When this has been determined the operation moves to a step 916 and the queue manager is notified of the packet identifier to be used in the transmit operation.

In reference to Figure 1 IB, the operation turns to step 926 and the queue manager retrieves the address from the packet identifier specified as the oldest in steps 910 - 922. At a step 930 the operation sends the retrieved address to a transmit engine or other apparatus responsible for transmitting packets from the packet processing device. Upon receipt of the packet the transmit engine initiates the transmit operation, step 932. Thereafter, at step 934, the queue manager or administrator returns the address to the allocation engine so that the particular address may be re-used. If the allocation engine comprises a FIFO, the address is returned to the last-in position in the FIFO. Next, at a step 936, the packet identifier entry is removed from the queue system and the transmit operation is complete, step 938. In at least one embodiment the removal of the packet identifier from the queue system (step 936) and the return of the address to the allocation engine (step 934) occur generally simultaneously.

It should be noted that this is but one possible method of operation for the various tasks of the packet administrator and queuing system described herein. The processes have been separated into the various sub-processes for purposes of understanding. In operation, all activities described above occur in a generally continuous or parallel manner with several steps occurring or being delayed in any manner to achieve desired operation of the apparatus. For example the age process or deletion of packets may only occur at specified periods. Moreover, in at least one embodiment the apparatus is configured to achieve maximum packets processing in a time period. In addition, it will be understood that the above described arrangements of apparatus and the methods derived therefrom are merely illustrative of applications of the principles of this invention and many other embodiments and modifications may be made without departing from the spirit and scope of the invention as defined in the claims.

Claims

CLAIMS OF THE INVENTION WE CLAIM:

1. A method for queuing packets in a packet processing device comprising: receiving a packet; obtaining a memory address from an address allocation unit; storing the packet in memory at the memory address; obtaining the drop priority and transmit priority of the packet; and storing the memory address in a queue having a drop priority and a transmit priority matching that obtained for the packet.

2. The method of Claim 1 , further comprising obtaining a packet order value from an age module, the order value providing data regarding the order in which the packet was received.

3. The method of Claim 2, wherein the order value comprises a time stamp.

4. The method of Claim 3, wherein the order value comprises a counter value and a state value.

5. The method of Claim 1, wherein the address allocation unit comprises a first-in, first-out structure.

6. The method of Claim 1, wherein the queue comprises a first-in, first-out structure.

7. A method for dropping packets from a packet processing device having one or more drop queues, each drop queue storing one or more packet identifiers: evaluating the one or more drop queues to determine from which of one or more drop queues to delete packet identifiers; deleting one or more packet identifiers from one or more drop queues; and returning one or more addresses to an allocation unit.

8. The method of Claim 7, wherein the one or more drop queues comprise first-in, first-out type queues.

9. The method of Claim 7, wherein evaluating comprises evaluating the next-out position of one or more drop queues to determine from which of one or more drop queues to delete packet identifiers

10. The method of Claim 7, wherein the allocation unit comprises a first-in, first-out structure storing a plurality of addresses.

11. The method of Claim 7, wherein evaluating comprises evaluating the priority assigned to each drop queue to determine from which drop queue to delete packet identifiers.

12. A method for queueing packets in a packet processing device comprising; receiving a packet; evaluating the packet to determine a priority to assign to the packet; requesting an address for the packet from an address manager; and storing the address in a queue configured to store packets with a similar priority as the received packet.

13. The method of Claim 12, further including, upon an opportunity to transmit a packet: retrieving the address from the queue; transmitting the packet stored at a memory location identified by the address; and returning the address to the address manager.

14. The method of Claim 12, wherein the address manager comprises a first-in, first- out structure.

15. The method of Claim 12, wherein the packet priority is based on the type of service assigned to the packet.

16. The method of Claim 12, wherein the packet processing device comprises a router.

17. A method for aging in a queue system comprising: associating current age information with a received packet; storing said age information to create stored age information for a received packet; comparing current age information with said stored age information; and allowing said packet associated with said age information to be overwritten if said comparing determines said stored age information has been stored beyond a maximum age period.

18. The method of Claim 17, wherein the maximum age period is the maximum period allowed by the queuing system for storage of a packet.

19. The method of Claim 17, wherein current age information comprises a counter value.

20. The method of Claim 17, wherein current age information further comprises a state value.

21. The method of Claim 17, wherein stored age information comprises age information that was current age information when the packet was received.

22. A system for accounting for packets in a packet processing device comprising: an allocation first-in, first-out structure configured to output an address from a plurality of stored addresses, said stored addresses stored and output in a first-in, first- out manner; an age module configure to output a current age value, the current age value indicative of the order in which a packet is received; packet memory configured with a plurality of positions, each position identified by an address; a queue memory system comprising a plurality of transmit priority queues wherein at least one transmit priority queue is divided into two or more drop priority queues; and an administrator configured to receive a packet, evaluate the packet, request an address from the allocation first-in, first-out structure, store the packet at the address in the packet memory, request a current age value from the age module, associate the current age value with the packet address to form a packet identifier, and store the packet identifier in the corresponding transmit priority queue and drop priority queue based on the evaluation of the packet.

23. The system of Claim 22, wherein the age module comprises a counter.

24. The system of Claim 22, wherein the packet memory comprises DRAM.

25. A queue administrator for performing packet accounting comprising; an allocation engine configured to output memory slot codes; a plurality of memory units, each memory unit assigned a different priority than another memory unit; a packet receive module configured to receive packets; and administrator logic configured to interface with the allocation engine and the plurality of memory units, wherein upon receipt of a data packet the packet priority is determined and the packet is stored into one of the plurality of memory units with a matching priority.

26. The administrator of Claim 25, further including an age module configured to generate a value indicative of a packet's order of receipt, the age module further configured to output the value to the administrator logic.

27. The administrator of Claim 25, further including memory to store received packets, the memory having slots wherein at least one slot code corresponds to a memory slot.

28. An apparatus for freeing memory space in a packet processing device comprising: an aging system configured to generate current age data; a plurality of queues configured to store packet identifiers, at least one packet identifier containing packet associated age data; a comparator configured to compare packet associated age data with current age data to determine packet identifiers stored for more than a maximum storage period; an administrator configured to remove packet identifiers stored for more than a maximum storage period from the plurality of queues.

29. The apparatus of Claim 28, further including: an address first-in, first-out unit configured to receive, store, and output addresses, wherein the packet identifier includes an address and the administrator removes packet identifiers by returning the address associated with the packet identifier to the address first-in, first-out unit.

30. The apparatus of Claim 28, wherein the age system comprises a clock.

31. The apparatus of Claim 28, wherein the age system comprises a counter.

32. The apparatus of Claim 28, wherein the queue system comprises memory configured as a plurality of transmit priority queues.

33. The apparatus of Claim 28, wherein the comparator comprises logic.