WO2002019425A1 - Method for production of a support element for an ic component - Google Patents

Method for production of a support element for an ic component Download PDF

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Publication number
WO2002019425A1
WO2002019425A1 PCT/DE2001/002991 DE0102991W WO0219425A1 WO 2002019425 A1 WO2002019425 A1 WO 2002019425A1 DE 0102991 W DE0102991 W DE 0102991W WO 0219425 A1 WO0219425 A1 WO 0219425A1
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WO
WIPO (PCT)
Prior art keywords
holes
carrier element
conductive
producing
carrier
Prior art date
Application number
PCT/DE2001/002991
Other languages
German (de)
French (fr)
Inventor
Carsten Senge
Rüdiger MENTZER
Frank Osterwald
Original Assignee
Orga Kartensysteme Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Orga Kartensysteme Gmbh filed Critical Orga Kartensysteme Gmbh
Priority to AU2001283791A priority Critical patent/AU2001283791A1/en
Priority to EP01962609A priority patent/EP1340259A1/en
Publication of WO2002019425A1 publication Critical patent/WO2002019425A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743—External electrical contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector

Definitions

  • the invention relates to a method for producing a carrier element for an IC chip intended for installation in data carrier cards, the carrier element having conductor tracks and contact surfaces on both flat sides made of a conductive material, which are provided at least on one flat side for external contacting of the IC chip , with the generic method steps mentioned in claim 1.
  • Carrier elements of the type described above are produced in the prior art from so-called continuous films, in which two carrier elements usually form a film strip next to one another and a large number of carrier elements one behind the other during the manufacturing and assembly process.
  • the individual carrier elements of the film strip are provided with the IC components and with electrical contacting between the IC components and contact surfaces before the carrier elements are separated.
  • a conventional manufacturing process provides that an electrically non-conductive plastic tape (film strip) provided with a lateral perforation is provided on both sides with conductor tracks and contact areas after through holes have been made in predetermined positions in the plastic tape in a previous work step.
  • the application the conductor tracks and contact areas can be made in different ways, for example by an etching process or by application by means of a screen printing process.
  • the applied contact surfaces are conventionally arranged in such a way that they cover the through holes on one side on the side intended for external contact, so that on the side of the plastic strip facing away from the contact surfaces, on which the IC components are fixed in a subsequent work step, one with the aid of bonding wires Connection between IC components and contact areas through the through holes of the plastic tape can take place.
  • assembly methods for IC components or other electronic components such as flip-chip technology or other face-down assembly technologies, which are common in many areas, require a so-called through-contacting of the plastic layer forming the base of the carrier elements.
  • the through holes are provided with a conductive edge region on the connection side for the IC component, and in that the through holes are filled with a curable conductive paste in a subsequent method step.
  • This design according to the invention provides an electrical connection between the side of the plastic strip facing away from the IC module or the carrier element produced therefrom, on which the contact surfaces for external contact lie, and the side on which the IC module is face-down Assembly technology is arranged, given, the method steps according to the invention inexpensive and can be carried out reliably.
  • the through-contacting of the carrier elements and the resultant possibility of using face-down assembly techniques results in the smallest possible space and height requirements for the carrier elements produced using the method according to the invention, since the contacts of the IC component or other electronic components are located directly above the plated-through contact areas and thus the previously common connection of the IC components by means of bond wiring can be omitted.
  • the novel method preferably allows semiconductors to be used as a chip-sized package (CSP), the rewiring of the connection areas of the semiconductor directly on the latter allowing the connection areas in question to be arranged flexibly, and moreover usually for flip-chip techniques necessary underfiller is unnecessary.
  • CSP chip-sized package
  • the rewiring of the chip-sized package semiconductors makes it possible to maintain the ary-connection geometries present on the carrier elements, that is to say the arrangement of the contact surfaces when changing to other semiconductor module variants.
  • the resulting standardization in manufacturing gives greater flexibility in the overall manufacture of the products.
  • a particularly inexpensive and reliable variant of the method provides that the through holes are filled with the curable conductive paste by means of screen, stencil or stamp printing or a dispensing cut.
  • the printing processes mentioned also make it possible, under certain boundary conditions, to fill the through holes and to create the conductive edge region in a common printing process.
  • An expedient further development of the method according to the invention also provides for the production of the plated-through hole by introducing the conductive paste into the through holes on the flat side of the carrier element provided with the conductive edge region, with the contact surface for the face-down-mounted semiconductor connected to the edge region by a conductor track a conductive bump projecting above the surface.
  • the bump can lie directly on the via.
  • FIG. 2 shows a sectional view through a carrier element in the area of the plated-through holes with an IC component arranged on the carrier element.
  • a carrier element produced using the novel method - shown in FIG. 1 - consists of a load-bearing plastic body 1, which is present as a plastic strip raw material at the beginning of the production process.
  • the plastic strip is provided with through holes 2 in a first operation.
  • the film strip is then provided with conductor tracks 3 and contact surfaces 4 on both sides.
  • Necessary and novel for this method is the formation of a conductive edge region 5 on the side of the plastic body facing away from the conductor track and the contact surfaces.
  • the application of the conductor tracks 3, contact areas 4 and Conductive edge area 5 can be done by etching technology or, for example, by a screen printing process.
  • a subsequent process step then provides for the area of the through hole 2 to be completely filled with a hardenable conductive paste.
  • a hardenable conductive paste In this way, through-contacting of the conductive edge region 5 on one side of the plastic body with the contact surface 4 on the opposite side is achieved.
  • An IC component or other electronic semiconductor elements can then be arranged on the edge region 5 or connected contact surfaces 4 without problems by means of face-down assembly techniques.
  • this can be supplemented by a further method step, which consists in attaching a bump 6 made of conductive adhesive to the edge region 5 provided for contacting the IC component or to the connected contact surfaces.
  • the associated semiconductor can be positioned precisely on the bump that has already been created and at the same time electrically contacted.
  • FIG. 2 shows a carrier element produced according to the invention with an IC chip 7 attached.
  • the IC module is a so-called chip-sized package semiconductor (CSP), which on its side facing the plastic body 1 of the carrier element has on-chip rewiring in the form of a plurality of thin interconnect layers which correspond to one another, so that The connection area assignment is changed directly on the semiconductor, which in turn results in a flexible arrangement of the connection areas.
  • CSP chip-sized package semiconductor
  • the IC module 7 has a nickel layer in the form of an under-bump metallization 9 at the contact points with the plastic body 1 of the carrier element.
  • the IC module 7, as is clear from FIG. 2, is placed directly on the plastic body 1 of the carrier element with the bump 6 consisting of conductive adhesive put on mentes.

Abstract

A method for production of a support element for an IC component for installation in data support cards is disclosed, whereby holes punched through the support element are provided with a conducting boundary region arranged on one side thereof and in a further process step are filled with a setting conducting paste.

Description

Verfahren zur Herstellung eines Trägerelementes für einen IC-Baustein Method for producing a carrier element for an IC chip
Beschreibung:Description:
Die Erfindung betrifft ein Verfahren zur Herstellung eines Trägerelementes für einen zum Einbau in Datenträgerkarten vorgesehenen IC-Baustein, wobei das Trägerelement auf beiden Flachseiten aus einem leitenden Material bestehende Leiterbahnen und Kontaktflächen aufweist, die mindestens auf der einen Flachseite zur Außenkontaktierung des IC-Bausteines vorgesehen sind, mit den im Anspruch 1 genannten gattungsgemäßen Verfah- rensschritten.The invention relates to a method for producing a carrier element for an IC chip intended for installation in data carrier cards, the carrier element having conductor tracks and contact surfaces on both flat sides made of a conductive material, which are provided at least on one flat side for external contacting of the IC chip , with the generic method steps mentioned in claim 1.
Trägerelemente der oben beschriebenen Art werden im Stand der Technik aus so genannten Endlosfilmen hergestellt, bei denen üblicherweise wähend des Herstellungs- und Bestückungsvorganges zwei Trägerelemente nebeneinander und eine Vielzahl von Trägerelementen hintereinander einen Film- streifen bilden. Die einzelnen Trägerelemente des Filmstreifens werden hierbei mit den IC-Bausteinen und mit elektrischer Kontaktierung zwischen IC-Bausteinen und Kontaktflächen versehen, bevor eine Vereinzelung der Trägerelemente vorgenommen wird. Ein herkömmlicher Herstellungsprozess sieht hierbei vor, dass ein mit einer seitlichen Perforierung versehenes elektrisch nicht leitendes Kunststoff band (Filmstreifen) auf beiden Seiten mit Leiterbahnen und Kontaktflächen versehen wird, nachdem in einem vorausgegangenen Arbeitsschritt an vorgegebenen Positionen Durchgangslöcher in das Kunststoffband eingebracht worden sind. Das Aufbringen der Leiterbahnen und Kontaktflächen kann auf unterschiedliche Art und Weise, beispielsweise durch einen Atzprozess oder durch Aufbringen mittels eines Siebdruckvorganges erfolgen.Carrier elements of the type described above are produced in the prior art from so-called continuous films, in which two carrier elements usually form a film strip next to one another and a large number of carrier elements one behind the other during the manufacturing and assembly process. The individual carrier elements of the film strip are provided with the IC components and with electrical contacting between the IC components and contact surfaces before the carrier elements are separated. A conventional manufacturing process provides that an electrically non-conductive plastic tape (film strip) provided with a lateral perforation is provided on both sides with conductor tracks and contact areas after through holes have been made in predetermined positions in the plastic tape in a previous work step. The application the conductor tracks and contact areas can be made in different ways, for example by an etching process or by application by means of a screen printing process.
Die aufgebrachten Kontaktflächen sind herkömmlich so angeordnet, dass sie die Durchgangslöcher einseitig an der zur Außenkontaktierung vorgesehenen Seite überdecken, so dass an der den Kontaktflächen abgewandten Seite des Kunststoffbandes, an der die IC-Bausteine in einem nachfolgenden Arbeitsschritt festgelegt werden, mit Hilfe von Bonddrähten eine Verbindung zwischen IC-Bausteinen und Kontaktflächen durch die Durch- gangslöcher des Kunststoffbandes hindurch, erfolgen kann.The applied contact surfaces are conventionally arranged in such a way that they cover the through holes on one side on the side intended for external contact, so that on the side of the plastic strip facing away from the contact surfaces, on which the IC components are fixed in a subsequent work step, one with the aid of bonding wires Connection between IC components and contact areas through the through holes of the plastic tape can take place.
Heutzutage in vielen Bereichen übliche Montageverfahren für IC-Bausteine oder andere elektronische Bauelemente - wie beispielsweise die Flip-Chip- Technik oder andere face-down-Montagetechnologien - erfordern eine so genannte Durchkontaktierung der die Basis der Trägerelemente bildenden Kunststoffschicht.Nowadays, assembly methods for IC components or other electronic components, such as flip-chip technology or other face-down assembly technologies, which are common in many areas, require a so-called through-contacting of the plastic layer forming the base of the carrier elements.
Aufgabe der vorliegenden Erfindung ist es daher, für den Einsatz dieser kostengünstigen Montagetechnologien ein Verfahren zur Herstellung der dafür notwendigen Trägerelemente bereitzustellen, mit dem eine Durchkontaktierung der verwendeten Kunststoffbänder möglich ist.It is therefore an object of the present invention to provide, for the use of these inexpensive assembly technologies, a method for producing the support elements required for this, by means of which the plastic strips used can be contacted through.
Diese Aufgabe wird erfindungsgemäß dadurch gelöst, dass an der Anschlussseite für den IC-Baustein die Durchgangslöcher mit einem leitenden Randbereich versehen werden, und dass in einem anschließenden Verfahrensschritt die Durchgangslöcher mit einer aushärtbaren Leitpaste verfüllt werden. Durch diese erfindungsgemäße Gestaltung ist eine elektri- sehe Verbindung der dem IC-Baustein abgewandten Seite des Kunststoffbandes bzw. des hieraus erstellten Trägerelementes, auf der die Kontaktflächen zur Außenkontaktierung liegen, und derjenigen Seite, an der der IC- Baustein durch eine face-down-Montagetechnologie angeordnet wird, gegeben, wobei die erfindungsgemäßen Verfahrensschritte kostengünstig und zuverlässig durchgeführt werden können. Durch die Durchkontaktierung der Trägerelemente und der daraus resultierenden Möglichkeit, face-down- Montage-Techniken einzusetzen, ergibt sich für die mit dem erfindungsgemäßen Verfahren hergestellten Trägerelemente ein geringst möglicher Platz- und Höhenbedarf, da sich die Kontakte des IC-Bausteines oder anderer elektronischer Bauelemente direkt über den durchkontaktierten Kontaktflächen befinden und somit die bislang übliche Verbindung der IC-Bausteine mittels Bondverdrahtung entfallen kann. Darüber hinaus können durch das neuartige Verfahren vorzugsweise Halbleiter als Chip-Sized-Package (CSP) eingesetzt werden, wobei die Umverdrahtung der Anschlussflächen des Halbleiters direkt auf diesem eine flexible Anordnung der diesbezüglichen Anschlussflächen gestattet, und darüber hinaus ein üblicherweise für Flip- Chip-Techniken notwendiger Underfiller entbehrlich ist. Die Umverdrahtung der Chip-Sized-Package-Halbleiter ermöglicht es, die auf den Trägerele- menten vorhandenen Arischlussgeometrien, d. h. die Anordnung der Kontaktflächen bei einem Wechsel auf andere Halbleiterbaustein-Varianten beizubehalten. Die daraus resultierende Standardisierung in der Fertigung ergibt bei der Gesamtherstellung der Produkte eine größere Flexibilität.This object is achieved according to the invention in that the through holes are provided with a conductive edge region on the connection side for the IC component, and in that the through holes are filled with a curable conductive paste in a subsequent method step. This design according to the invention provides an electrical connection between the side of the plastic strip facing away from the IC module or the carrier element produced therefrom, on which the contact surfaces for external contact lie, and the side on which the IC module is face-down Assembly technology is arranged, given, the method steps according to the invention inexpensive and can be carried out reliably. The through-contacting of the carrier elements and the resultant possibility of using face-down assembly techniques results in the smallest possible space and height requirements for the carrier elements produced using the method according to the invention, since the contacts of the IC component or other electronic components are located directly above the plated-through contact areas and thus the previously common connection of the IC components by means of bond wiring can be omitted. In addition, the novel method preferably allows semiconductors to be used as a chip-sized package (CSP), the rewiring of the connection areas of the semiconductor directly on the latter allowing the connection areas in question to be arranged flexibly, and moreover usually for flip-chip techniques necessary underfiller is unnecessary. The rewiring of the chip-sized package semiconductors makes it possible to maintain the ary-connection geometries present on the carrier elements, that is to say the arrangement of the contact surfaces when changing to other semiconductor module variants. The resulting standardization in manufacturing gives greater flexibility in the overall manufacture of the products.
Besondere Ausgestaltungen des erfindungsgemäßen Verfahrens ergeben sich zusammen mit der technischen Lehre des Anspruches 1 aus den Merkmalen der Unteransprüche.Special configurations of the method according to the invention result together with the technical teaching of claim 1 from the features of the subclaims.
Hierbei sieht eine besonders kostengünstige und zuverlässige Variante des Verfahrens vor, dass die Verfüllung der Durchgangslöcher mit der aushärtbaren Leitpaste mittels eines Sieb-, Schablonen- oder Stempeldrucks bzw. eines Dispensschnittes durchgeführt wird.Here, a particularly inexpensive and reliable variant of the method provides that the through holes are filled with the curable conductive paste by means of screen, stencil or stamp printing or a dispensing cut.
Die angesprochenen Druckvorgänge ermöglichen es darüber hinaus, unter bestimmten Randbedingungen die Verfüllung der Durchgangslöcher und die Erstellung des leitenden Randbereiches in einem gemeinsamen Druckvorgang durchzuführen. Eine zweckmäßige Weiterentwicklung des erfindungsgemäßen Verfahrens sieht darüber hinaus vor, mit der Herstellung der Durchkontaktierung durch Einbringen der Leitpaste in die Durchgangslöcher auf derjenigen mit dem leitenden Randbereich versehenen Flachseite des Trägerelementes die durch eine Leiterbahn mit dem Randbereich verbundene Kontaktfläche für den face-down montierten Halbleiter mit einem leitfähigen, über die Oberfläche vorstehenden Bump zu versehen. In besonderen Fällen kann der Bump direkt auf der Durchkontaktierung liegen. Mit diesem Verfahrensschritt kann der üblicherweise separat auszuführende Schritt des Chip-Bumping eingespart werden.The printing processes mentioned also make it possible, under certain boundary conditions, to fill the through holes and to create the conductive edge region in a common printing process. An expedient further development of the method according to the invention also provides for the production of the plated-through hole by introducing the conductive paste into the through holes on the flat side of the carrier element provided with the conductive edge region, with the contact surface for the face-down-mounted semiconductor connected to the edge region by a conductor track a conductive bump projecting above the surface. In special cases, the bump can lie directly on the via. With this method step, the chip bumping step, which is usually carried out separately, can be saved.
Im Folgenden wird das erfindungsgemäße Verfahren anhand von zwei unterschiedlich bestückten Trägerelementen näher erläutert. Es zeigt:The method according to the invention is explained in more detail below with the aid of two differently equipped carrier elements. It shows:
Figur 1a, 1b Schnittdarstellungen durch zwei mittels des erfindungsgemäßen Verfahrens hergestellte Trägerelemente im Bereich der Durchkontaktierung vor dem Aufbringen eines elektronischen1a, 1b sectional views through two carrier elements produced by means of the method according to the invention in the area of the plated-through hole before the application of an electronic one
Bauelementes undComponent and
Figur 2: eine Schnittdarstellung durch ein Trägerelement im Bereich der Durchkontaktierungen mit auf dem Trägerelement angeordnetem IC-Baustein.FIG. 2 shows a sectional view through a carrier element in the area of the plated-through holes with an IC component arranged on the carrier element.
Ein mit dem neuartigen Verfahren hergestelltes Trägerelement - dargestellt in Figur 1 - besteht aus einem tragenden Kunststoffkörper 1 , welcher zu Beginn des Herstellungsverfahrens als Kunststoffbandrohmaterial vorliegt. Das Kunststoffband wird in einem ersten Arbeitsgang mit Durchgangslöchern 2 versehen. Anschließend wird das Folienband beidseitig mit Leiterbahnen 3 und Kontaktflächen 4 versehen. Notwendig und neuartig für dieses Verfahren ist die Ausbildung eines leitenden Randbereiches 5 an der der Leiterbahn und den Kontaktflächen abgewandten Seite des Kunststoffkörpers. Die Aufbringung der Leiterbahnen 3, Kontaktflächen 4 und leitfähigen Randbereich 5 kann durch Ätztechnik oder beispielsweise durch ein Siebdruckverfahren erfolgen.A carrier element produced using the novel method - shown in FIG. 1 - consists of a load-bearing plastic body 1, which is present as a plastic strip raw material at the beginning of the production process. The plastic strip is provided with through holes 2 in a first operation. The film strip is then provided with conductor tracks 3 and contact surfaces 4 on both sides. Necessary and novel for this method is the formation of a conductive edge region 5 on the side of the plastic body facing away from the conductor track and the contact surfaces. The application of the conductor tracks 3, contact areas 4 and Conductive edge area 5 can be done by etching technology or, for example, by a screen printing process.
Ein nachfolgender Verfahrensschritt sieht dann vor, den Bereich des Durchgangsloches 2 komplett mit einer aushärtbaren Leitpaste auszufüllen. Auf diese Weise wird eine Durchkontaktierung des leitfähigen Randbereiches 5 auf einer Seite des Kunststoffkörpers mit der Kontaktfläche 4 auf der gegenüber liegenden Seite erreicht. Auf den Randbereich 5 bzw. angeschlossene Kontaktflächen 4 lassen sich dann problemlos ein IC-Baustein oder andere elektronische Halbleiterelemente mittels Face-Down-Montagetechniken anordnen.A subsequent process step then provides for the area of the through hole 2 to be completely filled with a hardenable conductive paste. In this way, through-contacting of the conductive edge region 5 on one side of the plastic body with the contact surface 4 on the opposite side is achieved. An IC component or other electronic semiconductor elements can then be arranged on the edge region 5 or connected contact surfaces 4 without problems by means of face-down assembly techniques.
Entsprechend einer vorteilhaften Gestaltung des erfindungsgemäßen Verfahrens kann dieses durch einen weiteren Verfahrensschritt ergänzt werden, der darin besteht, auf dem für die Kontaktierung mit dem IC-Baustein vorgesehenen Randbereich 5 mittig oder den angeschlossenen Kontaktflächen einen Bump 6 aus Leitklebstoff anzubringen. Auf dem bereits erstellten Bump kann der zugehörige Halbleiter positionsgenau angeordnet und gleichzeitig elektrisch kontaktiert werden.According to an advantageous embodiment of the method according to the invention, this can be supplemented by a further method step, which consists in attaching a bump 6 made of conductive adhesive to the edge region 5 provided for contacting the IC component or to the connected contact surfaces. The associated semiconductor can be positioned precisely on the bump that has already been created and at the same time electrically contacted.
In der Figur 2 ist ein erfindungsgemäß hergestelltes Trägerelement mit aufgesetztem IC-Baustein 7 dargestellt. Bei dem IC-Baustein handelt es sich um einen so genannten Chip-Sized-Package-Halbleiter (CSP), der an seiner den Kunststoffkörper 1 des Trägerelementes zugewandten Seite eine On- Chip-Umverdrahtung in Form mehrerer dünner miteinander korrespondierender Leiterbahnschichten aufweist, wodurch eine Änderung der Anschlussflächenbelegung direkt auf dem Halbleiter erfolgt, was wiederum eine flexible Anordnung der Anschlussflächen ergibt. Aus der Figur ist darüber hinaus ersichtlich, dass der IC-Baustein 7 an den Kontaktstellen zum Kunststoffkörper 1 des Trägerelementes eine Nickelschicht in Form einer Under-Bump-Metallisierung 9 aufweist. Der IC-Baustein 7 wird, wie dies aus der Figur 2 deutlich wird, direkt unter Zwischenschaltung des aus Leitkleber bestehenden Bumps 6 auf den Kunststoffkörper 1 des Trägerele- mentes aufgesetzt. Anzumerken ist hierbei, dass bei Verwendung von CSP- Halbleitem auf einen üblicherweise erforderlichen Underfiller zur mechanischen und elektrischen Kontaktierungsabsicherung, wie sie bei Flip-Chip- Montagetechniken eigentlich üblich ist, verzichtet werden kann, da die verschiedenen Lagen der isolierenden und elektrisch leitenden Schichten der CSP-Umverdrahtung 8 ausreichenden Schutz vor Ausfällen durch thermo-mechanische Wechsellasten bietet. FIG. 2 shows a carrier element produced according to the invention with an IC chip 7 attached. The IC module is a so-called chip-sized package semiconductor (CSP), which on its side facing the plastic body 1 of the carrier element has on-chip rewiring in the form of a plurality of thin interconnect layers which correspond to one another, so that The connection area assignment is changed directly on the semiconductor, which in turn results in a flexible arrangement of the connection areas. The figure also shows that the IC module 7 has a nickel layer in the form of an under-bump metallization 9 at the contact points with the plastic body 1 of the carrier element. The IC module 7, as is clear from FIG. 2, is placed directly on the plastic body 1 of the carrier element with the bump 6 consisting of conductive adhesive put on mentes. It should be noted here that when using CSP semiconductors, an underfiller that is usually required for mechanical and electrical contact protection, as is actually customary in flip-chip assembly techniques, can be dispensed with, since the different layers of the insulating and electrically conductive layers of the CSP -Rewiring 8 provides adequate protection against failures due to thermo-mechanical alternating loads.
Bezugszeichenliste:LIST OF REFERENCE NUMBERS
1. Kunststoffkörper 5 2. Durchgangsloch1. Plastic body 5 2. Through hole
3. Leiterbahn3. Conductor
4. Kontaktfläche4. Contact area
5. leitfähiger Randbereich mit angeschlossener Kontaktfläche5. conductive edge area with connected contact surface
10 6. Bump10 6. Bump
7. IC-Baustein7. IC component
8. CSP-Umverdrahtung8. CSP rewiring
9. Ni-Under-Bump-Metallisierung 9. Ni under bump metallization

Claims

Verfahren zur Herstellung eines Trägerelementes für einen IC-BausteinPatentansprüche: Process for producing a carrier element for an IC component
1. Verfahren zur Herstellung eines Trägerelementes für ein zum Einbau in Datenträgerkarten vorgesehenen IC-Baustein, wobei das Trägerelement auf beiden Flachseiten aus einem leitenden Mate- rial bestehende Leiterbahnen und Kontaktflächen aufweist, die mindestens auf der einen Flachseite zur Außenkontaktierung vorgesehen sind, bei dem in ein Folienband Durchgangslöcher eingestanzt werden, anschließend das Folienband beidseitig mit den Leiterbahnen und Kontaktflächen versehen wird, wobei die Kontaktflächen die Durchgangslöcher einseitig an der zur Außenkontaktierung vorgesehenen Seite überdecken und abschließend das Folienband in einzelne Trägerelemente geteilt wird, dadurch gekennzeichnet, dass an der Anschlussseite für den IC-Baustein (7) die Durchgangslöcher (2) mit einem leitenden Randbereich (5) versehen werden und dass in einem anschließenden Verfahrensschritt die Durchgangslöcher (2) mit einer aushärtbaren Leitpaste verfüllt werden.1. A method for producing a carrier element for an IC component intended for installation in data carrier cards, the carrier element having conductor tracks and contact surfaces on both flat sides made of a conductive material, which are provided at least on one flat side for external contact, in which in a foil strip is punched through holes, then the foil strip is provided on both sides with the conductor tracks and contact areas, the contact surfaces covering the through holes on one side on the side intended for external contact and finally the foil strip is divided into individual carrier elements, characterized in that on the connection side for the IC module (7) the through holes (2) are provided with a conductive edge area (5) and that in a subsequent process step the through holes (2) are filled with a hardenable conductive paste.
2. Verfahren zur Herstellung eines Trägerelementes nach Anspruch 1 , dadurch gekennzeichnet, dass die Verfüllung der Durchgangslöcher (2) mit der Leitpaste durch Sieb-, Schablonen- oder Stempeldruck bzw Dispensschnittes durchgeführt wird. 2. The method for producing a carrier element according to claim 1, characterized in that the filling of the through holes (2) with the conductive paste is carried out by screen, stencil or stamp printing or dispensing cut.
3. Verfahren zur Herstellung eines Trägerelementes nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass die Verfüllung der Durchgangslöcher (2) und die Erstellung des leitenden Rand- bereiches (5) und einer entsprechenden Leiterbahnstruktur in einem gemeinsamen Druckvorgang erfolgt.3. A method for producing a carrier element according to claim 1 or 2, characterized in that the filling of the through holes (2) and the creation of the conductive edge region (5) and a corresponding conductor track structure takes place in a common printing process.
4. Verfahren zur Herstellung eines Trägerelementes nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, dass die in Durch- gangslöcher (2) eingebrachte Leitpaste an der mit dem leitenden4. A method for producing a carrier element according to one of claims 1 to 3, characterized in that the conductive paste introduced into the through holes (2) on the conductive paste
Randbereich (5) versehenen Flachseite des Trägerelementes mit einem über die Oberfläche vorstehenden Bump (6) aus Leitklebstoff versehen wird.Edge area (5) provided on the flat side of the carrier element is provided with a bump (6) made of conductive adhesive projecting above the surface.
5. Verfahren zur Herstellung eines Trägerelementes nach einem der5. A method for producing a carrier element according to one of the
Ansprüche 1 bis 4, dadurch gekennzeichnet, dass das Verfüllen der Durchgangslöcher und das Aufbringen des leitfähigen Bumps für die Chipkontaktierung auf den Randbereich (5) mittig oder den angeschlossenen Kontaktflächen gleichzeitig in einem gemein- samen Verfahrensschritt erfolgt. Claims 1 to 4, characterized in that the filling of the through holes and the application of the conductive bump for the chip contacting to the edge region (5) in the middle or to the connected contact areas takes place simultaneously in a common method step.
PCT/DE2001/002991 2000-08-29 2001-08-13 Method for production of a support element for an ic component WO2002019425A1 (en)

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EP01962609A EP1340259A1 (en) 2000-08-29 2001-08-13 Method for production of a support element for an ic component

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DE10042312.4 2000-08-29
DE10042312A DE10042312A1 (en) 2000-08-29 2000-08-29 Method for producing a carrier element for an IC chip

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